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authorMartin-Éric Racine <martin-eric.racine@iki.fi>2012-07-11 15:50:28 +0300
committerMartin-Éric Racine <martin-eric.racine@iki.fi>2012-07-11 15:50:28 +0300
commit1ed67d70ac9d3afd9b372c311aaf7b77e38b3e21 (patch)
tree134ec66d59b987c039a0690707d51fb15c99dd60 /src/panel
parentb9afafec0a26eaec49e7f0ff08297c2bb795a9c2 (diff)
Whitespace cleanup using ../modular/x-indent.sh
Diffstat (limited to 'src/panel')
-rw-r--r--src/panel/92xx.h350
-rw-r--r--src/panel/cen9211.c103
-rw-r--r--src/panel/cen9211.h8
-rw-r--r--src/panel/dora9211.c49
-rw-r--r--src/panel/dora9211.h24
-rw-r--r--src/panel/drac9210.c68
-rw-r--r--src/panel/drac9210.h2
-rw-r--r--src/panel/gx2_9211.c79
-rw-r--r--src/panel/gx2_9211.h31
-rw-r--r--src/panel/panel.c6
-rw-r--r--src/panel/panel.h9
-rw-r--r--src/panel/platform.c43
-rw-r--r--src/panel/pnl_bios.c94
-rw-r--r--src/panel/pnl_defs.h20
-rw-r--r--src/panel/pnl_init.c23
15 files changed, 451 insertions, 458 deletions
diff --git a/src/panel/92xx.h b/src/panel/92xx.h
index f10fa09..b7b0e25 100644
--- a/src/panel/92xx.h
+++ b/src/panel/92xx.h
@@ -114,8 +114,7 @@ typedef unsigned char UCHAR;
/* GPIO Control */
int Pnl_Rev_ID;
-typedef struct
-{
+typedef struct {
/* DISPLAY MODE PARAMETERS */
int xres;
int yres;
@@ -140,12 +139,10 @@ typedef struct
unsigned long frm_memory_data;
unsigned long memory_control;
-}
-CS92xx_MODE;
+} CS92xx_MODE;
/* VALUES USED TO SAVE AND RESTORE 9211 REGISTERS. */
-typedef struct
-{
+typedef struct {
unsigned long panel_state;
/* VALUES USED TO SET THE FLAT PANEL DISPLAY CONTROLLER */
unsigned long panel_timing1;
@@ -157,8 +154,7 @@ typedef struct
unsigned long frm_memory_index;
unsigned long frm_memory_data;
unsigned long memory_control;
-}
-CS92xx_REGS;
+} CS92xx_REGS;
CS92xx_REGS cs9211_regs;
@@ -171,200 +167,200 @@ CS92xx_REGS cs9211_regs;
CS92xx_MODE FPModeParams[] = {
{640, 480, 8, PNL_SSTN, PNL_COLOR_PANEL, /* display parameters */
- 0x01e00000, 0x00034000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /* The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x25cf3096, 0xad47b81e, /* block select 1, block select 2 */
- 0x21446450, 0x21446450, /* dispersion 1, dispersion 2 */
- /* The next 5 values are for revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000000, /* memory control */
- },
+ 0x01e00000, 0x00034000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /* The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x25cf3096, 0xad47b81e, /* block select 1, block select 2 */
+ 0x21446450, 0x21446450, /* dispersion 1, dispersion 2 */
+ /* The next 5 values are for revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000000, /* memory control */
+ },
{640, 480, 12, PNL_TFT, PNL_COLOR_PANEL, /* display parameters */
- 0x01e00000, 0x0f100000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /* The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* block select 1, block select 2 */
- 0x00000000, 0x00000000, /* dispersion 1, dispersion 2 */
- /* The next 5 values are for revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000000, /* memory control */
- },
+ 0x01e00000, 0x0f100000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /* The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* block select 1, block select 2 */
+ 0x00000000, 0x00000000, /* dispersion 1, dispersion 2 */
+ /* The next 5 values are for revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000000, /* memory control */
+ },
{640, 480, 18, PNL_TFT, PNL_COLOR_PANEL, /* display parameters */
- 0x01e00000, 0x0f100000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /* The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* block select 1, block select 2 */
- 0x00000000, 0x00000000, /* dispersion 1, dispersion 2 */
- /* The next 5 values are for revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000000, /* memory control */
- },
+ 0x01e00000, 0x0f100000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /* The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* block select 1, block select 2 */
+ 0x00000000, 0x00000000, /* dispersion 1, dispersion 2 */
+ /* The next 5 values are for revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000000, /* memory control */
+ },
{640, 480, 16, PNL_DSTN, PNL_COLOR_PANEL, /* display parameters */
- 0x01e00000, 0x00014000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /* The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x048c26ae, 0x048c26ae, /* block select 1, block select 2 */
- 0x02468ace, 0x13579bdf, /* dispersion 1, dispersion 2 */
- /* The next 5 values are for revision C */
- 0x0000004b, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000007, /* memory control */
- },
+ 0x01e00000, 0x00014000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /* The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x048c26ae, 0x048c26ae, /* block select 1, block select 2 */
+ 0x02468ace, 0x13579bdf, /* dispersion 1, dispersion 2 */
+ /* The next 5 values are for revision C */
+ 0x0000004b, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000007, /* memory control */
+ },
{640, 480, 8, PNL_DSTN, PNL_MONO_PANEL, /* display parameters */
- 0x01e00000, 0x00084000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /* The next 5 values are prior to revision C */
- 0x0000004b, /* dither and frame rate control */
- 0x25cf3096, 0xad47b81e, /* block select 1, block select 2 */
- 0x21446450, 0x21446450, /* dispersion 1, dispersion 2 */
- /* The next 5 values are for revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000007, /* memory control */
- },
+ 0x01e00000, 0x00084000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /* The next 5 values are prior to revision C */
+ 0x0000004b, /* dither and frame rate control */
+ 0x25cf3096, 0xad47b81e, /* block select 1, block select 2 */
+ 0x21446450, 0x21446450, /* dispersion 1, dispersion 2 */
+ /* The next 5 values are for revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000007, /* memory control */
+ },
{640, 480, 16, PNL_DSTN, PNL_MONO_PANEL, /* display parameters */
- 0x01e00000, 0x00094000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /* The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x25cf3096, 0xad47b81e, /* block select 1, block select 2 */
- 0x81a5d470, 0x29cfb63e, /* dispersion 1, dispersion 2 */
- /* The next 5 values are for revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000007, /* memory control */
- },
+ 0x01e00000, 0x00094000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /* The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x25cf3096, 0xad47b81e, /* block select 1, block select 2 */
+ 0x81a5d470, 0x29cfb63e, /* dispersion 1, dispersion 2 */
+ /* The next 5 values are for revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000007, /* memory control */
+ },
{800, 600, 12, PNL_TFT, PNL_COLOR_PANEL, /* display parameters */
- 0x02580000, 0x0f100000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /* The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* block select 1, block select 2 */
- 0x00000000, 0x00000000, /* dispersion 1, dispersion 2 */
- /* The next 5 values are for revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000000, /* memory control */
- },
+ 0x02580000, 0x0f100000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /* The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* block select 1, block select 2 */
+ 0x00000000, 0x00000000, /* dispersion 1, dispersion 2 */
+ /* The next 5 values are for revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000000, /* memory control */
+ },
{800, 600, 18, PNL_TFT, PNL_COLOR_PANEL, /* display parameters */
- 0x02580000, 0x0f100000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /* The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* block select 1, block select 2 */
- 0x00000000, 0x00000000, /* dispersion 1, dispersion 2 */
- /* The next 5 values are for revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000000, /* memory control */
- },
+ 0x02580000, 0x0f100000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /* The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* block select 1, block select 2 */
+ 0x00000000, 0x00000000, /* dispersion 1, dispersion 2 */
+ /* The next 5 values are for revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000000, /* memory control */
+ },
{800, 600, 16, PNL_DSTN, PNL_COLOR_PANEL, /* display parameters */
- 0x02580000, 0x00014000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /* The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x048c26ae, 0x048c26ae, /* block select 1, block select 2 */
- 0x02468ace, 0x13579bdf, /* dispersion 1, dispersion 2 */
- /* The next 5 values are for revision C */
- 0x0000004b, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000007, /* memory control */
- },
+ 0x02580000, 0x00014000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /* The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x048c26ae, 0x048c26ae, /* block select 1, block select 2 */
+ 0x02468ace, 0x13579bdf, /* dispersion 1, dispersion 2 */
+ /* The next 5 values are for revision C */
+ 0x0000004b, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000007, /* memory control */
+ },
{800, 600, 8, PNL_DSTN, PNL_MONO_PANEL, /* display parameters */
- 0x02580000, 0x00084000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /* The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x25cf3096, 0xad47b81e, /* block select 1, block select 2 */
- 0x21446450, 0x21446450, /* dispersion 1, dispersion 2 */
- /* The next 5 values are for revision C */
- 0x0000004b, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000007, /* memory control */
- },
+ 0x02580000, 0x00084000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /* The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x25cf3096, 0xad47b81e, /* block select 1, block select 2 */
+ 0x21446450, 0x21446450, /* dispersion 1, dispersion 2 */
+ /* The next 5 values are for revision C */
+ 0x0000004b, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000007, /* memory control */
+ },
{800, 600, 16, PNL_DSTN, PNL_MONO_PANEL, /* display parameters */
- 0x02580000, 0x00094000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /* The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x25cf3096, 0xad47b81e, /* block select 1, block select 2 */
- 0x81a5d470, 0x29cfb63e, /* dispersion 1, dispersion 2 */
- /* The next 5 values are for revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000007, /* memory control */
- },
+ 0x02580000, 0x00094000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /* The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x25cf3096, 0xad47b81e, /* block select 1, block select 2 */
+ 0x81a5d470, 0x29cfb63e, /* dispersion 1, dispersion 2 */
+ /* The next 5 values are for revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000007, /* memory control */
+ },
{1024, 768, 18, PNL_TFT, PNL_COLOR_PANEL, /* display parameters */
- 0x03000000, 0x0f100000, /* panel timing reg 1, panel timing */
- /* reg 2 */
- 0x01000000, /* power management */
- /*The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* block select 1, block select 2 */
- 0x00000000, 0x00000000, /* dispersion 1, dispersion 2 */
- /*The next 5 values are for revision C */
- 0x00000050, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000000, /* memory control */
- },
+ 0x03000000, 0x0f100000, /* panel timing reg 1, panel timing */
+ /* reg 2 */
+ 0x01000000, /* power management */
+ /*The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* block select 1, block select 2 */
+ 0x00000000, 0x00000000, /* dispersion 1, dispersion 2 */
+ /*The next 5 values are for revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000000, /* memory control */
+ },
{1024, 768, 24, PNL_DSTN, PNL_COLOR_PANEL, /* display parameters */
- 0x03000000, 0x80024000, /* panel timing reg 1, panel timing reg 2 */
- 0x01000000, /* power management */
- /*The next 5 values are prior to revision C */
- 0x00000050, /* dither and frame rate control */
- 0x048c26ae, 0x048c26ae, /* block select 1, block select 2 */
- 0x02468ace, 0x13579bdf, /* dispersion 1, dispersion 2 */
- /*The next 5 values are for revision C */
- 0x0000004b, /* dither and frame rate control */
- 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
- 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
- 0x00000005, /* memory control */
- }
+ 0x03000000, 0x80024000, /* panel timing reg 1, panel timing reg 2 */
+ 0x01000000, /* power management */
+ /*The next 5 values are prior to revision C */
+ 0x00000050, /* dither and frame rate control */
+ 0x048c26ae, 0x048c26ae, /* block select 1, block select 2 */
+ 0x02468ace, 0x13579bdf, /* dispersion 1, dispersion 2 */
+ /*The next 5 values are for revision C */
+ 0x0000004b, /* dither and frame rate control */
+ 0x00000000, 0x00000000, /* blue LSFR, red and green LSFR */
+ 0x00000000, 0x00000000, /* FRM memory index, FRM memory data */
+ 0x00000005, /* memory control */
+ }
};
-#endif /* !_92XX_h */
+#endif /* !_92XX_h */
/* END OF FILE */
diff --git a/src/panel/cen9211.c b/src/panel/cen9211.c
index 3abc7d5..d9cbc42 100644
--- a/src/panel/cen9211.c
+++ b/src/panel/cen9211.c
@@ -62,7 +62,7 @@ init_Centaurus_GPIO(void)
/* set to bank 0 */
if (reg_val & CENT_GPIO_BANK_SELECT) {
gfx_outb(CENT_CONFIG_DATA,
- (unsigned char)(reg_val & ~CENT_GPIO_BANK_SELECT));
+ (unsigned char) (reg_val & ~CENT_GPIO_BANK_SELECT));
}
/* If this is the first time we have modified sioc2, we must
@@ -108,7 +108,7 @@ init_Centaurus_GPIO(void)
gfx_outb(CENT_PORT2_OUTPUT_TYPE, reg_val);
return CENT_PASS;
-} /* end init_GPIO() */
+} /* end init_GPIO() */
/*********************************************************************
*
@@ -135,7 +135,7 @@ init_Centaurus_9211(void)
gfx_outb(CENT_97317_CHIP_SELECT, ReadData);
return (CENT_PASS);
-} /*end init_9211() */
+} /*end init_9211() */
/******************************************************************
*
@@ -166,10 +166,10 @@ restore_Centaurus_97317_SIOC2(void)
else
return (CENT_FAIL);
- } /* end if() */
+ } /* end if() */
return (CENT_FAIL);
-} /* end restore_97317_SIOC2bank() */
+} /* end restore_97317_SIOC2bank() */
/* -----------------------------------------------------------------------
*
@@ -199,11 +199,11 @@ set_Centaurus_92xx_mode(Pnl_PanelStat * pstat)
/* SET THE 92xx FOR THE SELECTED MODE */
set_Centaurus_92xx_mode_params(mode);
return (CENT_PASS);
- } /* end if() */
- } /* end for() */
+ } /* end if() */
+ } /* end for() */
return (CENT_FAIL);
-} /* end set_Centaurus_92xx_mode() */
+} /* end set_Centaurus_92xx_mode() */
/*-------------------------------------------------------------------
*
@@ -228,51 +228,53 @@ set_Centaurus_92xx_mode_params(int mode)
/* set 9211 registers using the desired panel settings */
Centaurus_write_gpio(FOUR_BYTES,
- CS92xx_LCD_PAN_TIMING1, pMode->panel_timing1);
+ CS92xx_LCD_PAN_TIMING1, pMode->panel_timing1);
Centaurus_write_gpio(FOUR_BYTES,
- CS92xx_LCD_PAN_TIMING2, pMode->panel_timing2);
+ CS92xx_LCD_PAN_TIMING2, pMode->panel_timing2);
if (Pnl_Rev_ID == PNL_9211_C) {
/* load the LSFR seeds */
Centaurus_write_gpio(FOUR_BYTES,
- CS92xx_LCD_DITH_FR_CNTRL, pMode->rev_C_dither_frc);
+ CS92xx_LCD_DITH_FR_CNTRL, pMode->rev_C_dither_frc);
Centaurus_write_gpio(FOUR_BYTES,
- CS92xx_BLUE_LSFR_SEED, pMode->blue_lsfr_seed);
+ CS92xx_BLUE_LSFR_SEED, pMode->blue_lsfr_seed);
Centaurus_write_gpio(FOUR_BYTES,
- CS92xx_RED_GREEN_LSFR_SEED, pMode->red_green_lsfr_seed);
- } else {
+ CS92xx_RED_GREEN_LSFR_SEED,
+ pMode->red_green_lsfr_seed);
+ }
+ else {
Centaurus_write_gpio(FOUR_BYTES,
- CS92xx_LCD_DITH_FR_CNTRL, pMode->pre_C_dither_frc);
+ CS92xx_LCD_DITH_FR_CNTRL, pMode->pre_C_dither_frc);
Centaurus_write_gpio(FOUR_BYTES,
- CS92xx_LCD_BLOCK_SEL1, pMode->block_select1);
+ CS92xx_LCD_BLOCK_SEL1, pMode->block_select1);
Centaurus_write_gpio(FOUR_BYTES,
- CS92xx_LCD_BLOCK_SEL2, pMode->block_select2);
+ CS92xx_LCD_BLOCK_SEL2, pMode->block_select2);
Centaurus_write_gpio(FOUR_BYTES,
- CS92xx_LCD_DISPER1, pMode->dispersion1);
+ CS92xx_LCD_DISPER1, pMode->dispersion1);
Centaurus_write_gpio(FOUR_BYTES,
- CS92xx_LCD_DISPER2, pMode->dispersion2);
+ CS92xx_LCD_DISPER2, pMode->dispersion2);
CentaurusProgramFRMload();
}
Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL,
- pMode->memory_control);
+ pMode->memory_control);
/* Set the power register last. This will turn the panel on at the 9211. */
Centaurus_write_gpio(FOUR_BYTES,
- CS92xx_LCD_PWR_MAN, pMode->power_management);
+ CS92xx_LCD_PWR_MAN, pMode->power_management);
-} /* end set_Centaurus_92xx_mode_params() */
+} /* end set_Centaurus_92xx_mode_params() */
void
Centaurus_write_gpio(int width, ULONG address, unsigned long data)
@@ -291,7 +293,7 @@ Centaurus_write_gpio(int width, ULONG address, unsigned long data)
/* Write the 12-bit address */
for (count = 0; count < 12; count++) {
- write_Centaurus_CX9211_GPIO((unsigned char)(Addr & 0x01));
+ write_Centaurus_CX9211_GPIO((unsigned char) (Addr & 0x01));
/*the 9211 expects data LSB->MSB */
Addr = Addr >> 1;
}
@@ -309,7 +311,7 @@ Centaurus_write_gpio(int width, ULONG address, unsigned long data)
}
return;
-} /* end Centaurus_write_gpio() */
+} /* end Centaurus_write_gpio() */
unsigned long
Centaurus_read_gpio(int width, unsigned long address)
@@ -329,7 +331,7 @@ Centaurus_read_gpio(int width, unsigned long address)
/* Write the 12-bit address */
for (count = 0; count < 12; count++) {
- write_Centaurus_CX9211_GPIO((unsigned char)(Addr & 0x01));
+ write_Centaurus_CX9211_GPIO((unsigned char) (Addr & 0x01));
/*the 9211 expects data LSB->MSB */
Addr = Addr >> 1;
@@ -347,7 +349,7 @@ Centaurus_read_gpio(int width, unsigned long address)
}
return data;
-} /* end Centaurus_read_gpio() */
+} /* end Centaurus_read_gpio() */
/*******************************************************************
*
@@ -365,9 +367,9 @@ enable_Centaurus_9211_chip_select(void)
/* Set the chip select (GPIO20) high */
cs_port_val = gfx_inb(CENT_97317_CHIP_SELECT);
gfx_outb(CENT_97317_CHIP_SELECT,
- (unsigned char)(cs_port_val | CENT_97317_CHIP_SEL_MASK));
+ (unsigned char) (cs_port_val | CENT_97317_CHIP_SEL_MASK));
return;
-} /* end enable_Centaurus_9211_chip_select() */
+} /* end enable_Centaurus_9211_chip_select() */
/********************************************************************
*
@@ -385,10 +387,10 @@ disable_Centaurus_9211_chip_select(void)
/* Set the chip select (GPIO20) low */
cs_port_val = gfx_inb(CENT_97317_CHIP_SELECT);
gfx_outb(CENT_97317_CHIP_SELECT,
- (unsigned char)(cs_port_val & ~CENT_97317_CHIP_SEL_MASK));
+ (unsigned char) (cs_port_val & ~CENT_97317_CHIP_SEL_MASK));
return;
-} /* end disable_Centaurus_9211_chip_select() */
+} /* end disable_Centaurus_9211_chip_select() */
/**********************************************************************
*
@@ -410,13 +412,13 @@ toggle_Centaurus_9211_clock(void)
port_val = gfx_inb(CENT_97317_CLOCK_PORT);
/* set the clock bit high */
gfx_outb(CENT_97317_CLOCK_PORT,
- (unsigned char)(port_val | CENT_97317_CLOCK_MASK));
+ (unsigned char) (port_val | CENT_97317_CLOCK_MASK));
/* set the clock bit low */
gfx_outb(CENT_97317_CLOCK_PORT,
- (unsigned char)(port_val & ~CENT_97317_CLOCK_MASK));
+ (unsigned char) (port_val & ~CENT_97317_CLOCK_MASK));
-} /* end toggle_Centaurus_9211_clock() */
+} /* end toggle_Centaurus_9211_clock() */
/********************************************************************
*
@@ -448,7 +450,7 @@ write_Centaurus_CX9211_GPIO(unsigned char databit)
toggle_Centaurus_9211_clock();
return;
-} /* end write_Centaurus_CX9211_GPIO() */
+} /* end write_Centaurus_CX9211_GPIO() */
/*****************************************************************
*
@@ -473,14 +475,14 @@ write_Centaurus_CX9211_DWdata(unsigned long data)
/* Now write the 32-bit Data */
for (count = 0; count < 32; count++) {
- write_Centaurus_CX9211_GPIO((unsigned char)(data & 0x01));
+ write_Centaurus_CX9211_GPIO((unsigned char) (data & 0x01));
/* the 9211 expects the data LSB->MSB */
data >>= 1;
}
return;
-} /* end write_Centaurus_CX9211_DWdata() */
+} /* end write_Centaurus_CX9211_DWdata() */
/*********************************************************************
*
@@ -505,7 +507,7 @@ read_Centaurus_CX9211_GPIO(void)
data_port_val >>= 1;
return (data_port_val & 0x1);
-} /* end read_Centaurus_CX9211_GPIO() */
+} /* end read_Centaurus_CX9211_GPIO() */
/**********************************************************************
*
@@ -541,12 +543,12 @@ read_Centaurus_CX9211_DWdata(void)
for (count = 0; count < 32; count++) {
ReadData = read_Centaurus_CX9211_GPIO();
/* 9211 sends data LSB->MSB */
- Data = Data | (((unsigned long)ReadData) << count);
- } /* end for() */
+ Data = Data | (((unsigned long) ReadData) << count);
+ } /* end for() */
return Data;
-} /* end read_Centaurus_CX9211_DWdata() */
+} /* end read_Centaurus_CX9211_DWdata() */
void
Centaurus_Get_9211_Details(unsigned long flags, Pnl_PanelParams * pParam)
@@ -576,7 +578,8 @@ Centaurus_Get_9211_Details(unsigned long flags, Pnl_PanelParams * pParam)
pParam->PanelChip = PNL_9211_A;
else
pParam->PanelChip = PNL_UNKNOWN_CHIP;
- } else { /* no 9211 present */
+ }
+ else { /* no 9211 present */
pParam->PanelChip = PNL_UNKNOWN_CHIP;
}
Pnl_Rev_ID = pParam->PanelChip;
@@ -770,7 +773,7 @@ Centaurus_Power_Up(void)
Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);
return;
-} /* Centaurus_Disable_Power */
+} /* Centaurus_Disable_Power */
/***********************************************************************
*
@@ -788,7 +791,7 @@ Centaurus_Power_Down(void)
Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);
return;
-} /* Centaurus_Disable_Power */
+} /* Centaurus_Disable_Power */
void
Centaurus_9211init(Pnl_PanelStat * pstat)
@@ -839,28 +842,28 @@ Centaurus_Restore_Panel_State(void)
/* set 9211 registers using the desired panel settings */
Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING1,
- cs9211_regs.panel_timing1);
+ cs9211_regs.panel_timing1);
Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING2,
- cs9211_regs.panel_timing2);
+ cs9211_regs.panel_timing2);
/* load the LSFR seeds */
Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_DITH_FR_CNTRL,
- cs9211_regs.dither_frc_ctrl);
+ cs9211_regs.dither_frc_ctrl);
Centaurus_write_gpio(FOUR_BYTES, CS92xx_BLUE_LSFR_SEED,
- cs9211_regs.blue_lsfr_seed);
+ cs9211_regs.blue_lsfr_seed);
Centaurus_write_gpio(FOUR_BYTES, CS92xx_RED_GREEN_LSFR_SEED,
- cs9211_regs.red_green_lsfr_seed);
+ cs9211_regs.red_green_lsfr_seed);
Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL,
- cs9211_regs.memory_control);
+ cs9211_regs.memory_control);
/* Set the power register last. This will turn the panel on at the 9211 */
Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN,
- cs9211_regs.power_management);
+ cs9211_regs.power_management);
}
diff --git a/src/panel/cen9211.h b/src/panel/cen9211.h
index 1ab21e8..c3e5d08 100644
--- a/src/panel/cen9211.h
+++ b/src/panel/cen9211.h
@@ -78,8 +78,7 @@ void disable_Centaurus_9211_chip_select(void);
void toggle_Centaurus_9211_clock(void);
void write_Centaurus_CX9211_GPIO(unsigned char databit);
void write_Centaurus_CX9211_DWdata(unsigned long data);
-void Centaurus_write_gpio(int width, unsigned long address,
- unsigned long data);
+void Centaurus_write_gpio(int width, unsigned long address, unsigned long data);
void Centaurus_Power_Up(void);
void Centaurus_Power_Down(void);
unsigned long Centaurus_read_gpio(int width, unsigned long address);
@@ -90,12 +89,11 @@ unsigned char init_Centaurus_GPIO(void);
unsigned char init_Centaurus_9211(void);
unsigned char set_Centaurus_92xx_mode(Pnl_PanelStat * pstat);
void CentaurusProgramFRMload(void);
-void Centaurus_Get_9211_Details(unsigned long flags,
- Pnl_PanelParams * pParam);
+void Centaurus_Get_9211_Details(unsigned long flags, Pnl_PanelParams * pParam);
void Centaurus_Save_Panel_State(void);
void Centaurus_Restore_Panel_State(void);
void Centaurus_9211init(Pnl_PanelStat * pstat);
-#endif /* !_CEN9211_h */
+#endif /* !_CEN9211_h */
/* END OF FILE */
diff --git a/src/panel/dora9211.c b/src/panel/dora9211.c
index ea52e95..295cf93 100644
--- a/src/panel/dora9211.c
+++ b/src/panel/dora9211.c
@@ -57,7 +57,8 @@ Dorado_Get_9211_Details(unsigned long flags, Pnl_PanelParams * pParam)
pParam->PanelChip = PNL_9211_A;
else
pParam->PanelChip = PNL_UNKNOWN_CHIP;
- } else { /* no 9211 present */
+ }
+ else { /* no 9211 present */
pParam->PanelChip = PNL_UNKNOWN_CHIP;
}
}
@@ -75,22 +76,19 @@ Dorado_Get_9211_Details(unsigned long flags, Pnl_PanelParams * pParam)
DPanelType = Dorado9211ReadReg(0x434);
DPanelType = (DPanelType >> (DRD_LCDRESGPIO1 + 1));
PanelTypeOrg = DPanelType >> 8;
- Panel_2Byte = (unsigned char)PanelTypeOrg;
- Panel_2Byte =
- (Panel_2Byte >> (DRD_LCDRESGPIO2 - DRD_LCDRESGPIO1 - 1));
- DPanelType = (DPanelType | ((unsigned int)Panel_2Byte << 8));
+ Panel_2Byte = (unsigned char) PanelTypeOrg;
+ Panel_2Byte = (Panel_2Byte >> (DRD_LCDRESGPIO2 - DRD_LCDRESGPIO1 - 1));
+ DPanelType = (DPanelType | ((unsigned int) Panel_2Byte << 8));
DPanelType = DPanelType >> 1;
PanelTypeOrg = DPanelType >> 8;
- Panel_2Byte = (unsigned char)PanelTypeOrg;
- Panel_2Byte =
- (Panel_2Byte >> (DRD_LCDRESGPIO3 - DRD_LCDRESGPIO2 - 1));
- DPanelType = (DPanelType | ((unsigned int)Panel_2Byte << 8));
+ Panel_2Byte = (unsigned char) PanelTypeOrg;
+ Panel_2Byte = (Panel_2Byte >> (DRD_LCDRESGPIO3 - DRD_LCDRESGPIO2 - 1));
+ DPanelType = (DPanelType | ((unsigned int) Panel_2Byte << 8));
DPanelType = DPanelType >> 1;
PanelTypeOrg = DPanelType >> 8;
- Panel_2Byte = (unsigned char)PanelTypeOrg;
- Panel_2Byte =
- (Panel_2Byte >> (DRD_LCDRESGPIO4 - DRD_LCDRESGPIO3 - 1));
- DPanelType = (DPanelType | ((unsigned int)Panel_2Byte << 8));
+ Panel_2Byte = (unsigned char) PanelTypeOrg;
+ Panel_2Byte = (Panel_2Byte >> (DRD_LCDRESGPIO4 - DRD_LCDRESGPIO3 - 1));
+ DPanelType = (DPanelType | ((unsigned int) Panel_2Byte << 8));
DPanelType = DPanelType >> 5;
DPanelType &= 0xf;
@@ -210,10 +208,10 @@ Dorado9211Init(Pnl_PanelStat * pstat)
Dorado9211WriteReg(CS92xx_LCD_PAN_TIMING1, pMode->panel_timing1);
Dorado9211WriteReg(CS92xx_LCD_PAN_TIMING2, pMode->panel_timing2);
Dorado9211WriteReg(CS92xx_LCD_DITH_FR_CNTRL,
- pMode->rev_C_dither_frc);
+ pMode->rev_C_dither_frc);
Dorado9211WriteReg(CS92xx_BLUE_LSFR_SEED, pMode->blue_lsfr_seed);
Dorado9211WriteReg(CS92xx_RED_GREEN_LSFR_SEED,
- pMode->red_green_lsfr_seed);
+ pMode->red_green_lsfr_seed);
DoradoProgramFRMload();
Dorado9211WriteReg(CS92xx_LCD_MEM_CNTRL, pMode->memory_control);
Dorado9211WriteReg(CS92xx_LCD_PWR_MAN, pMode->power_management);
@@ -235,8 +233,8 @@ Dorado9211Init(Pnl_PanelStat * pstat)
orig_value &= 0xfff1ffff;
WRITE_VID32(0X4, orig_value);
return;
- } /*end if() */
- } /*end for() */
+ } /*end if() */
+ } /*end for() */
}
@@ -358,7 +356,8 @@ Dorado9211ReadReg(unsigned short index)
for (i = 0; i < 12; i++) {
if (index & 0x1) {
Dorado9211SetDataOut();
- } else {
+ }
+ else {
Dorado9211ClearDataOut();
}
Dorado9211ToggleClock();
@@ -382,7 +381,7 @@ Dorado9211ReadReg(unsigned short index)
for (i = 0; i < 32; i++) {
Dorado9211ToggleClock();
readbit = Dorado9211ReadDataIn();
- data |= (((unsigned long)readbit) << i);
+ data |= (((unsigned long) readbit) << i);
}
Dorado9211ClearCS();
@@ -407,7 +406,8 @@ Dorado9211WriteReg(unsigned short index, unsigned long data)
for (i = 0; i < 12; i++) {
if (index & 0x1) {
Dorado9211SetDataOut();
- } else {
+ }
+ else {
Dorado9211ClearDataOut();
}
Dorado9211ToggleClock();
@@ -420,7 +420,8 @@ Dorado9211WriteReg(unsigned short index, unsigned long data)
for (i = 0; i < 32; i++) {
if (data & 0x1) {
Dorado9211SetDataOut();
- } else {
+ }
+ else {
Dorado9211ClearDataOut();
}
Dorado9211ToggleClock();
@@ -546,7 +547,7 @@ Dorado_Power_Up(void)
Dorado9211WriteReg(CS92xx_LCD_PWR_MAN, 0x01000000);
return;
-} /* disable_Centaurus_Power */
+} /* disable_Centaurus_Power */
/*****************************************************************************
* void Dorado_Disable_Power((void);
@@ -560,7 +561,7 @@ Dorado_Power_Down(void)
Dorado9211WriteReg(CS92xx_LCD_PWR_MAN, 0x0);
return;
-} /* disable_Centaurus_Power */
+} /* disable_Centaurus_Power */
void
Dorado_Save_Panel_State(void)
@@ -599,7 +600,7 @@ Dorado_Restore_Panel_State(void)
Dorado9211WriteReg(CS92xx_LCD_DITH_FR_CNTRL, cs9211_regs.dither_frc_ctrl);
Dorado9211WriteReg(CS92xx_BLUE_LSFR_SEED, cs9211_regs.blue_lsfr_seed);
Dorado9211WriteReg(CS92xx_RED_GREEN_LSFR_SEED,
- cs9211_regs.red_green_lsfr_seed);
+ cs9211_regs.red_green_lsfr_seed);
Dorado9211WriteReg(CS92xx_LCD_MEM_CNTRL, cs9211_regs.memory_control);
/* Set the power register last. This will turn the panel on at the 9211 */
diff --git a/src/panel/dora9211.h b/src/panel/dora9211.h
index d38b503..fd3a406 100644
--- a/src/panel/dora9211.h
+++ b/src/panel/dora9211.h
@@ -40,13 +40,13 @@
/* GPIO Pin Configuration Registers */
-#define DRD_GEODE_GPPIN_SEL 0x20 /* GPIO Pin Configuration Select */
-#define DRD_GEODE_GPPIN_CFG 0x24 /* GPIO Pin Configuration Access */
-#define DRD_GEODE_GPPIN_RESET 0x28 /* GPIO Pin Reset */
+#define DRD_GEODE_GPPIN_SEL 0x20 /* GPIO Pin Configuration Select */
+#define DRD_GEODE_GPPIN_CFG 0x24 /* GPIO Pin Configuration Access */
+#define DRD_GEODE_GPPIN_RESET 0x28 /* GPIO Pin Reset */
-#define DRD_GEODE_GPIO_BASE 0x6400 /* F0 GPIO, IO mapped */
-#define DRD_GEODE_GPDI0 0x04 /* GPIO Data In 0 */
-#define DRD_GEODE_GPDO0 0x00 /* GPIO Data Out 0 */
+#define DRD_GEODE_GPIO_BASE 0x6400 /* F0 GPIO, IO mapped */
+#define DRD_GEODE_GPDI0 0x04 /* GPIO Data In 0 */
+#define DRD_GEODE_GPDO0 0x00 /* GPIO Data Out 0 */
/* Data Ports in */
#define DRD_CLOCKP9211IN DRD_GEODE_GPIO_BASE + DRD_GEODE_GPDI0
@@ -61,11 +61,11 @@
#define DRD_CSP9211OUT DRD_GEODE_GPIO_BASE + DRD_GEODE_GPDO0
/* Pin MASKS */
-#define DRD_CLOCK9211 0x00000080 /* gpio 7, clock output to 9211 */
-#define DRD_DATAIN9211 0x00040000 /* gpio 18, data output to 9211 */
-#define DRD_DATAOUT9211 0x00000800 /* gpio 11, data input from 9211 */
-#define DRD_CS9211 0x00000200 /* gpio 9, chip select output to 9211
- * */
+#define DRD_CLOCK9211 0x00000080 /* gpio 7, clock output to 9211 */
+#define DRD_DATAIN9211 0x00040000 /* gpio 18, data output to 9211 */
+#define DRD_DATAOUT9211 0x00000800 /* gpio 11, data input from 9211 */
+#define DRD_CS9211 0x00000200 /* gpio 9, chip select output to 9211
+ * */
/* Gpio CFG values to select in */
#define DRD_CLOCK9211CFG 0x00000007 /* gpio 7 */
@@ -97,4 +97,4 @@ void Dorado_Save_Panel_State(void);
void Dorado_Restore_Panel_State(void);
void Dorado9211Init(Pnl_PanelStat * pstat);
-#endif /* !_DORA9211_h */
+#endif /* !_DORA9211_h */
diff --git a/src/panel/drac9210.c b/src/panel/drac9210.c
index ce8b4a0..4eb0a98 100644
--- a/src/panel/drac9210.c
+++ b/src/panel/drac9210.c
@@ -32,12 +32,12 @@
#include "drac9210.h"
-#define CS9210 0x40 /* Chip select pin */
+#define CS9210 0x40 /* Chip select pin */
/* 9210 on Draco */
-#define CLOCK9210 0x04 /* Clock pin */
-#define DATAIN9210 0x20 /* Data from 9210 */
-#define DATAOUT9210 0x80 /* Data to 9210 */
+#define CLOCK9210 0x04 /* Clock pin */
+#define DATAIN9210 0x20 /* Data from 9210 */
+#define DATAOUT9210 0x80 /* Data to 9210 */
static void DracoWriteData(unsigned char data);
static void DracoReadData(unsigned char *data);
@@ -393,13 +393,13 @@ Draco9210Init(Pnl_PanelStat * pstat)
Draco9210ToggleClock();
Draco9210ClearCS();
-#if defined(_WIN32) /* For Windows */
+#if defined(_WIN32) /* For Windows */
for (i = 0; i < 10; i++) {
_asm {
out 0ED h, al}
}
-#elif defined(linux) /* Linux */
+#elif defined(linux) /* Linux */
#endif
@@ -422,7 +422,8 @@ DracoWriteData(unsigned char data)
databit = data & mask;
if (data & mask) {
Draco9210SetDataOut();
- } else {
+ }
+ else {
Draco9210ClearDataOut();
}
mask >>= 1;
@@ -449,7 +450,7 @@ DracoReadData(unsigned char *data)
*data = tmp;
}
-#if defined(_WIN32) /* For Windows */
+#if defined(_WIN32) /* For Windows */
void
Draco9210GpioInit()
@@ -471,14 +472,11 @@ Draco9210SetCS()
Point to PCI address register mov dx, 0 CF8h;
55 XX GPIO data register mov eax, CX55x0_ID + 090 h out dx, eax;
Point to PCI data register (CFCh)
- mov dx, 0 CFCh
+mov dx, 0 CFCh
in ax, dx
and ah, 30 h
mov ah, c92DataReg
- or ah, CS9210 mov c92DataReg, ah out dx, ax popf}
-}
-
-void
+ or ah, CS9210 mov c92DataReg, ah out dx, ax popf}} void
Draco9210ClearCS()
{
_asm {
@@ -487,13 +485,10 @@ Draco9210ClearCS()
55 XX GPIO data register mov eax, CX55x0_ID + 090 h out dx, eax;
Point to PCI data register (CFCh)
mov dx, 0 CFCh;
- Set CS LOW
+Set CS LOW
in ax, dx
mov ah, c92DataReg
- and ah, NOT CS9210 mov c92DataReg, ah out dx, ax popf}
-}
-
-void
+ and ah, NOT CS9210 mov c92DataReg, ah out dx, ax popf}} void
Draco9210SetDataOut()
{
_asm {
@@ -502,30 +497,26 @@ Draco9210SetDataOut()
55 XX GPIO data register mov eax, CX55x0_ID + 090 h out dx, eax;
Point to PCI data register (CFCh)
mov dx, 0 CFCh;
- Set DATA HIGH
+Set DATA HIGH
in ax, dx
mov ah, c92DataReg
- or ah, DATAOUT9210 mov c92DataReg, ah out dx, ax popf}
-}
-
-void
+ or ah, DATAOUT9210 mov c92DataReg, ah out dx, ax popf}} void
Draco9210ClearDataOut()
{
_asm {
pushf;
Point to PCI address register
- mov dx, 0 CF8h mov eax, CX55x0_ID + 090 h;
+ mov dx, 0 CF8h mov eax, CX55x0_ID + 090 h;
+
;
55 XX GPIO data register out dx, eax;
Point to PCI data register (CFCh)
mov dx, 0 CFCh;
- Set Data LOW
+Set Data LOW
in ax, dx
mov ah, c92DataReg
- and ah, NOT DATAOUT9210 mov c92DataReg, ah out dx, ax popf}
-}
-
-unsigned char
+ and ah, NOT DATAOUT9210 mov c92DataReg, ah out dx, ax popf}}
+ unsigned char
Draco9210ReadDataIn()
{
unsigned char readdata;
@@ -538,8 +529,7 @@ Draco9210ReadDataIn()
mov dx, 0F Ch in ax, dx;
Preserve just Data IN bit and ah, DATAIN9210 mov al, ah cmp al, 0;
Is it LOW ? je readDataLow;
- must be HIGH mov al, 1 readDataLow:mov readdata, al popf}
- return (readdata);
+ must be HIGH mov al, 1 readDataLow:mov readdata, al popf} return (readdata);
}
void
@@ -552,45 +542,49 @@ Draco9210ToggleClock()
Point to PCI data register (CFCh)
out dx, eax mov dx, 0 CFCh;
SET CLOCK in ax, dx mov ah, c92DataReg or ah, CLOCK9210 mov c92DataReg, ah out dx, ax out 0ED h, al /* IOPAUSE */
- ;
+ ;
Point to PCI address register mov dx, 0 CF8h;
55 XX GPIO data register mov eax, CX55x0_ID + 090 h out dx, eax;
Point to PCI data register (CFCh)
mov dx, 0 CFCh;
;
- CLEAR CLOCK
+CLEAR CLOCK
in ax, dx
mov ah, c92DataReg
- and ah, NOT CLOCK9210 mov c92DataReg, ah out dx, ax popf}
-}
-
-#elif defined(linux) /* Linux */
+ and ah, NOT CLOCK9210 mov c92DataReg, ah out dx, ax popf}}
+#elif defined(linux) /* Linux */
void
Draco9210GpioInit()
{
}
+
void
Draco9210SetCS()
{
}
+
void
Draco9210ClearCS()
{
}
+
void
Draco9210SetDataOut()
{
}
+
void
Draco9210ClearDataOut()
{
}
+
unsigned char
Draco9210ReadDataIn()
{
}
+
void
Draco9210ToggleClock()
{
diff --git a/src/panel/drac9210.h b/src/panel/drac9210.h
index 1939fd6..5248579 100644
--- a/src/panel/drac9210.h
+++ b/src/panel/drac9210.h
@@ -36,6 +36,6 @@
#define _DRAC9210_h
#define CX55x0_ID 0x80009000
static unsigned char c92DataReg = 0;
-#endif /* !_DRAC9210_h */
+#endif /* !_DRAC9210_h */
/* END OF FILE */
diff --git a/src/panel/gx2_9211.c b/src/panel/gx2_9211.c
index 7d46b9c..b34a19d 100644
--- a/src/panel/gx2_9211.c
+++ b/src/panel/gx2_9211.c
@@ -34,13 +34,13 @@
#include "gx2_9211.h"
#include "pnl_defs.h"
-#if defined(_WIN32) /* windows */
+#if defined(_WIN32) /* windows */
#include "gfx_defs.h"
extern DEV_STATUS gfx_msr_read(unsigned int device, unsigned int msrRegister,
- Q_WORD * msrValue);
+ Q_WORD * msrValue);
extern DEV_STATUS gfx_msr_write(unsigned int device, unsigned int msrRegister,
- Q_WORD * msrValue);
+ Q_WORD * msrValue);
#endif
static unsigned long FPBaseAddr;
@@ -80,45 +80,45 @@ SetFPBaseAddr(unsigned long addr)
****************************************************************************/
void
protected_mode_access(unsigned long mode,
- unsigned long width, unsigned long addr, char *pdata)
+ unsigned long width, unsigned long addr, char *pdata)
{
- void *ptr = (void *)(FPBaseAddr + addr);
+ void *ptr = (void *) (FPBaseAddr + addr);
/* type specific buffer pointers */
- char *byte_data = (char *)pdata;
- unsigned long *word_data = (unsigned long *)pdata;
- unsigned long *dword_data = (unsigned long *)pdata;
+ char *byte_data = (char *) pdata;
+ unsigned long *word_data = (unsigned long *) pdata;
+ unsigned long *dword_data = (unsigned long *) pdata;
if (mode == GX2_READ) {
switch (width) {
case FOUR_BYTES:
- *(dword_data) = (unsigned long)(*(unsigned long *)ptr);
+ *(dword_data) = (unsigned long) (*(unsigned long *) ptr);
break;
case TWO_BYTES:
- *(word_data) = (unsigned long)(*(unsigned long *)ptr);
+ *(word_data) = (unsigned long) (*(unsigned long *) ptr);
break;
default:
- *(byte_data) = (char)(*(char *)ptr);
+ *(byte_data) = (char) (*(char *) ptr);
break;
}
- } /* end GX2_READ */
+ } /* end GX2_READ */
else if (mode == GX2_WRITE) {
switch (width) {
case FOUR_BYTES:
- *(unsigned long *)ptr = *dword_data;
+ *(unsigned long *) ptr = *dword_data;
break;
case TWO_BYTES:
- *(unsigned long *)ptr = *word_data;
+ *(unsigned long *) ptr = *word_data;
break;
default:
- *(char *)ptr = *byte_data;
+ *(char *) ptr = *byte_data;
break;
- } /* end switch(mode) */
+ } /* end switch(mode) */
}
/* end case GX2_WRITE */
return;
-} /* End of protected_mode_access. */
+} /* End of protected_mode_access. */
/*************************************************************************
* void write_video_reg64_low( unsigned long offset, unsigned long value )
@@ -132,8 +132,8 @@ void
write_video_reg64_low(unsigned long offset, unsigned long value)
{
protected_mode_access(GX2_WRITE, FOUR_BYTES,
- FPBaseAddr + offset, (char *)&value);
-} /*end write_video_reg64_low() */
+ FPBaseAddr + offset, (char *) &value);
+} /*end write_video_reg64_low() */
/*************************************************************************
* unsigned long read_video_reg64_low( unsigned long offset )
@@ -149,9 +149,9 @@ read_video_reg64_low(unsigned long offset)
unsigned long data;
protected_mode_access(GX2_READ, FOUR_BYTES,
- FPBaseAddr + offset, (char *)&data);
+ FPBaseAddr + offset, (char *) &data);
return (data);
-} /*end read_video_reg64_low() */
+} /*end read_video_reg64_low() */
/*****************************************************************************
* void Redcloud_fp_reg(int mode, unsigned long address, unsigned long *data)
@@ -174,11 +174,12 @@ Redcloud_fp_reg(int mode, unsigned long address, unsigned long *data)
{
if (mode == GX2_READ) {
*data = read_video_reg64_low(address);
- } else {
+ }
+ else {
write_video_reg64_low(address, *data);
}
-} /* End of Redcloud_fp_reg() */
+} /* End of Redcloud_fp_reg() */
/*-------------------------------------------------------------------
*
@@ -200,7 +201,8 @@ set_Redcloud_92xx_mode_params(int mode)
msrValue.low &= ~GX2_VP_PAD_SELECT_MASK;
if (pMode->panel_type == PNL_TFT || pMode->panel_type == PNL_TWOP) {
msrValue.low = GX2_VP_PAD_SELECT_TFT;
- } else {
+ }
+ else {
msrValue.low = GX2_VP_PAD_SELECT_DSTN;
}
gfx_msr_write(RC_ID_DF, GX2_VP_MSR_PAD_SELECT, &msrValue);
@@ -208,17 +210,17 @@ set_Redcloud_92xx_mode_params(int mode)
/* Turn the 92xx power off before setting any new parameters. */
temp_data = pMode->power_management & ~GX2_FP_PM_PWR_ON;
- Redcloud_fp_reg(GX2_WRITE, GX2_FP_PWR_MAN, (unsigned long *)&temp_data);
+ Redcloud_fp_reg(GX2_WRITE, GX2_FP_PWR_MAN, (unsigned long *) &temp_data);
/* Set 9211 registers using the desired panel settings */
Redcloud_fp_reg(GX2_WRITE, GX2_FP_PAN_TIMING1,
- (unsigned long *)&pMode->panel_timing1);
+ (unsigned long *) &pMode->panel_timing1);
/* On Redcloud, bit 31 is now reserved. */
temp_data = pMode->panel_timing2 & 0x7FFFFFFF;
Redcloud_fp_reg(GX2_WRITE, GX2_FP_PAN_TIMING2,
- (unsigned long *)&temp_data);
+ (unsigned long *) &temp_data);
/* On Redcloud TFT parts, set this to 0x70 so all 8 bits per color run
* thru fp crc but only non-TFT parts. Otherwise, set it to be 0x50.
@@ -226,30 +228,31 @@ set_Redcloud_92xx_mode_params(int mode)
*/
if (pMode->panel_type == PNL_TFT || pMode->panel_type == PNL_TWOP) {
temp_data = GX2_FP_CRC_PASS_THRU_MASK;
- } else {
+ }
+ else {
temp_data = pMode->rev_C_dither_frc;
}
Redcloud_fp_reg(GX2_WRITE, GX2_FP_DITH_FR_CNTRL,
- (unsigned long *)&temp_data);
+ (unsigned long *) &temp_data);
Redcloud_fp_reg(GX2_WRITE, GX2_FP_BLFSR,
- (unsigned long *)&pMode->blue_lsfr_seed);
+ (unsigned long *) &pMode->blue_lsfr_seed);
Redcloud_fp_reg(GX2_WRITE, GX2_FP_RLFSR,
- (unsigned long *)&pMode->red_green_lsfr_seed);
+ (unsigned long *) &pMode->red_green_lsfr_seed);
/* Set the memory information, then the power register last.
* This will turn the panel on at the 9211.
*/
- Redcloud_fp_reg(GX2_READ, GX2_FP_FBB, (unsigned long *)&base_data);
+ Redcloud_fp_reg(GX2_READ, GX2_FP_FBB, (unsigned long *) &base_data);
if (base_data != 0x41780000) {
base_data = 0x41780000;
- Redcloud_fp_reg(GX2_WRITE, GX2_FP_FBB, (unsigned long *)&base_data);
+ Redcloud_fp_reg(GX2_WRITE, GX2_FP_FBB, (unsigned long *) &base_data);
}
Redcloud_fp_reg(GX2_WRITE, GX2_FP_PWR_MAN,
- (unsigned long *)&pMode->power_management);
+ (unsigned long *) &pMode->power_management);
-} /*end set_92xx_mode_params() */
+} /*end set_92xx_mode_params() */
/* -----------------------------------------------------------------------
* SET_FLAT_PANEL_MODE
@@ -277,11 +280,11 @@ set_Redcloud_92xx_mode(Pnl_PanelStat * pstat)
/* SET THE 92xx FOR THE SELECTED MODE */
set_Redcloud_92xx_mode_params(mode);
return TRUE;
- } /* end if() */
- } /* end for() */
+ } /* end if() */
+ } /* end for() */
return FALSE;
-} /* end set_Centaurus_92xx_mode() */
+} /* end set_Centaurus_92xx_mode() */
void
Redcloud_9211init(Pnl_PanelStat * pstat)
diff --git a/src/panel/gx2_9211.h b/src/panel/gx2_9211.h
index 071b3fb..ef6372c 100644
--- a/src/panel/gx2_9211.h
+++ b/src/panel/gx2_9211.h
@@ -45,20 +45,20 @@
*/
#define GX2_FP_LCD_OFFSET 0x00000400
-#define CS9211_REDCLOUD 0x0400 /* Moved 9211 Rev C3 up to next major
- * no. */
-#define GX2_FP_PAN_TIMING1 0x0400 /* FP timings 1 */
-#define GX2_FP_PAN_TIMING2 0x0408 /* FP timings 2 */
-#define GX2_FP_PWR_MAN 0x0410 /* FP power management */
-#define GX2_FP_DITH_FR_CNTRL 0x0418 /* FP dither and frame rate */
-#define GX2_FP_BLFSR 0x0420 /* Blue LFSR seed */
-#define GX2_FP_RLFSR 0x0428 /* Red and Green LFSR seed */
-#define GX2_FP_FMI 0x0430 /* FRM Memory Index */
-#define GX2_FP_FMD 0x0438 /* FRM Memory Data */
-#define GX2_FP_DCA 0x0448 /* Dither ram control and address */
-#define GX2_FP_DMD 0x0450 /* Dither memory data */
-#define GX2_FP_PAN_CRC_SIG 0x0458 /* FP CRC signature */
-#define GX2_FP_FBB 0x0460 /* Frame Buffer Base Address */
+#define CS9211_REDCLOUD 0x0400 /* Moved 9211 Rev C3 up to next major
+ * no. */
+#define GX2_FP_PAN_TIMING1 0x0400 /* FP timings 1 */
+#define GX2_FP_PAN_TIMING2 0x0408 /* FP timings 2 */
+#define GX2_FP_PWR_MAN 0x0410 /* FP power management */
+#define GX2_FP_DITH_FR_CNTRL 0x0418 /* FP dither and frame rate */
+#define GX2_FP_BLFSR 0x0420 /* Blue LFSR seed */
+#define GX2_FP_RLFSR 0x0428 /* Red and Green LFSR seed */
+#define GX2_FP_FMI 0x0430 /* FRM Memory Index */
+#define GX2_FP_FMD 0x0438 /* FRM Memory Data */
+#define GX2_FP_DCA 0x0448 /* Dither ram control and address */
+#define GX2_FP_DMD 0x0450 /* Dither memory data */
+#define GX2_FP_PAN_CRC_SIG 0x0458 /* FP CRC signature */
+#define GX2_FP_FBB 0x0460 /* Frame Buffer Base Address */
/* GX2_FP_PAN_TIMING2 bits */
@@ -107,7 +107,8 @@
void SetFPBaseAddr(unsigned long);
void Redcloud_9211init(Pnl_PanelStat *);
void protected_mode_access(unsigned long mode,
- unsigned long width, unsigned long addr, char *pdata);
+ unsigned long width, unsigned long addr,
+ char *pdata);
void write_video_reg64_low(unsigned long offset, unsigned long value);
unsigned long read_video_reg64_low(unsigned long offset);
void Redcloud_fp_reg(int mode, unsigned long address, unsigned long *data);
diff --git a/src/panel/panel.c b/src/panel/panel.c
index ffd54c9..f7b55f0 100644
--- a/src/panel/panel.c
+++ b/src/panel/panel.c
@@ -30,7 +30,7 @@
* SubModule: Geode FlatPanel library
* */
-#if defined(linux) /* Linux */
+#if defined(linux) /* Linux */
#ifdef __KERNEL__
@@ -43,8 +43,8 @@
#include <linux/fs.h>
#include <asm/mman.h>
-#endif /* __KERNEL__ */
-#elif defined(_WIN32) /* windows */
+#endif /* __KERNEL__ */
+#elif defined(_WIN32) /* windows */
#include <windows.h>
diff --git a/src/panel/panel.h b/src/panel/panel.h
index bc708df..93380f0 100644
--- a/src/panel/panel.h
+++ b/src/panel/panel.h
@@ -38,8 +38,7 @@
#include "pnl_defs.h"
#ifdef __cplusplus
-extern "C"
-{
+extern "C" {
#endif
/* CLOSE BRACKET FOR C++ COMPLILATION */
@@ -63,7 +62,7 @@ extern "C"
void Pnl_GetPanelInfoFromBIOS(int *xres, int *yres, int *bpp, int *hz);
/* from durango */
-#if defined(_WIN32) /* windows */
+#if defined(_WIN32) /* windows */
extern void gfx_delay_milliseconds(unsigned long milliseconds);
extern unsigned long gfx_ind(unsigned short port);
extern void gfx_outd(unsigned short port, unsigned long data);
@@ -74,7 +73,5 @@ extern "C"
#ifdef __cplusplus
}
#endif
-
-#endif /* !_panel_h */
-
+#endif /* !_panel_h */
/* END OF FILE */
diff --git a/src/panel/platform.c b/src/panel/platform.c
index 46bb71b..3e5afe3 100644
--- a/src/panel/platform.c
+++ b/src/panel/platform.c
@@ -30,7 +30,6 @@
* SubModule: Geode FlatPanel library
* */
-
#define LINUX_ROM_SEGMENT 0x000F
#define SEGMENT_LENGTH 0xFFFF
#define PAGE_LENGTH 0x1000
@@ -38,12 +37,10 @@
#define PLT_UNKNOWN 0xFFFF
-typedef struct
-{
+typedef struct {
char sys_board_name[SYS_BOARD_NAME_LEN];
SYS_BOARD sys_board;
-}
-SYS_BOARD_INFO;
+} SYS_BOARD_INFO;
static SYS_BOARD_INFO Sys_info;
@@ -93,7 +90,8 @@ Strncmp(char *str1, char *str2, int len)
for (i = 0; i < len; i++) {
if (*(str1 + i) > *(str2 + i)) {
return 1;
- } else if (*(str1 + i) < *(str2 + i)) {
+ }
+ else if (*(str1 + i) < *(str2 + i)) {
return -1;
}
}
@@ -110,7 +108,7 @@ Strcpy(char *dst, char *src)
for (i = 0; src[i] != 0x0; i++) {
dst[i] = src[i];
}
- dst[i] = 0x0; /* NULL termination */
+ dst[i] = 0x0; /* NULL termination */
return dst;
}
@@ -121,7 +119,7 @@ Strlen(char *str)
if (str == 0x0)
return 0;
- for (i = 0; str[i] != 0x0; i++) ;
+ for (i = 0; str[i] != 0x0; i++);
return i;
}
@@ -141,13 +139,13 @@ FindStringInSeg(unsigned int segment_address, char *string_ptr)
{
int string_length = Strlen(string_ptr);
char *psegment_buf;
- unsigned long mem_ptr = (unsigned long)segment_address << 16;
+ unsigned long mem_ptr = (unsigned long) segment_address << 16;
unsigned int i;
/* silence compiler */
- (void)mem_ptr;
+ (void) mem_ptr;
- psegment_buf = (char *)XpressROMPtr;
+ psegment_buf = (char *) XpressROMPtr;
/* Now search for the first character of the string_ptr */
for (i = 0; i < SEGMENT_LENGTH + 1; i++) {
@@ -166,7 +164,7 @@ FindStringInSeg(unsigned int segment_address, char *string_ptr)
/* if we got this far we didn't find anything. Return NULL. */
return (0);
-} /* end FindStringInSeg() */
+} /* end FindStringInSeg() */
/**********************************************************************
@@ -185,7 +183,7 @@ FindStringInSeg(unsigned int segment_address, char *string_ptr)
*/
static unsigned char
get_sys_board_type(SYS_BOARD_INFO * sys_info,
- SYS_BOARD_INFO * sys_board_array_base)
+ SYS_BOARD_INFO * sys_board_array_base)
{
int index;
char *xpress_rom_string_ptr = "XpressStart";
@@ -201,27 +199,28 @@ get_sys_board_type(SYS_BOARD_INFO * sys_info,
sys_info->sys_board = PLT_UNKNOWN;
Strcpy(sys_info->sys_board_name, "Unknown");
return (FALSE);
- } else {
+ }
+ else {
/* we have Xpressrom, so look for a board */
for (index = 0; index < Num_sys_board_type; index++) {
if (!FindStringInSeg(segment, (sys_board_array_base +
- index)->sys_board_name)) {
+ index)->sys_board_name)) {
continue;
- } else {
+ }
+ else {
/* a match!! */
- sys_info->sys_board =
- (sys_board_array_base + index)->sys_board;
+ sys_info->sys_board = (sys_board_array_base + index)->sys_board;
Strcpy(sys_info->sys_board_name,
- (sys_board_array_base + index)->sys_board_name);
+ (sys_board_array_base + index)->sys_board_name);
return (TRUE);
}
- } /* end for() */
- } /* end else */
+ } /* end for() */
+ } /* end else */
/* if we are here we have failed */
sys_info->sys_board = PLT_UNKNOWN;
Strcpy(sys_info->sys_board_name, "Unknown");
return (FALSE);
-} /* end get_sys_board_type() */
+} /* end get_sys_board_type() */
diff --git a/src/panel/pnl_bios.c b/src/panel/pnl_bios.c
index 9e3c1fe..56b13b9 100644
--- a/src/panel/pnl_bios.c
+++ b/src/panel/pnl_bios.c
@@ -32,7 +32,7 @@
#include "panel.h"
-#if defined(_WIN32) /* windows */
+#if defined(_WIN32) /* windows */
extern unsigned long gfx_cpu_version;
extern void gfx_outw(unsigned short port, unsigned short data);
extern unsigned short gfx_inw(unsigned short port);
@@ -47,63 +47,63 @@ extern unsigned short gfx_inw(unsigned short port);
#define VR_INDEX 0xAC1C
#define VR_DATA 0xAC1E
#define VR_UNLOCK 0xFC53
-#define VRC_VG 0x0002 /* SoftVG Virtual Register Class */
-#define VG_MEM_SIZE 0x0000 /* MemSize Virtual Register */
+#define VRC_VG 0x0002 /* SoftVG Virtual Register Class */
+#define VG_MEM_SIZE 0x0000 /* MemSize Virtual Register */
#define FP_DETECT_MASK 0x8000
-#define VG_FP_TYPE 0x0002 /* Flat Panel Info Virtual Register */
+#define VG_FP_TYPE 0x0002 /* Flat Panel Info Virtual Register */
-#define FP_DEV_MASK 0x0003 /* Flat Panel type */
-#define FP_TYPE_SSTN 0x0000 /* SSTN panel type value */
-#define FP_TYPE_DSTN 0x0001 /* DSTN panel type value */
-#define FP_TYPE_TFT 0x0002 /* TFT panel type value */
-#define FP_TYPE_LVDS 0x0003 /* LVDS panel type value */
+#define FP_DEV_MASK 0x0003 /* Flat Panel type */
+#define FP_TYPE_SSTN 0x0000 /* SSTN panel type value */
+#define FP_TYPE_DSTN 0x0001 /* DSTN panel type value */
+#define FP_TYPE_TFT 0x0002 /* TFT panel type value */
+#define FP_TYPE_LVDS 0x0003 /* LVDS panel type value */
#define FP_RESOLUTION_MASK 0x0038
-#define FP_RES_6X4 0x0000 /* 640x480 resolution value */
-#define FP_RES_8X6 0x0008 /* 800x600 resolution value */
-#define FP_RES_10X7 0x0010 /* 1024x768 resolution value */
-#define FP_RES_11X8 0x0018 /* 1152x864 resolution value */
-#define FP_RES_12X10 0x0020 /* 1280x1024 resolution value */
-#define FP_RES_16X12 0x0028 /* 1600x1200 resolution value */
+#define FP_RES_6X4 0x0000 /* 640x480 resolution value */
+#define FP_RES_8X6 0x0008 /* 800x600 resolution value */
+#define FP_RES_10X7 0x0010 /* 1024x768 resolution value */
+#define FP_RES_11X8 0x0018 /* 1152x864 resolution value */
+#define FP_RES_12X10 0x0020 /* 1280x1024 resolution value */
+#define FP_RES_16X12 0x0028 /* 1600x1200 resolution value */
#define FP_WIDTH_MASK 0x01C0
-#define FP_WIDTH_8 0x0000 /* 8 bit data bus width */
-#define FP_WIDTH_9 0x0040 /* 9 bit data bus width */
-#define FP_WIDTH_12 0x0080 /* 12 bit data bus width */
-#define FP_WIDTH_18 0x00C0 /* 18 bit data bus width */
-#define FP_WIDTH_24 0x0100 /* 24 bit data bus width */
-#define FP_WIDTH_16 0x0140 /* 16 bit data bus width - 16 bit
- * Mono DSTN only */
+#define FP_WIDTH_8 0x0000 /* 8 bit data bus width */
+#define FP_WIDTH_9 0x0040 /* 9 bit data bus width */
+#define FP_WIDTH_12 0x0080 /* 12 bit data bus width */
+#define FP_WIDTH_18 0x00C0 /* 18 bit data bus width */
+#define FP_WIDTH_24 0x0100 /* 24 bit data bus width */
+#define FP_WIDTH_16 0x0140 /* 16 bit data bus width - 16 bit
+ * Mono DSTN only */
#define FP_COLOR_MASK 0x0200
-#define FP_COLOR_COLOR 0x0000 /* Color panel */
-#define FP_COLOR_MONO 0x0200 /* Mono Panel */
+#define FP_COLOR_COLOR 0x0000 /* Color panel */
+#define FP_COLOR_MONO 0x0200 /* Mono Panel */
#define FP_PPC_MASK 0x0400
-#define FP_PPC_1PPC 0x0000 /* One pixel per clock */
-#define FP_PPC_2PPC 0x0400 /* Two pixels per clock */
+#define FP_PPC_1PPC 0x0000 /* One pixel per clock */
+#define FP_PPC_2PPC 0x0400 /* Two pixels per clock */
#define FP_HPOL_MASK 0x0800
-#define FP_H_POL_LGH 0x0000 /* HSync at panel, normally low,
- * active high */
-#define FP_H_POL_HGL 0x0800 /* HSync at panel, normally high,
- * active low */
+#define FP_H_POL_LGH 0x0000 /* HSync at panel, normally low,
+ * active high */
+#define FP_H_POL_HGL 0x0800 /* HSync at panel, normally high,
+ * active low */
#define FP_VPOL_MASK 0x1000
-#define FP_V_POL_LGH 0x0000 /* VSync at panel, normally low,
- * active high */
-#define FP_V_POL_HGL 0x1000 /* VSync at panel, normally high,
- * active low */
+#define FP_V_POL_LGH 0x0000 /* VSync at panel, normally low,
+ * active high */
+#define FP_V_POL_HGL 0x1000 /* VSync at panel, normally high,
+ * active low */
#define FP_REF_MASK 0xE000
-#define FP_REF_60 0x0000 /* 60Hz refresh rate */
-#define FP_REF_70 0x2000 /* 70Hz refresh rate */
-#define FP_REF_72 0x4000 /* 72Hz refresh rate */
-#define FP_REF_75 0x6000 /* 75Hz refresh rate */
-#define FP_REF_85 0x8000 /* 85Hz refresh rate */
-#define FP_REF_90 0xA000 /* 90Hz refresh rate */
-#define FP_REF_100 0xC000 /* 100Hz refresh rate */
+#define FP_REF_60 0x0000 /* 60Hz refresh rate */
+#define FP_REF_70 0x2000 /* 70Hz refresh rate */
+#define FP_REF_72 0x4000 /* 72Hz refresh rate */
+#define FP_REF_75 0x6000 /* 75Hz refresh rate */
+#define FP_REF_85 0x8000 /* 85Hz refresh rate */
+#define FP_REF_90 0xA000 /* 90Hz refresh rate */
+#define FP_REF_100 0xC000 /* 100Hz refresh rate */
/*-----------------------------------------------------------------
* Pnl_IsPanelEnabledInBIOS
@@ -126,7 +126,8 @@ Pnl_IsPanelEnabledInBIOS(void)
data = gfx_inw(VR_DATA);
if (data & FP_DETECT_MASK)
ret = 1;
- } else {
+ }
+ else {
unsigned short crtcindex, crtcdata;
crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
@@ -134,7 +135,7 @@ Pnl_IsPanelEnabledInBIOS(void)
/* CHECK DisplayEnable Reg in SoftVGA */
- gfx_outb(crtcindex, (unsigned char)SOFTVGA_DISPLAY_ENABLE);
+ gfx_outb(crtcindex, (unsigned char) SOFTVGA_DISPLAY_ENABLE);
ret = gfx_inb(crtcdata);
}
@@ -235,13 +236,14 @@ Pnl_GetPanelInfoFromBIOS(int *xres, int *yres, int *bpp, int *hz)
break;
}
- } else {
+ }
+ else {
crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
crtcdata = crtcindex + 1;
/* CHECK FPResolution Reg in SoftVGA */
- gfx_outb(crtcindex, (unsigned char)SOFTVGA_FPRESOLUTION);
+ gfx_outb(crtcindex, (unsigned char) SOFTVGA_FPRESOLUTION);
ret = gfx_inb(crtcdata);
switch (ret & 0x3) {
@@ -276,7 +278,7 @@ Pnl_GetPanelInfoFromBIOS(int *xres, int *yres, int *bpp, int *hz)
/* CHECK FPClockFrequency Reg in SoftVGA */
- gfx_outb(crtcindex, (unsigned char)SOFTVGA_FPCLOCKFREQUENCY);
+ gfx_outb(crtcindex, (unsigned char) SOFTVGA_FPCLOCKFREQUENCY);
*hz = gfx_inb(crtcdata);
}
}
diff --git a/src/panel/pnl_defs.h b/src/panel/pnl_defs.h
index 447a944..083d5af 100644
--- a/src/panel/pnl_defs.h
+++ b/src/panel/pnl_defs.h
@@ -33,8 +33,7 @@
#ifndef _pnl_defs_h
#define _pnl_defs_h
-typedef enum
-{
+typedef enum {
MARMOT_PLATFORM = 0,
UNICORN_PLATFORM,
CENTAURUS_PLATFORM,
@@ -45,8 +44,7 @@ typedef enum
DRACO_PLATFORM,
REDCLOUD_PLATFORM,
OTHER_PLATFORM
-}
-SYS_BOARD;
+} SYS_BOARD;
#define PNL_9210 0x01
#define PNL_9211_A 0x02
@@ -70,26 +68,22 @@ SYS_BOARD;
#define PNL_OVERRIDE_STAT 0x10
#define PNL_OVERRIDE_ALL 0x1F
-typedef struct _Pnl_PanelStat_
-{
+typedef struct _Pnl_PanelStat_ {
int Type;
int XRes;
int YRes;
int Depth;
int MonoColor;
-}
-Pnl_PanelStat;
+} Pnl_PanelStat;
-typedef struct _Pnl_Params_
-{
+typedef struct _Pnl_Params_ {
unsigned long Flags;
int PanelPresent;
int Platform;
int PanelChip;
Pnl_PanelStat PanelStat;
-}
-Pnl_PanelParams, *PPnl_PanelParams;
+} Pnl_PanelParams, *PPnl_PanelParams;
-#endif /* _pnl_defs_h */
+#endif /* _pnl_defs_h */
/* END OF FILE */
diff --git a/src/panel/pnl_init.c b/src/panel/pnl_init.c
index 39b932e..3c58014 100644
--- a/src/panel/pnl_init.c
+++ b/src/panel/pnl_init.c
@@ -221,7 +221,8 @@ Pnl_PowerUp(void)
dcfg |= (CS5530_DCFG_FP_PWR_EN | CS5530_DCFG_FP_DATA_EN);
/* Enable the flatpanel power and data */
WRITE_VID32(CS5530_DISPLAY_CONFIG, dcfg);
- } else if (hw_video == GFX_VID_SC1200) {
+ }
+ else if (hw_video == GFX_VID_SC1200) {
/* READ DISPLAY CONFIG FROM SC1200 */
dcfg = READ_VID32(SC1200_DISPLAY_CONFIG);
@@ -229,7 +230,8 @@ Pnl_PowerUp(void)
dcfg |= (SC1200_DCFG_FP_PWR_EN | SC1200_DCFG_FP_DATA_EN);
/* Enable the flatpanel power and data */
WRITE_VID32(SC1200_DISPLAY_CONFIG, dcfg);
- } else if (hw_video == GFX_VID_REDCLOUD) {
+ }
+ else if (hw_video == GFX_VID_REDCLOUD) {
/* READ DISPLAY CONFIG FROM REDCLOUD */
dcfg = READ_VID32(RCDF_DISPLAY_CONFIG);
@@ -287,7 +289,8 @@ Pnl_PowerDown(void)
dcfg &= ~(CS5530_DCFG_FP_PWR_EN | CS5530_DCFG_FP_DATA_EN);
/* Disable the flatpanel power and data */
WRITE_VID32(CS5530_DISPLAY_CONFIG, dcfg);
- } else if (hw_video == GFX_VID_SC1200) {
+ }
+ else if (hw_video == GFX_VID_SC1200) {
/* READ DISPLAY CONFIG FROM SC1200 */
dcfg = READ_VID32(SC1200_DISPLAY_CONFIG);
@@ -295,7 +298,8 @@ Pnl_PowerDown(void)
dcfg &= ~(SC1200_DCFG_FP_PWR_EN | SC1200_DCFG_FP_DATA_EN);
/* Disable the flatpanel power and data */
WRITE_VID32(SC1200_DISPLAY_CONFIG, dcfg);
- } else if (hw_video == GFX_VID_REDCLOUD) {
+ }
+ else if (hw_video == GFX_VID_REDCLOUD) {
/* READ DISPLAY CONFIG FROM REDCLOUD */
dcfg = READ_VID32(RCDF_DISPLAY_CONFIG);
@@ -488,16 +492,17 @@ Pnl_InitPanel(Pnl_PanelParams * pParam)
{
Pnl_PanelParams *pPtr;
- if (pParam == 0x0) /* NULL use the static table */
+ if (pParam == 0x0) /* NULL use the static table */
pPtr = &sPanelParam;
else
pPtr = pParam;
if (!pPtr->PanelPresent) {
- return -1; /* error */
- } else {
+ return -1; /* error */
+ }
+ else {
if ((pPtr->PanelChip < 0) || (pPtr->Platform < 0))
- return -1; /* error */
+ return -1; /* error */
#if PLATFORM_DRACO
/* check we are init. the right one */
@@ -526,6 +531,6 @@ Pnl_InitPanel(Pnl_PanelParams * pParam)
Redcloud_9211init(&(pPtr->PanelStat));
}
#endif
- } /* else end */
+ } /* else end */
return 1;
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-21 17:38:05 +0000