Merge remote-tracking branch 'fdo/master' into v1.6-branchbxt-alpha-rc1bxt-alpha

Conflicts:
	configure.ac
	src/gen9_mfd.c
	src/gen9_mfd.h
	src/i965_device_info.c
	src/i965_drv_video.c
	src/i965_drv_video.h
	src/intel_media_common.c

12 files changed, 595 insertions, 141 deletions

diff --git a/configure.ac b/configure.ac
index 6ba8a5b..a8d017b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1,8 +1,8 @@
 # intel-driver package version number
 m4_define([intel_driver_major_version], [1])
 m4_define([intel_driver_minor_version], [6])
-m4_define([intel_driver_micro_version], [2])
-m4_define([intel_driver_pre_version],   [0])
+m4_define([intel_driver_micro_version], [3])
+m4_define([intel_driver_pre_version],   [1])
 m4_define([intel_driver_version],
           [intel_driver_major_version.intel_driver_minor_version.intel_driver_micro_version])
 m4_if(intel_driver_pre_version, [0], [], [
diff --git a/src/gen75_picture_process.c b/src/gen75_picture_process.c
index ed50532..802452b 100644
--- a/src/gen75_picture_process.c
+++ b/src/gen75_picture_process.c
@@ -28,6 +28,7 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <assert.h>
+#include <string.h>
 
 #include "intel_batchbuffer.h"
 #include "intel_driver.h"
@@ -123,6 +124,15 @@ gen75_proc_picture(VADriverContextP ctx,
              (VAProcPipelineParameterBuffer *)proc_st->pipeline_param->buffer;
     struct object_surface *obj_dst_surf = NULL;
     struct object_surface *obj_src_surf = NULL;
+
+    VAProcPipelineParameterBuffer pipeline_param2;
+    struct object_surface *stage1_dst_surf = NULL;
+    struct object_surface *stage2_dst_surf = NULL;
+    VARectangle src_rect, dst_rect;
+    VASurfaceID tmp_surfaces[2];
+    VASurfaceID out_surface_id1 = VA_INVALID_ID, out_surface_id2 = VA_INVALID_ID;
+    int num_tmp_surfaces = 0;
+
     VAStatus status;
 
     proc_ctx->pipeline_param = pipeline_param;
@@ -168,69 +178,221 @@ gen75_proc_picture(VADriverContextP ctx,
     proc_ctx->surface_pipeline_input_object = obj_src_surf;
     assert(pipeline_param->num_filters <= 4);
 
+    int vpp_stage1 = 0, vpp_stage2 = 1, vpp_stage3 = 0;
+
+    if (pipeline_param->surface_region) {
+        src_rect.x = pipeline_param->surface_region->x;
+        src_rect.y = pipeline_param->surface_region->y;
+        src_rect.width = pipeline_param->surface_region->width;
+        src_rect.height = pipeline_param->surface_region->height;
+    } else {
+        src_rect.x = 0;
+        src_rect.y = 0;
+        src_rect.width = obj_src_surf->orig_width;
+        src_rect.height = obj_src_surf->orig_height;
+    }
+
+    if (pipeline_param->output_region) {
+        dst_rect.x = pipeline_param->output_region->x;
+        dst_rect.y = pipeline_param->output_region->y;
+        dst_rect.width = pipeline_param->output_region->width;
+        dst_rect.height = pipeline_param->output_region->height;
+    } else {
+        dst_rect.x = 0;
+        dst_rect.y = 0;
+        dst_rect.width = obj_dst_surf->orig_width;
+        dst_rect.height = obj_dst_surf->orig_height;
+    }
+
+    if(obj_src_surf->fourcc == VA_FOURCC_P010) {
+        vpp_stage1 = 1;
+        vpp_stage2 = 0;
+        vpp_stage3 = 0;
+        if(pipeline_param->num_filters == 0 || pipeline_param->filters == NULL) {
+            if(src_rect.x != dst_rect.x ||
+                src_rect.y != dst_rect.y ||
+                src_rect.width != dst_rect.width ||
+                src_rect.height != dst_rect.height)
+              vpp_stage2 = 1;
+
+            if(obj_dst_surf->fourcc != VA_FOURCC_NV12 &&
+                obj_dst_surf->fourcc != VA_FOURCC_P010)
+              vpp_stage2 = 1;
+        }
+        else
+          vpp_stage2 = 1;
+
+        if(vpp_stage2 == 1) {
+          if(obj_dst_surf->fourcc == VA_FOURCC_P010)
+            vpp_stage3 = 1;
+        }
+    }
+    else if(obj_dst_surf->fourcc == VA_FOURCC_P010) {
+        vpp_stage2 = 1;
+        vpp_stage3 = 1;
+
+        if((obj_src_surf->fourcc == VA_FOURCC_NV12) &&
+            (pipeline_param->num_filters == 0 || pipeline_param->filters == NULL)) {
+            if((src_rect.x == dst_rect.x) &&
+                (src_rect.y == dst_rect.y) &&
+                (src_rect.width == dst_rect.width) &&
+                (src_rect.height == dst_rect.height))
+                vpp_stage2 = 0;
+        }
+    }
+
+    if(vpp_stage1 == 1){
+        memset((void *)&pipeline_param2, 0, sizeof(pipeline_param2));
+        pipeline_param2.surface = pipeline_param->surface;
+        pipeline_param2.surface_region = &src_rect;
+        pipeline_param2.output_region = &src_rect;
+        pipeline_param2.filter_flags = 0;
+        pipeline_param2.num_filters  = 0;
+
+        proc_ctx->pipeline_param = &pipeline_param2;
+
+        if(vpp_stage2 == 1) {
+            status = i965_CreateSurfaces(ctx,
+                                         obj_src_surf->orig_width,
+                                         obj_src_surf->orig_height,
+                                         VA_RT_FORMAT_YUV420,
+                                         1,
+                                         &out_surface_id1);
+            assert(status == VA_STATUS_SUCCESS);
+            tmp_surfaces[num_tmp_surfaces++] = out_surface_id1;
+            stage1_dst_surf = SURFACE(out_surface_id1);
+            assert(stage1_dst_surf);
+            i965_check_alloc_surface_bo(ctx, stage1_dst_surf, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420);
+
+            proc_ctx->surface_render_output_object = stage1_dst_surf;
+        }
+
+        gen75_vpp_vebox(ctx, proc_ctx);
+    }
+
+    if((vpp_stage3 == 1) && (vpp_stage2 == 1)) {
+        status = i965_CreateSurfaces(ctx,
+                                     obj_dst_surf->orig_width,
+                                     obj_dst_surf->orig_height,
+                                     VA_RT_FORMAT_YUV420,
+                                     1,
+                                     &out_surface_id2);
+        assert(status == VA_STATUS_SUCCESS);
+        tmp_surfaces[num_tmp_surfaces++] = out_surface_id2;
+        stage2_dst_surf = SURFACE(out_surface_id2);
+        assert(stage2_dst_surf);
+        i965_check_alloc_surface_bo(ctx, stage2_dst_surf, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420);
+    }
+
     VABufferID *filter_id = (VABufferID*) pipeline_param->filters;
- 
-    if(pipeline_param->num_filters == 0 || pipeline_param->filters == NULL ){
-        /* implicity surface format coversion and scaling */
-        gen75_vpp_fmt_cvt(ctx, profile, codec_state, hw_context);
-    }else if(pipeline_param->num_filters == 1) {
-       struct object_buffer * obj_buf = BUFFER((*filter_id) + 0);
-
-       assert(obj_buf && obj_buf->buffer_store && obj_buf->buffer_store->buffer);
-       
-       if (!obj_buf ||
-           !obj_buf->buffer_store ||
-           !obj_buf->buffer_store->buffer) {
-           status = VA_STATUS_ERROR_INVALID_FILTER_CHAIN;
-           goto error;
-       }
-
-       VAProcFilterParameterBuffer* filter =
-           (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer;
-
-       if (filter->type == VAProcFilterNoiseReduction         ||
-           filter->type == VAProcFilterDeinterlacing          ||
-           filter->type == VAProcFilterSkinToneEnhancement    ||
-           filter->type == VAProcFilterColorBalance){
-           gen75_vpp_vebox(ctx, proc_ctx);
-       }else if(filter->type == VAProcFilterSharpening){
-           if (obj_src_surf->fourcc != VA_FOURCC_NV12 ||
-               obj_dst_surf->fourcc != VA_FOURCC_NV12) {
-               status = VA_STATUS_ERROR_UNIMPLEMENTED;
+
+    if(vpp_stage2 == 1) {
+        if(stage1_dst_surf != NULL) {
+            proc_ctx->surface_pipeline_input_object = stage1_dst_surf;
+            proc_ctx->surface_render_output_object = obj_dst_surf;
+
+            pipeline_param->surface = out_surface_id1;
+        }
+
+        if(stage2_dst_surf != NULL) {
+            proc_ctx->surface_render_output_object = stage2_dst_surf;
+
+            proc_st->current_render_target = out_surface_id2;
+        }
+
+        proc_ctx->pipeline_param = pipeline_param;
+
+        if(pipeline_param->num_filters == 0 || pipeline_param->filters == NULL ){
+            /* implicity surface format coversion and scaling */
+
+            gen75_vpp_fmt_cvt(ctx, profile, codec_state, hw_context);
+        }else if(pipeline_param->num_filters == 1) {
+           struct object_buffer * obj_buf = BUFFER((*filter_id) + 0);
+
+           assert(obj_buf && obj_buf->buffer_store && obj_buf->buffer_store->buffer);
+
+           if (!obj_buf ||
+               !obj_buf->buffer_store ||
+               !obj_buf->buffer_store->buffer) {
+               status = VA_STATUS_ERROR_INVALID_FILTER_CHAIN;
                goto error;
            }
 
-           gen75_vpp_gpe(ctx, proc_ctx);
-       } 
-    }else if (pipeline_param->num_filters >= 2) {
-         unsigned int i = 0;
-         for (i = 0; i < pipeline_param->num_filters; i++){
-             struct object_buffer * obj_buf = BUFFER(pipeline_param->filters[i]);
-
-             if (!obj_buf ||
-                 !obj_buf->buffer_store ||
-                 !obj_buf->buffer_store->buffer) {
-                 status = VA_STATUS_ERROR_INVALID_FILTER_CHAIN;
-                 goto error;
+           VAProcFilterParameterBuffer* filter =
+               (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer;
+
+           if (filter->type == VAProcFilterNoiseReduction         ||
+               filter->type == VAProcFilterDeinterlacing          ||
+               filter->type == VAProcFilterSkinToneEnhancement    ||
+               filter->type == VAProcFilterColorBalance){
+               gen75_vpp_vebox(ctx, proc_ctx);
+           }else if(filter->type == VAProcFilterSharpening){
+               if (proc_ctx->surface_pipeline_input_object->fourcc != VA_FOURCC_NV12 ||
+                   proc_ctx->surface_render_output_object->fourcc != VA_FOURCC_NV12) {
+                   status = VA_STATUS_ERROR_UNIMPLEMENTED;
+                   goto error;
+               }
+
+               gen75_vpp_gpe(ctx, proc_ctx);
+           }
+        }else if (pipeline_param->num_filters >= 2) {
+             unsigned int i = 0;
+             for (i = 0; i < pipeline_param->num_filters; i++){
+                 struct object_buffer * obj_buf = BUFFER(pipeline_param->filters[i]);
+
+                 if (!obj_buf ||
+                     !obj_buf->buffer_store ||
+                     !obj_buf->buffer_store->buffer) {
+                     status = VA_STATUS_ERROR_INVALID_FILTER_CHAIN;
+                     goto error;
+                 }
+
+                 VAProcFilterParameterBuffer* filter =
+                     (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer;
+
+                 if (filter->type != VAProcFilterNoiseReduction       &&
+                     filter->type != VAProcFilterDeinterlacing        &&
+                     filter->type != VAProcFilterSkinToneEnhancement  &&
+                     filter->type != VAProcFilterColorBalance) {
+                     fprintf(stderr, "Do not support multiply filters outside vebox pipeline \n");
+                     assert(0);
+                 }
              }
+             gen75_vpp_vebox(ctx, proc_ctx);
+        }
+    }
 
-             VAProcFilterParameterBuffer* filter =
-                 (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer;
+    if(vpp_stage3 == 1)
+    {
+        if(vpp_stage2 == 1) {
+            memset(&pipeline_param2, 0, sizeof(pipeline_param2));
+            pipeline_param2.surface = out_surface_id2;
+            pipeline_param2.surface_region = &dst_rect;
+            pipeline_param2.output_region = &dst_rect;
+            pipeline_param2.filter_flags = 0;
+            pipeline_param2.num_filters  = 0;
+
+            proc_ctx->pipeline_param = &pipeline_param2;
+            proc_ctx->surface_pipeline_input_object = proc_ctx->surface_render_output_object;
+            proc_ctx->surface_render_output_object = obj_dst_surf;
+        }
+
+        gen75_vpp_vebox(ctx, proc_ctx);
+    }
 
-             if (filter->type != VAProcFilterNoiseReduction       &&
-                 filter->type != VAProcFilterDeinterlacing        &&
-                 filter->type != VAProcFilterSkinToneEnhancement  &&
-                 filter->type != VAProcFilterColorBalance) {
-                 fprintf(stderr, "Do not support multiply filters outside vebox pipeline \n");
-                 assert(0);
-             }
-         }
-         gen75_vpp_vebox(ctx, proc_ctx);
-    }     
+    if (num_tmp_surfaces)
+        i965_DestroySurfaces(ctx,
+                             tmp_surfaces,
+                             num_tmp_surfaces);
 
     return VA_STATUS_SUCCESS;
 
 error:
+    if (num_tmp_surfaces)
+        i965_DestroySurfaces(ctx,
+                             tmp_surfaces,
+                             num_tmp_surfaces);
+
     return status;
 }
 
diff --git a/src/gen75_vpp_vebox.c b/src/gen75_vpp_vebox.c
index 06c27f8..1b4232d 100644
--- a/src/gen75_vpp_vebox.c
+++ b/src/gen75_vpp_vebox.c
@@ -1408,7 +1408,9 @@ int hsw_veb_pre_format_convert(VADriverContextP ctx,
 
       } else if(obj_surf_input->fourcc ==  VA_FOURCC_AYUV ||
                 obj_surf_input->fourcc ==  VA_FOURCC_YUY2 ||
-                obj_surf_input->fourcc ==  VA_FOURCC_NV12){
+                obj_surf_input->fourcc ==  VA_FOURCC_NV12 ||
+                obj_surf_input->fourcc ==  VA_FOURCC_P010){
+
                 // nothing to do here
      } else {
            /* not support other format as input */ 
@@ -1447,7 +1449,9 @@ int hsw_veb_pre_format_convert(VADriverContextP ctx,
         proc_ctx->format_convert_flags |= POST_FORMAT_CONVERT;
     } else if(obj_surf_output->fourcc ==  VA_FOURCC_AYUV ||
               obj_surf_output->fourcc ==  VA_FOURCC_YUY2 ||
-              obj_surf_output->fourcc ==  VA_FOURCC_NV12){
+                obj_surf_input->fourcc ==  VA_FOURCC_NV12 ||
+                obj_surf_input->fourcc ==  VA_FOURCC_P010){
+
               /* Nothing to do here */
      } else {
            /* not support other format as input */ 
@@ -1602,6 +1606,11 @@ gen75_vebox_init_filter_params(VADriverContextP ctx,
     proc_ctx->is_first_frame = 0;
     proc_ctx->is_second_field = 0;
 
+    if(!proc_ctx->is_di_enabled && !proc_ctx->is_dn_enabled) {
+        // MUST enable IECP if all DI&DN are disabled
+        proc_ctx->is_iecp_enabled = 1;
+    }
+
     /* Check whether we are deinterlacing the second field */
     if (proc_ctx->is_di_enabled) {
         const VAProcFilterParameterBufferDeinterlacing * const deint_params =
@@ -2290,7 +2299,8 @@ void skl_veb_surface_state(VADriverContextP ctx, struct intel_vebox_context *pro
     assert(obj_surf->fourcc == VA_FOURCC_NV12 ||
            obj_surf->fourcc == VA_FOURCC_YUY2 ||
            obj_surf->fourcc == VA_FOURCC_AYUV ||
-           obj_surf->fourcc == VA_FOURCC_RGBA);
+           obj_surf->fourcc == VA_FOURCC_RGBA ||
+           obj_surf->fourcc == VA_FOURCC_P010);
 
     if (obj_surf->fourcc == VA_FOURCC_NV12) {
         surface_format = PLANAR_420_8;
@@ -2312,6 +2322,11 @@ void skl_veb_surface_state(VADriverContextP ctx, struct intel_vebox_context *pro
         surface_pitch = obj_surf->width * 4;
         is_uv_interleaved = 0;
         half_pitch_chroma = 0;
+    } else if (obj_surf->fourcc == VA_FOURCC_P010) {
+        surface_format = PLANAR_420_16;
+        surface_pitch = obj_surf->width;
+        is_uv_interleaved = 1;
+        half_pitch_chroma = 0;
     }
 
     derived_pitch = surface_pitch;
diff --git a/src/gen8_post_processing.c b/src/gen8_post_processing.c
index 998e3c8..3c10960 100644
--- a/src/gen8_post_processing.c
+++ b/src/gen8_post_processing.c
@@ -42,6 +42,8 @@
 #include "i965_yuv_coefs.h"
 #include "intel_media.h"
 
+#include "gen75_picture_process.h"
+
 #define SURFACE_STATE_PADDED_SIZE               SURFACE_STATE_PADDED_SIZE_GEN8
 
 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)
@@ -1460,6 +1462,11 @@ static void
 gen8_post_processing_context_finalize(VADriverContextP ctx,
     struct i965_post_processing_context *pp_context)
 {
+    if(pp_context->vebox_proc_ctx){
+       gen75_vebox_context_destroy(ctx,pp_context->vebox_proc_ctx);
+       pp_context->vebox_proc_ctx = NULL;
+    }
+
     dri_bo_unreference(pp_context->surface_state_binding_table.bo);
     pp_context->surface_state_binding_table.bo = NULL;
 
diff --git a/src/gen9_mfd.c b/src/gen9_mfd.c
index d9ca3be..e9afb22 100644
--- a/src/gen9_mfd.c
+++ b/src/gen9_mfd.c
@@ -982,23 +982,44 @@ out:
 #define VP9_PROB_BUFFER_RESTORED_SECNE_2    2
 #define VP9_PROB_BUFFER_RESTORED_SECNE_MAX    (VP9_PROB_BUFFER_RESTORED_SECNE_2 + 1)
 
-static void vp9_update_segmentId_buffer(VADriverContextP ctx,
+#define ALLOC_MV_BUFFER(gen_buffer, string, size,width,height)  \
+    do {                                                        \
+        dri_bo_unreference(gen_buffer->bo);                     \
+        gen_buffer->bo = dri_bo_alloc(i965->intel.bufmgr,       \
+                                      string,                   \
+                                      size,                     \
+                                      0x1000);                  \
+        assert(gen_buffer->bo);                                 \
+        gen_buffer->frame_width  = width ;                      \
+        gen_buffer->frame_height = height;                      \
+    } while (0)
+
+static void
+vp9_update_segmentId_buffer(VADriverContextP ctx,
                           struct decode_state *decode_state,
-                          struct gen9_hcpd_context *gen9_hcpd_context, uint8_t isScaling)
+                          struct gen9_hcpd_context *gen9_hcpd_context)
 {
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
     VADecPictureParameterBufferVP9 *pic_param;
 
+    int size = 0;
+    int is_scaling = 0;
     assert(decode_state->pic_param && decode_state->pic_param->buffer);
     pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer;
 
-    int size = 0;
+    size = gen9_hcpd_context->picture_width_in_ctbs * gen9_hcpd_context->picture_height_in_ctbs * 1 ;
+    size <<= 6;
+    if (gen9_hcpd_context->vp9_segment_id_buffer.bo == NULL || pic_param->frame_width > gen9_hcpd_context->last_frame.frame_width || pic_param->frame_height > gen9_hcpd_context->last_frame.frame_height)
+    {
+        ALLOC_GEN_BUFFER((&gen9_hcpd_context->vp9_segment_id_buffer), "vp9 segment id buffer", size);
+    }
+
+    is_scaling = (pic_param->frame_width != gen9_hcpd_context->last_frame.frame_width) || (pic_param->frame_height != gen9_hcpd_context->last_frame.frame_height);
 
     if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||
         pic_param->pic_fields.bits.error_resilient_mode ||
-        pic_param->pic_fields.bits.intra_only || isScaling) {
+        pic_param->pic_fields.bits.intra_only || is_scaling) {
 
-        size = (gen9_hcpd_context->picture_width_in_min_cb_minus1+2)*(gen9_hcpd_context->picture_height_in_min_cb_minus1 + 2) * 1;
-        size<<=6;
         //VP9 Segment ID buffer needs to be zero
         dri_bo_map(gen9_hcpd_context->vp9_segment_id_buffer.bo,1);
         memset((unsigned char *)gen9_hcpd_context->vp9_segment_id_buffer.bo->virtual,0, size);
@@ -1007,6 +1028,31 @@ static void vp9_update_segmentId_buffer(VADriverContextP ctx,
 }
 
 static void
+vp9_update_mv_temporal_buffer(VADriverContextP ctx,
+                          struct decode_state *decode_state,
+                          struct gen9_hcpd_context *gen9_hcpd_context)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    VADecPictureParameterBufferVP9 *pic_param;
+    int size = 0;
+
+    assert(decode_state->pic_param && decode_state->pic_param->buffer);
+    pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer;
+
+    size = gen9_hcpd_context->picture_width_in_ctbs * gen9_hcpd_context->picture_height_in_ctbs * 9 ;
+    size <<= 6; //CL aligned
+    if (gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo == NULL || pic_param->frame_width > gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_width || pic_param->frame_height > gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_height)
+    {
+        ALLOC_MV_BUFFER((&gen9_hcpd_context->vp9_mv_temporal_buffer_curr), "vp9 curr mv temporal buffer", size,pic_param->frame_width,pic_param->frame_height);
+    }
+    if (gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo == NULL)
+    {
+        ALLOC_MV_BUFFER((&gen9_hcpd_context->vp9_mv_temporal_buffer_last), "vp9 last mv temporal buffer", size,pic_param->frame_width,pic_param->frame_height);
+    }
+
+}
+
+static void
 vp9_gen_default_probabilities(VADriverContextP ctx, struct gen9_hcpd_context *gen9_hcpd_context)
 {
     int i = 0;
@@ -1103,7 +1149,7 @@ vp9_update_probabilities(VADriverContextP ctx,
         }
     }else if(gen9_hcpd_context->last_frame.prob_buffer_saved_flag == VP9_PROB_BUFFER_SAVED_SECNE_2)
     {
-        if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||pic_param->pic_fields.bits.intra_only|pic_param->pic_fields.bits.error_resilient_mode)
+        if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||pic_param->pic_fields.bits.intra_only||pic_param->pic_fields.bits.error_resilient_mode)
         {
             temp_frame_ctx_id = 0;
         }
@@ -1130,7 +1176,7 @@ vp9_update_probabilities(VADriverContextP ctx,
         }
     }
     //first part buffer update: Case 1)Reset all 4 probablity buffers
-   if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||pic_param->pic_fields.bits.intra_only|pic_param->pic_fields.bits.error_resilient_mode)
+   if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||pic_param->pic_fields.bits.intra_only||pic_param->pic_fields.bits.error_resilient_mode)
     {
         if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||
             (pic_param->pic_fields.bits.reset_frame_context == 3)||
@@ -1265,9 +1311,7 @@ gen9_hcpd_init_vp9_surface(VADriverContextP ctx,
                             struct object_surface *obj_surface,
                             struct gen9_hcpd_context *gen9_hcpd_context)
 {
-    struct i965_driver_data *i965 = i965_driver_data(ctx);
     GenVP9Surface *gen9_vp9_surface;
-    uint32_t size=0;
 
     if (!obj_surface)
         return;
@@ -1277,20 +1321,11 @@ gen9_hcpd_init_vp9_surface(VADriverContextP ctx,
 
     if (!gen9_vp9_surface) {
         gen9_vp9_surface = calloc(sizeof(GenVP9Surface), 1);
+        assert(gen9_vp9_surface);
         gen9_vp9_surface->base.frame_store_id = -1;
         obj_surface->private_data = gen9_vp9_surface;
     }
 
-    //Super block size in VP9 is 64x64, size in SBs
-    size = gen9_hcpd_context->picture_width_in_ctbs * gen9_hcpd_context->picture_height_in_ctbs * 9 ;
-    size<<=6; //CL aligned
-
-    if (gen9_vp9_surface->motion_vector_temporal_bo == NULL) {
-        gen9_vp9_surface->motion_vector_temporal_bo = dri_bo_alloc(i965->intel.bufmgr,
-                                                                   "current motion vector temporal buffer",
-                                                                    size,
-                                                                    0x1000);
-    }
     gen9_vp9_surface->frame_width  = pic_param->frame_width;
     gen9_vp9_surface->frame_height = pic_param->frame_height;
 
@@ -1373,10 +1408,6 @@ gen9_hcpd_vp9_decode_init(VADriverContextP ctx,
     size<<=6;
     ALLOC_GEN_BUFFER((&gen9_hcpd_context->vp9_probability_buffer), "vp9 probability buffer", size);
 
-    size = (gen9_hcpd_context->picture_width_in_min_cb_minus1+2)*(gen9_hcpd_context->picture_height_in_min_cb_minus1 + 2) * 1;
-    size<<=6;
-    ALLOC_GEN_BUFFER((&gen9_hcpd_context->vp9_segment_id_buffer), "vp9 segment id buffer", size);
-
     gen9_hcpd_context->first_inter_slice_collocated_ref_idx = 0;
     gen9_hcpd_context->first_inter_slice_collocated_from_l0_flag = 0;
     gen9_hcpd_context->first_inter_slice_valid = 0;
@@ -1450,7 +1481,6 @@ gen9_hcpd_vp9_pipe_buf_addr_state(VADriverContextP ctx,
 {
     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
     struct object_surface *obj_surface;
-    GenVP9Surface *gen9_vp9_surface;
     int i=0;
 
     BEGIN_BCS_BATCH(batch, 95);
@@ -1459,8 +1489,6 @@ gen9_hcpd_vp9_pipe_buf_addr_state(VADriverContextP ctx,
 
     obj_surface = decode_state->render_object;
     assert(obj_surface && obj_surface->bo);
-    gen9_vp9_surface = obj_surface->private_data;
-    assert(gen9_vp9_surface && gen9_vp9_surface->motion_vector_temporal_bo);
 
     OUT_BUFFER_MA_TARGET(obj_surface->bo); /* DW 1..3 */
     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_line_buffer.bo);/* DW 4..6 */
@@ -1472,7 +1500,7 @@ gen9_hcpd_vp9_pipe_buf_addr_state(VADriverContextP ctx,
     OUT_BUFFER_MA_TARGET(NULL);    /* DW 22..24, ignore for VP9 */
     OUT_BUFFER_MA_TARGET(NULL);    /* DW 25..27, ignore for VP9 */
     OUT_BUFFER_MA_TARGET(NULL);    /* DW 28..30, ignore for VP9 */
-    OUT_BUFFER_MA_TARGET(gen9_vp9_surface->motion_vector_temporal_bo); /* DW 31..33 */
+    OUT_BUFFER_MA_TARGET(gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo); /* DW 31..33 */
 
     OUT_BUFFER_MA_TARGET(NULL); /* DW 34..36, reserved */
 
@@ -1502,7 +1530,7 @@ gen9_hcpd_vp9_pipe_buf_addr_state(VADriverContextP ctx,
     /* DW 66..81 - for 8 Collocated motion vectors */
     for (i = 0; i < 1; i++)
     {
-        OUT_BUFFER_NMA_REFERENCE(gen9_hcpd_context->last_frame.mv_temporal_buffer_bo);
+        OUT_BUFFER_NMA_REFERENCE(gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo);
     }
     for (; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++)
     {
@@ -1517,7 +1545,6 @@ gen9_hcpd_vp9_pipe_buf_addr_state(VADriverContextP ctx,
     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->hvd_tile_rowstore_buffer.bo);/* DW 92..94, VP9 HVD Tile Rowstore buffer */
 
     ADVANCE_BCS_BATCH(batch);
-    gen9_hcpd_context->last_frame.mv_temporal_buffer_bo = gen9_vp9_surface->motion_vector_temporal_bo;
 }
 
 static inline int
@@ -1718,16 +1745,25 @@ gen9_hcpd_vp9_segment_state(VADriverContextP ctx,
                   seg_param->segment_flags.fields.segment_reference_enabled << 3 |
                   seg_param->segment_flags.fields.segment_reference << 1 |
                   seg_param->segment_flags.fields.segment_reference_skipped <<0 ); /* DW 2 */
-    OUT_BCS_BATCH(batch,
-                  seg_param->filter_level[1][1] << 24    | //FilterLevelRef1Mode1
-                  seg_param->filter_level[1][0] << 16    | //FilterLevelRef1Mode0
-                  seg_param->filter_level[0][1] << 8     | //FilterLevelRef0Mode1
-                  seg_param->filter_level[0][0] << 0 );     //FilterLevelRef0Mode0 /* DW 3 */
-    OUT_BCS_BATCH(batch,
-                  seg_param->filter_level[3][1] << 24    | //FilterLevelRef3Mode1
-                  seg_param->filter_level[3][0] << 16    | //FilterLevelRef3Mode0
-                  seg_param->filter_level[2][1] << 8     | //FilterLevelRef2Mode1
-                  seg_param->filter_level[2][0] << 0 );    //FilterLevelRef2Mode0 /* DW 4 */
+    if(pic_param->filter_level)
+    {
+        OUT_BCS_BATCH(batch,
+            seg_param->filter_level[1][1] << 24    | //FilterLevelRef1Mode1
+            seg_param->filter_level[1][0] << 16    | //FilterLevelRef1Mode0
+            seg_param->filter_level[0][1] << 8     | //FilterLevelRef0Mode1
+            seg_param->filter_level[0][0] << 0 );     //FilterLevelRef0Mode0 /* DW 3 */
+        OUT_BCS_BATCH(batch,
+            seg_param->filter_level[3][1] << 24    | //FilterLevelRef3Mode1
+            seg_param->filter_level[3][0] << 16    | //FilterLevelRef3Mode0
+            seg_param->filter_level[2][1] << 8     | //FilterLevelRef2Mode1
+            seg_param->filter_level[2][0] << 0 );    //FilterLevelRef2Mode0 /* DW 4 */
+    }else
+    {
+        OUT_BCS_BATCH(batch,
+            0 );      /* DW 3 */
+        OUT_BCS_BATCH(batch,
+            0 );      /* DW 4 */
+    }
     OUT_BCS_BATCH(batch,
                   seg_param->luma_ac_quant_scale << 16   |
                   seg_param->luma_dc_quant_scale << 0 );    /* DW 5 */
@@ -1765,39 +1801,35 @@ gen9_hcpd_vp9_decode_picture(VADriverContextP ctx,
                               struct decode_state *decode_state,
                               struct gen9_hcpd_context *gen9_hcpd_context)
 {
-    VAStatus vaStatus;
+    VAStatus vaStatus = VA_STATUS_SUCCESS;
     struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
     VADecPictureParameterBufferVP9 *pic_param;
     VASliceParameterBufferVP9 *slice_param;
     dri_bo *slice_data_bo;
-    int i = 0, num_segments=0, isScaling=0;
-    struct object_surface *obj_surface;
-    GenVP9Surface *gen9_vp9_surface;
-    vaStatus = gen9_hcpd_vp9_decode_init(ctx, decode_state, gen9_hcpd_context);
-
-    if (vaStatus != VA_STATUS_SUCCESS)
-        goto out;
+    dri_bo *tmp_bo;
+    uint16_t tmp;
+    int i = 0, num_segments=0;
 
     assert(decode_state->pic_param && decode_state->pic_param->buffer);
+    assert(decode_state->slice_params && decode_state->slice_params[0]->buffer);
+    slice_param = (VASliceParameterBufferVP9 *)decode_state->slice_params[0]->buffer;
     pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer;
 
-    //****And set the isScaling value accordingly******
-    isScaling = 0;
-    for(i = 0; i < 3; i++)
+    if(slice_param->slice_data_size == 1)
     {
-        obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface;
-        gen9_vp9_surface = NULL;
-        if (obj_surface && obj_surface->private_data)
-        {
-            gen9_vp9_surface = obj_surface->private_data;
-            isScaling |= (gen9_vp9_surface->frame_width == pic_param->frame_width &&
-                gen9_vp9_surface->frame_height == pic_param->frame_height)? 0:1;
-        }
+        goto out;
     }
 
+    vaStatus = gen9_hcpd_vp9_decode_init(ctx, decode_state, gen9_hcpd_context);
+
+    if (vaStatus != VA_STATUS_SUCCESS)
+        goto out;
+
     //Update segment id buffer if needed
-    vp9_update_segmentId_buffer(ctx, decode_state, gen9_hcpd_context, isScaling);
+    vp9_update_segmentId_buffer(ctx, decode_state, gen9_hcpd_context);
+    //Update mv buffer if needed
+    vp9_update_mv_temporal_buffer(ctx, decode_state, gen9_hcpd_context);
     //Update probability buffer if needed
     vp9_update_probabilities(ctx, decode_state, gen9_hcpd_context);
 
@@ -1812,8 +1844,6 @@ gen9_hcpd_vp9_decode_picture(VADriverContextP ctx,
     gen9_hcpd_vp9_surface_state(ctx, decode_state, gen9_hcpd_context);
 
     //Only one VASliceParameterBufferVP9 should be sent per frame
-    assert(decode_state->slice_params && decode_state->slice_params[0]->buffer);
-    slice_param = (VASliceParameterBufferVP9 *)decode_state->slice_params[0]->buffer;
     slice_data_bo = decode_state->slice_datas[0]->bo;
 
     gen9_hcpd_ind_obj_base_addr_state(ctx, slice_data_bo, gen9_hcpd_context);
@@ -1835,6 +1865,9 @@ gen9_hcpd_vp9_decode_picture(VADriverContextP ctx,
 
     gen9_hcpd_vp9_bsd_object(ctx, pic_param, slice_param, gen9_hcpd_context);
 
+    intel_batchbuffer_end_atomic(batch);
+    intel_batchbuffer_flush(batch);
+
     // keep track of the last frame status
     gen9_hcpd_context->last_frame.frame_width = pic_param->frame_width;
     gen9_hcpd_context->last_frame.frame_height = pic_param->frame_height;
@@ -1844,11 +1877,23 @@ gen9_hcpd_vp9_decode_picture(VADriverContextP ctx,
     gen9_hcpd_context->last_frame.frame_context_idx = pic_param->pic_fields.bits.frame_context_idx;
     gen9_hcpd_context->last_frame.intra_only = pic_param->pic_fields.bits.intra_only;
 
-    // update prob buffer to vp9_fc;
+    // switch mv buffer
+    if(pic_param->pic_fields.bits.frame_type != HCP_VP9_KEY_FRAME)
+    {
+        tmp_bo = gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo;
+        gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo = gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo;
+        gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo = tmp_bo;
 
-    intel_batchbuffer_end_atomic(batch);
-    intel_batchbuffer_flush(batch);
+        tmp = gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_width;
+        gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_width = gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_width;
+        gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_width = tmp;
+
+        tmp = gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_height;
+        gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_height = gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_height;
+        gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_height = tmp;
 
+
+    }
     //update vp9_frame_ctx according to frame_context_id
     if (pic_param->pic_fields.bits.refresh_frame_context)
     {
@@ -1919,6 +1964,8 @@ gen9_hcpd_context_destroy(void *hw_context)
     FREE_GEN_BUFFER((&gen9_hcpd_context->hvd_tile_rowstore_buffer));
     FREE_GEN_BUFFER((&gen9_hcpd_context->vp9_probability_buffer));
     FREE_GEN_BUFFER((&gen9_hcpd_context->vp9_segment_id_buffer));
+    dri_bo_unreference(gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo);
+    dri_bo_unreference(gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo);
 
     intel_batchbuffer_free(gen9_hcpd_context->base.batch);
     free(gen9_hcpd_context);
@@ -1935,17 +1982,19 @@ static void
 gen9_hcpd_vp9_context_init(VADriverContextP ctx,
                             struct gen9_hcpd_context *gen9_hcpd_context)
 {
-    int default_value = 255;
 
     gen9_hcpd_context->last_frame.frame_height  = 0;
     gen9_hcpd_context->last_frame.show_frame    = 0;
     gen9_hcpd_context->last_frame.frame_type    = 0;
-    gen9_hcpd_context->last_frame.refresh_frame_context = default_value;
-    gen9_hcpd_context->last_frame.frame_context_idx = default_value;
+    gen9_hcpd_context->last_frame.refresh_frame_context = 0;
+    gen9_hcpd_context->last_frame.frame_context_idx = 0;
     gen9_hcpd_context->last_frame.intra_only = 0;
     gen9_hcpd_context->last_frame.prob_buffer_saved_flag = 0;
     gen9_hcpd_context->last_frame.prob_buffer_restored_flag = 0;
-    gen9_hcpd_context->last_frame.mv_temporal_buffer_bo = NULL;
+
+    //Super block in VP9 is 64x64
+    gen9_hcpd_context->ctb_size = 64;
+    gen9_hcpd_context->min_cb_size = 8; //Min block size is 8
 
     vp9_gen_default_probabilities(ctx, gen9_hcpd_context);
 }
diff --git a/src/gen9_mfd.h b/src/gen9_mfd.h
index c266dd4..a91a84a 100644
--- a/src/gen9_mfd.h
+++ b/src/gen9_mfd.h
@@ -49,9 +49,15 @@ typedef struct vp9_frame_status
     uint8_t intra_only;
     uint8_t prob_buffer_saved_flag;
     uint8_t prob_buffer_restored_flag;
-    dri_bo * mv_temporal_buffer_bo;
 }vp9_last_frame_status;
 
+typedef struct vp9_mv_temporal_buffer
+{
+    dri_bo *bo;
+    uint16_t frame_width;
+    uint16_t frame_height;
+}VP9_MV_BUFFER;
+
 struct gen9_hcpd_context
 {
     struct hw_context base;
@@ -84,6 +90,8 @@ struct gen9_hcpd_context
     GenBuffer hvd_tile_rowstore_buffer;
     GenBuffer vp9_probability_buffer;
     GenBuffer vp9_segment_id_buffer;
+    VP9_MV_BUFFER vp9_mv_temporal_buffer_curr;
+    VP9_MV_BUFFER vp9_mv_temporal_buffer_last;
 
     unsigned short first_inter_slice_collocated_ref_idx;
     unsigned short first_inter_slice_collocated_from_l0_flag;
diff --git a/src/i965_device_info.c b/src/i965_device_info.c
index 4921922..b14fda9 100644
--- a/src/i965_device_info.c
+++ b/src/i965_device_info.c
@@ -401,6 +401,7 @@ static struct hw_codec_info bxt_hw_codec_info = {
     .has_hevc_encoding = 1,
     .has_hevc10_decoding = 1,
     .has_vp9_decoding = 1,
+    .has_vpp_p010 = 1,
 
     .num_filters = 5,
     .filters = {
@@ -412,7 +413,6 @@ static struct hw_codec_info bxt_hw_codec_info = {
     },
 };
 
-
 struct hw_codec_info *
 i965_get_codec_info(int devid)
 {
diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c
index 7b7bdf6..cd616d7 100644
--- a/src/i965_drv_video.c
+++ b/src/i965_drv_video.c
@@ -112,6 +112,9 @@
 #define HAS_HEVC10_DECODING(ctx)        ((ctx)->codec_info->has_hevc10_decoding && \
                                          (ctx)->intel.has_bsd)
 
+#define HAS_VPP_P010(ctx)        ((ctx)->codec_info->has_vpp_p010 && \
+                                         (ctx)->intel.has_bsd)
+
 static int get_sampling_from_fourcc(unsigned int fourcc);
 
 /* Check whether we are rendering to X11 (VA/X11 or VA/GLX API) */
@@ -316,6 +319,8 @@ i965_image_formats_map[I965_MAX_IMAGE_FORMATS + 1] = {
       { VA_FOURCC_RGBX, VA_LSB_FIRST, 32, 24, 0x000000ff, 0x0000ff00, 0x00ff0000 } },
     { I965_SURFACETYPE_RGBA,
       { VA_FOURCC_BGRX, VA_LSB_FIRST, 32, 24, 0x00ff0000, 0x0000ff00, 0x000000ff } },
+    { I965_SURFACETYPE_YUV,
+      { VA_FOURCC_P010, VA_LSB_FIRST, 24, } },
 };
 
 /* List of supported subpicture formats */
@@ -878,6 +883,12 @@ i965_get_default_chroma_formats(VADriverContextP ctx, VAProfile profile,
         if (HAS_HEVC10_DECODING(i965) && entrypoint == VAEntrypointVLD)
             chroma_formats |= i965->codec_info->hevc_dec_chroma_formats;
         break;
+
+    case VAProfileNone:
+	if(HAS_VPP_P010(i965))
+            chroma_formats |= VA_RT_FORMAT_YUV420_10BPP;
+        break;
+
     default:
         break;
     }
@@ -3759,6 +3770,14 @@ i965_CreateImage(VADriverContextP ctx,
         image->offsets[0] = 0;
         image->data_size  = size * 2;
         break;
+    case VA_FOURCC_P010:
+        image->num_planes = 2;
+        image->pitches[0] = awidth * 2;
+        image->offsets[0] = 0;
+        image->pitches[1] = awidth * 2;
+        image->offsets[1] = size * 2;
+        image->data_size  = size * 2 + 2 * size2 * 2;
+        break;
     default:
         goto error;
     }
@@ -3819,22 +3838,22 @@ i965_check_alloc_surface_bo(VADriverContextP ctx,
 
     int bpp_1stplane = bpp_1stplane_by_fourcc(fourcc);
 
-    if (obj_surface->user_h_stride_set) {
-        ASSERT_RET(IS_ALIGNED(obj_surface->width, 128), VA_STATUS_ERROR_INVALID_PARAMETER);
-    } else
-        obj_surface->width = ALIGN(obj_surface->orig_width * bpp_1stplane, 128);
-
-    if (obj_surface->user_v_stride_set) {
-        ASSERT_RET(IS_ALIGNED(obj_surface->height, 32), VA_STATUS_ERROR_INVALID_PARAMETER);
-    } else
-        obj_surface->height = ALIGN(obj_surface->orig_height, 32);
-
     if ((tiled && !obj_surface->user_disable_tiling)) {
         ASSERT_RET(fourcc != VA_FOURCC_I420 &&
                fourcc != VA_FOURCC_IYUV &&
                fourcc != VA_FOURCC_YV12,
                VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT);
 
+        if (obj_surface->user_h_stride_set) {
+           ASSERT_RET(IS_ALIGNED(obj_surface->width, 128), VA_STATUS_ERROR_INVALID_PARAMETER);
+        } else
+          obj_surface->width = ALIGN(obj_surface->orig_width * bpp_1stplane, 128);
+
+        if (obj_surface->user_v_stride_set) {
+          ASSERT_RET(IS_ALIGNED(obj_surface->height, 32), VA_STATUS_ERROR_INVALID_PARAMETER);
+        }else
+          obj_surface->height = ALIGN(obj_surface->orig_height, 32);
+
         region_height = obj_surface->height;
 
         switch (fourcc) {
@@ -5688,6 +5707,14 @@ i965_QuerySurfaceAttributes(VADriverContextP ctx,
                 attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE;
                 attribs[i].value.value.i = VA_FOURCC_YV16;
                 i++;
+
+                if(HAS_VPP_P010(i965)) {
+                  attribs[i].type = VASurfaceAttribPixelFormat;
+                  attribs[i].value.type = VAGenericValueTypeInteger;
+                  attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE;
+                  attribs[i].value.value.i = VA_FOURCC_P010;
+                  i++;
+                }
             }
         }
     }
diff --git a/src/i965_drv_video.h b/src/i965_drv_video.h
index bdb7512..36a9039 100644
--- a/src/i965_drv_video.h
+++ b/src/i965_drv_video.h
@@ -388,6 +388,7 @@ struct hw_codec_info
     unsigned int has_hevc_encoding:1;
     unsigned int has_hevc10_decoding:1;
     unsigned int has_vp9_decoding:1;
+    unsigned int has_vpp_p010:1;
 
     unsigned int num_filters;
     struct i965_filter filters[VAProcFilterCount];
diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index ea35b36..969f84b 100755
--- a/src/i965_post_processing.c
+++ b/src/i965_post_processing.c
@@ -41,6 +41,8 @@
 #include "i965_yuv_coefs.h"
 #include "intel_media.h"
 
+#include "gen75_picture_process.h"
+
 extern VAStatus
 vpp_surface_convert(VADriverContextP ctx,
                     struct object_surface *src_obj_surf,
@@ -5296,6 +5298,183 @@ i965_image_pl1_processing(VADriverContextP ctx,
     return vaStatus;
 }
 
+// it only support NV12 and P010 for vebox proc ctx
+static struct object_surface *derive_surface(VADriverContextP ctx,
+                                             struct object_image *obj_image,
+                                             struct object_surface *obj_surface)
+{
+    VAImage * const image = &obj_image->image;
+
+    memset((void *)obj_surface, 0, sizeof(*obj_surface));
+    obj_surface->fourcc = image->format.fourcc;
+    obj_surface->orig_width = image->width;
+    obj_surface->orig_height = image->height;
+    obj_surface->width = image->pitches[0];
+    obj_surface->height = image->height;
+    obj_surface->y_cb_offset = image->offsets[1] / obj_surface->width;
+    obj_surface->y_cr_offset = obj_surface->y_cb_offset;
+    obj_surface->bo = obj_image->bo;
+    obj_surface->subsampling = SUBSAMPLE_YUV420;
+
+    return obj_surface;
+}
+
+static VAStatus
+vebox_processing_simple(VADriverContextP ctx,
+                        struct i965_post_processing_context *pp_context,
+                        struct object_surface *src_obj_surface,
+                        struct object_surface *dst_obj_surface,
+                        const VARectangle *rect)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    VAProcPipelineParameterBuffer pipeline_param;
+    VAStatus status = VA_STATUS_ERROR_UNIMPLEMENTED;
+
+    if(pp_context->vebox_proc_ctx == NULL) {
+        pp_context->vebox_proc_ctx = gen75_vebox_context_init(ctx);
+    }
+
+    memset((void *)&pipeline_param, 0, sizeof(pipeline_param));
+    pipeline_param.surface_region = rect;
+    pipeline_param.output_region = rect;
+    pipeline_param.filter_flags = 0;
+    pipeline_param.num_filters  = 0;
+
+    pp_context->vebox_proc_ctx->pipeline_param = &pipeline_param;
+    pp_context->vebox_proc_ctx->surface_input_object = src_obj_surface;
+    pp_context->vebox_proc_ctx->surface_output_object = dst_obj_surface;
+
+    if (IS_GEN9(i965->intel.device_info))
+        status = gen9_vebox_process_picture(ctx, pp_context->vebox_proc_ctx);
+
+    return status;
+}
+
+static VAStatus
+i965_image_p010_processing(VADriverContextP ctx,
+                          const struct i965_surface *src_surface,
+                          const VARectangle *src_rect,
+                          struct i965_surface *dst_surface,
+                          const VARectangle *dst_rect)
+{
+#define HAS_VPP_P010(ctx)        ((ctx)->codec_info->has_vpp_p010 && \
+                                     (ctx)->intel.has_bsd)
+
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_post_processing_context *pp_context = i965->pp_context;
+    struct object_surface *src_obj_surface = NULL, *dst_obj_surface = NULL;
+    struct object_surface tmp_src_obj_surface, tmp_dst_obj_surface;
+    struct object_surface *tmp_surface = NULL;
+    VASurfaceID tmp_surface_id[3], out_surface_id = VA_INVALID_ID;
+    int num_tmp_surfaces = 0;
+    int fourcc = pp_get_surface_fourcc(ctx, dst_surface);
+    VAStatus vaStatus = VA_STATUS_ERROR_UNIMPLEMENTED;
+    int vpp_post = 0;
+
+    if(HAS_VPP_P010(i965)) {
+        vpp_post = 0;
+        switch(fourcc) {
+        case VA_FOURCC_NV12:
+            if(src_rect->x != dst_rect->x ||
+                src_rect->y != dst_rect->y ||
+                src_rect->width != dst_rect->width ||
+                src_rect->height != dst_rect->height) {
+                vpp_post = 1;
+            }
+            break;
+        case VA_FOURCC_P010:
+            // don't support scaling while the fourcc of dst_surface is P010
+            if(src_rect->x != dst_rect->x ||
+                src_rect->y != dst_rect->y ||
+                src_rect->width != dst_rect->width ||
+                src_rect->height != dst_rect->height) {
+                vaStatus = VA_STATUS_ERROR_UNIMPLEMENTED;
+                goto EXIT;
+            }
+            break;
+        default:
+            vpp_post = 1;
+            break;
+        }
+
+        if(src_surface->type == I965_SURFACE_TYPE_IMAGE) {
+            src_obj_surface = derive_surface(ctx, (struct object_image *)src_surface->base,
+                                             &tmp_src_obj_surface);
+        }
+        else
+            src_obj_surface = (struct object_surface *)src_surface->base;
+
+        if(src_obj_surface == NULL) {
+            vaStatus = VA_STATUS_ERROR_ALLOCATION_FAILED;
+            goto EXIT;
+        }
+
+        if(vpp_post == 1) {
+            vaStatus = i965_CreateSurfaces(ctx,
+                                         src_obj_surface->orig_width,
+                                         src_obj_surface->orig_height,
+                                         VA_RT_FORMAT_YUV420,
+                                         1,
+                                         &out_surface_id);
+            assert(vaStatus == VA_STATUS_SUCCESS);
+            tmp_surface_id[num_tmp_surfaces++] = out_surface_id;
+            tmp_surface = SURFACE(out_surface_id);
+            assert(tmp_surface);
+            i965_check_alloc_surface_bo(ctx, tmp_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420);
+        }
+
+        if(tmp_surface != NULL)
+            dst_obj_surface = tmp_surface;
+        else {
+            if(dst_surface->type == I965_SURFACE_TYPE_IMAGE) {
+                dst_obj_surface = derive_surface(ctx, (struct object_image *)dst_surface->base,
+                                                 &tmp_dst_obj_surface);
+            }
+            else
+                dst_obj_surface = (struct object_surface *)dst_surface->base;
+        }
+
+        if(dst_obj_surface == NULL) {
+            vaStatus = VA_STATUS_ERROR_ALLOCATION_FAILED;
+            goto EXIT;
+        }
+
+        vaStatus = vebox_processing_simple(ctx,
+                                         pp_context,
+                                         src_obj_surface,
+                                         dst_obj_surface,
+                                         src_rect);
+        if(vaStatus != VA_STATUS_SUCCESS)
+            goto EXIT;
+
+        if(vpp_post == 1) {
+            struct i965_surface src_surface_new;
+
+            if(tmp_surface != NULL){
+                src_surface_new.base = (struct object_base *)tmp_surface;
+                src_surface_new.type = I965_SURFACE_TYPE_SURFACE;
+                src_surface_new.flags = I965_SURFACE_FLAG_FRAME;
+            }
+            else
+                memcpy((void *)&src_surface_new, (void *)src_surface, sizeof(src_surface_new));
+
+            vaStatus = i965_image_pl2_processing(ctx,
+                                               &src_surface_new,
+                                               src_rect,
+                                               dst_surface,
+                                               dst_rect);
+        }
+    }
+
+EXIT:
+    if(num_tmp_surfaces)
+        i965_DestroySurfaces(ctx,
+                             tmp_surface_id,
+                             num_tmp_surfaces);
+
+    return vaStatus;
+}
+
 VAStatus
 i965_image_processing(VADriverContextP ctx,
                       const struct i965_surface *src_surface,
@@ -5353,6 +5532,13 @@ i965_image_processing(VADriverContextP ctx,
                                                dst_surface,
                                                dst_rect);
             break;
+        case VA_FOURCC_P010:
+            status = i965_image_p010_processing(ctx,
+                                               src_surface,
+                                               src_rect,
+                                               dst_surface,
+                                               dst_rect);
+            break;
         default:
             status = VA_STATUS_ERROR_UNIMPLEMENTED;
             break;
diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h
index 63e678d..a9942b2 100755
--- a/src/i965_post_processing.h
+++ b/src/i965_post_processing.h
@@ -528,6 +528,8 @@ struct i965_post_processing_context
         unsigned int curbe_allocation_size : 16;
     } vfe_gpu_state;
 
+    struct intel_vebox_context *vebox_proc_ctx;
+
     struct pp_load_save_context pp_load_save_context;
     struct pp_scaling_context pp_scaling_context;
     struct pp_avs_context pp_avs_context;
diff --git a/src/intel_media_common.c b/src/intel_media_common.c
index 5fe9fc5..d6771c8 100644
--- a/src/intel_media_common.c
+++ b/src/intel_media_common.c
@@ -123,9 +123,6 @@ void gen_free_vp9_surface(void **data)
         return;
     }
 
-    dri_bo_unreference(vp9_surface->motion_vector_temporal_bo);
-    vp9_surface->motion_vector_temporal_bo = NULL;
-
     free(vp9_surface);
     *data = NULL;