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authorXiang, Haihao <haihao.xiang@intel.com>2011-03-14 13:05:57 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2011-03-14 13:05:57 +0800
commit460e1bac8de1696f83ffb62742707e02b49433f6 (patch)
treed15f72dee152c3b07dc6c6ebc114fe48ac79eb5b
parentc64b6198c1f606e9d1809607bccf8841e60ff510 (diff)
i965_drv_video/VC1: fix for single intensity compensation parameter setting1.0.11
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
-rw-r--r--gen6_mfd.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/gen6_mfd.c b/gen6_mfd.c
index ed2a337..b2f312e 100644
--- a/gen6_mfd.c
+++ b/gen6_mfd.c
@@ -1863,6 +1863,7 @@ gen6_mfd_vc1_pred_pipe_state(VADriverContextP ctx, struct decode_state *decode_s
{
VAPictureParameterBufferVC1 *pic_param;
int interpolation_mode = 0;
+ int intensitycomp_single;
assert(decode_state->pic_param && decode_state->pic_param->buffer);
pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer;
@@ -1880,6 +1881,7 @@ gen6_mfd_vc1_pred_pipe_state(VADriverContextP ctx, struct decode_state *decode_s
assert(decode_state->pic_param && decode_state->pic_param->buffer);
pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer;
+ intensitycomp_single = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation);
BEGIN_BCS_BATCH(ctx, 7);
OUT_BCS_BATCH(ctx, MFX_VC1_PRED_PIPE_STATE | (7 - 2));
@@ -1898,10 +1900,10 @@ gen6_mfd_vc1_pred_pipe_state(VADriverContextP ctx, struct decode_state *decode_s
pic_param->fast_uvmc_flag << 18 |
0 << 17 | /* FIXME: scale up or down ??? */
pic_param->range_reduction_frame << 16 |
- 0 << 6 |
+ 0 << 6 | /* FIXME: double ??? */
0 << 4 |
- 0 << 2 | /* FIXME: Intensity Compensation */
- 0 << 0);
+ intensitycomp_single << 2 |
+ intensitycomp_single << 0);
ADVANCE_BCS_BATCH(ctx);
}