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authorths <ths>2008-07-20 18:48:42 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2008-07-20 18:48:42 +0000
commit49c3f092d213a98104749d5d7cc05a463a594419 (patch)
tree8848a8822b2c92d0bfdb851b37516862eef0cb10 /qemu/target-mips
parenta1173b3226018d36dfdaa6b28600d87bb70ca1d8 (diff)
Simplify conditional FP moves.
Diffstat (limited to 'qemu/target-mips')
-rw-r--r--qemu/target-mips/translate.c15
1 files changed, 5 insertions, 10 deletions
diff --git a/qemu/target-mips/translate.c b/qemu/target-mips/translate.c
index 4a2fb248..3b848225 100644
--- a/qemu/target-mips/translate.c
+++ b/qemu/target-mips/translate.c
@@ -5998,6 +5998,7 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
TCGCond cond;
TCGv t0 = tcg_temp_local_new(TCG_TYPE_TL);
TCGv t1 = tcg_temp_local_new(TCG_TYPE_TL);
+ TCGv r_tmp = tcg_temp_local_new(TCG_TYPE_I32);
if (cc)
ccbit = 1 << (24 + cc);
@@ -6010,17 +6011,11 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
gen_load_gpr(t0, rd);
gen_load_gpr(t1, rs);
- {
- TCGv r_ptr = tcg_temp_new(TCG_TYPE_PTR);
- TCGv r_tmp = tcg_temp_local_new(TCG_TYPE_I32);
+ tcg_gen_ld_i32(r_tmp, current_fpu, offsetof(CPUMIPSFPUContext, fcr31));
+ tcg_gen_andi_i32(r_tmp, r_tmp, ccbit);
+ tcg_gen_brcondi_i32(cond, r_tmp, 0, l1);
+ tcg_temp_free(r_tmp);
- tcg_gen_ld_ptr(r_ptr, cpu_env, offsetof(CPUState, fpu));
- tcg_gen_ld_i32(r_tmp, r_ptr, offsetof(CPUMIPSFPUContext, fcr31));
- tcg_temp_free(r_ptr);
- tcg_gen_andi_i32(r_tmp, r_tmp, ccbit);
- tcg_gen_brcondi_i32(cond, r_tmp, 0, l1);
- tcg_temp_free(r_tmp);
- }
tcg_gen_mov_tl(t0, t1);
tcg_temp_free(t1);