kvm-userspace: set pci mem to start at 0xc100000 and vesa to 0xc000000

This patch make the pci mem region larger (1 giga now).
this is needed for pci devices that require large amount of memory
such as video cards.

for pea guests this patch is not an issue beacuse the guest OS will map
the rest of the ram after 0x100000000...,
for 32bits that arent pea, it mean the maximum memory that would be
avaible now is 3giga.

Signed-off-by: Izik Eidus <ieidus@redhat.com>
RH-Upstream-status: submitted(qemu-devel), waiting_review
RH-Pointer: http://article.gmane.org/gmane.comp.emulators.kvm.devel/27258

3 files changed, 7 insertions, 7 deletions

diff --git a/bios/acpi-dsdt.dsl b/bios/acpi-dsdt.dsl
index d67616d6..78061abc 100755
--- a/bios/acpi-dsdt.dsl
+++ b/bios/acpi-dsdt.dsl
@@ -226,7 +226,7 @@ DefinitionBlock (
                     ,, , AddressRangeMemory, TypeStatic)
                 DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
                     0x00000000,         // Address Space Granularity
-                    0xE0000000,         // Address Range Minimum
+                    0xC0000000,         // Address Range Minimum
                     0xFEBFFFFF,         // Address Range Maximum
                     0x00000000,         // Address Translation Offset
                     0x1EC00000,         // Address Length
diff --git a/bios/rombios.c b/bios/rombios.c
index c4f6ccd5..146dd52a 100644
--- a/bios/rombios.c
+++ b/bios/rombios.c
@@ -9829,7 +9829,7 @@ pcibios_init_sel_reg:
 pcibios_init_iomem_bases:
   push bp
   mov  bp, sp
-  mov  eax, #0xe0000000 ;; base for memory init
+  mov  eax, #0xc0000000 ;; base for memory init
   push eax
   mov  ax, #0xc000 ;; base for i/o init
   push ax
diff --git a/bios/rombios32.c b/bios/rombios32.c
index 9d2eaaaa..f73eb1b1 100755
--- a/bios/rombios32.c
+++ b/bios/rombios32.c
@@ -565,8 +565,8 @@ void setup_mtrr(void)
     wrmsr_smp(MSR_MTRRfix4K_E8000, 0);
     wrmsr_smp(MSR_MTRRfix4K_F0000, 0);
     wrmsr_smp(MSR_MTRRfix4K_F8000, 0);
-    /* Mark 3.5-4GB as UC, anything not specified defaults to WB */
-    wrmsr_smp(MTRRphysBase_MSR(0), 0xe0000000ull | 0);
+    /* Mark 3-4GB as UC, anything not specified defaults to WB */
+    wrmsr_smp(MTRRphysBase_MSR(0), 0xc0000000ull | 0);
     wrmsr_smp(MTRRphysMask_MSR(0), ~(0x20000000ull - 1) | 0x800);
     wrmsr_smp(MSR_MTRRdefType, 0xc06);
 }
@@ -924,8 +924,8 @@ static void pci_bios_init_device(PCIDevice *d)
     case 0x0300: /* Display controller - VGA compatible controller */
         if (vendor_id != 0x1234)
             goto default_map;
-        /* VGA: map frame buffer to default Bochs VBE address */
-        pci_set_io_region_addr(d, 0, 0xE0000000);
+        /* VGA: map frame buffer */
+        pci_set_io_region_addr(d, 0, 0xC0000000);
         break;
     case 0x0800: /* Generic system peripheral - PIC */
         if (vendor_id == PCI_VENDOR_ID_IBM) {
@@ -1016,7 +1016,7 @@ void pci_for_each_device(void (*init_func)(PCIDevice *d))
 void pci_bios_init(void)
 {
     pci_bios_io_addr = 0xc000;
-    pci_bios_mem_addr = 0xf0000000;
+    pci_bios_mem_addr = 0xc0000000 + 0x1000000;
     pci_bios_bigmem_addr = ram_size;
     if (pci_bios_bigmem_addr < 0x90000000)
         pci_bios_bigmem_addr = 0x90000000;