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authorblueswir1 <blueswir1>2007-12-01 08:18:51 +0000
committerblueswir1 <blueswir1>2007-12-01 08:18:51 +0000
commit46003a79a063a28ab2f5da40242ce5dcf195a611 (patch)
tree4e9dd12c439b15f58966d3018496feaa64fbdcf2
parent7258279b5942170b587f185e8bb42f1a6cf8dfdc (diff)
Fix Sparc host compile problem reported by Shaddy Baddah
-rw-r--r--qemu/target-alpha/op_helper.c17
-rw-r--r--qemu/target-alpha/op_helper.h6
-rw-r--r--qemu/target-alpha/op_template.h8
3 files changed, 31 insertions, 0 deletions
diff --git a/qemu/target-alpha/op_helper.c b/qemu/target-alpha/op_helper.c
index 9a3009c4..072499e3 100644
--- a/qemu/target-alpha/op_helper.c
+++ b/qemu/target-alpha/op_helper.c
@@ -1072,6 +1072,23 @@ void helper_mtpr (int iprn)
}
#endif
+#if defined(HOST_SPARC) || defined(HOST_SPARC64)
+void helper_reset_FT0 (void)
+{
+ FT0 = 0;
+}
+
+void helper_reset_FT1 (void)
+{
+ FT1 = 0;
+}
+
+void helper_reset_FT2 (void)
+{
+ FT2 = 0;
+}
+#endif
+
/*****************************************************************************/
/* Softmmu support */
#if !defined (CONFIG_USER_ONLY)
diff --git a/qemu/target-alpha/op_helper.h b/qemu/target-alpha/op_helper.h
index 0c65fd4a..7e79720b 100644
--- a/qemu/target-alpha/op_helper.h
+++ b/qemu/target-alpha/op_helper.h
@@ -138,3 +138,9 @@ void helper_mtpr (int iprn);
void helper_ld_phys_to_virt (void);
void helper_st_phys_to_virt (void);
void helper_tb_flush (void);
+
+#if defined(HOST_SPARC) || defined(HOST_SPARC64)
+void helper_reset_FT0 (void);
+void helper_reset_FT1 (void);
+void helper_reset_FT2 (void);
+#endif
diff --git a/qemu/target-alpha/op_template.h b/qemu/target-alpha/op_template.h
index db15bb89..ab589f21 100644
--- a/qemu/target-alpha/op_template.h
+++ b/qemu/target-alpha/op_template.h
@@ -26,11 +26,19 @@ void OPPROTO glue(op_reset_T, REG) (void)
RETURN();
}
+#if !defined(HOST_SPARC) && !defined(HOST_SPARC64)
void OPPROTO glue(op_reset_FT, REG) (void)
{
glue(FT, REG) = 0;
RETURN();
}
+#else
+void OPPROTO glue(op_reset_FT, REG) (void)
+{
+ glue(helper_reset_FT, REG)();
+ RETURN();
+}
+#endif
/* XXX: This can be great on most RISC machines */
#if !defined(__i386__) && !defined(__x86_64__)