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path: root/tcg/arm/tcg-target.c
AgeCommit message (Expand)AuthorFilesLines
2014-05-28tcg-arm: Make debug_frame constRichard Henderson1-13/+9
2014-05-12tcg: Remove unreachable code in tcg_out_op and op_defsRichard Henderson1-29/+3
2014-05-12tcg-arm: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson1-96/+54
2014-04-18tcg: Add TCGType parameter to tcg_target_const_matchRichard Henderson1-1/+1
2014-04-18tcg: Fix warning (1 bit signed bitfield entry) and replace int by boolStefan Weil1-3/+3
2014-03-27tcg-arm: Avoid ldrd/strd for user-only emulationRichard Henderson1-4/+17
2014-02-17tcg-arm: The shift count of op_rotl_i32 is in args[2] not args[1].Huw Davies1-1/+1
2013-11-30tcg-arm: Use qemu_getauxvalRichard Henderson1-9/+5
2013-10-12tcg-arm: Improve GUEST_BASE qemu_ld/stRichard Henderson1-104/+116
2013-10-12tcg-arm: Convert to new ldst opcodesRichard Henderson1-70/+37
2013-10-12tcg-arm: Tidy variable naming convention in qemu_ld/stRichard Henderson1-115/+115
2013-10-12tcg-arm: Convert to le/be ldst helpersRichard Henderson1-21/+29
2013-10-12tcg-arm: Use TCGMemOp within qemu_ldst routinesRichard Henderson1-64/+61
2013-10-10tcg: Add tcg-be-ldst.hRichard Henderson1-24/+3
2013-10-01tcg-arm: Move the tlb addend load earlierRichard Henderson1-5/+6
2013-10-01tcg-arm: Remove restriction on qemu_ld output registerRichard Henderson1-24/+34
2013-10-01tcg-arm: Return register containing tlb addendRichard Henderson1-29/+30
2013-10-01tcg-arm: Move load of tlb addend into tcg_out_tlb_readRichard Henderson1-37/+23
2013-10-01tcg-arm: Use QEMU_BUILD_BUG_ON to verify constraints on tlbRichard Henderson1-5/+10
2013-10-01tcg-arm: Use strd for tcg_out_arg_reg64Richard Henderson1-3/+10
2013-10-01tcg-arm: Rearrange slow-path qemu_ld/stRichard Henderson1-90/+87
2013-10-01tcg-arm: Use ldrd/strd for appropriate qemu_ld/st64Richard Henderson1-5/+43
2013-09-02exec: Split softmmu_defs.hRichard Henderson1-2/+0
2013-09-02tcg: Change tcg_out_ld/st offset to intptr_tRichard Henderson1-2/+2
2013-09-02tcg: Change relocation offsets to intptr_tRichard Henderson1-4/+4
2013-07-09tcg-arm: Implement tcg_register_jitRichard Henderson1-9/+67
2013-07-09tcg-arm: Use AT_PLATFORM to detect the host ISARichard Henderson1-4/+16
2013-07-09tcg-arm: Simplify logic in detecting the ARM ISA in useRichard Henderson1-39/+23
2013-07-09tcg-arm: Rename use_armv5_instructions to use_armvt5_instructionsRichard Henderson1-6/+6
2013-07-09tcg-arm: Make use of conditional availability of opcodes for divideRichard Henderson1-2/+14
2013-07-09tcg-arm: Don't implement remRichard Henderson1-14/+0
2013-06-05tcg: Remove redundant tcg_target_init checksRichard Henderson1-6/+0
2013-05-03tcg-arm: Use movi32 in exit_tbRichard Henderson1-9/+7
2013-05-03tcg-arm: Fix 64-bit tlb load for pre-v6Richard Henderson1-1/+1
2013-04-27tcg-arm: Remove long jump from tcg_out_goto_labelRichard Henderson1-6/+1
2013-04-27tcg-arm: Convert to CONFIG_QEMU_LDST_OPTIMIZATIONRichard Henderson1-107/+202
2013-04-27tcg-arm: Use movi32 + blx for calls on v7Richard Henderson1-0/+3
2013-04-27tcg-arm: Delete the 'S' constraintRichard Henderson1-4/+2
2013-04-27tcg-arm: Improve scheduling of tcg_out_tlb_readRichard Henderson1-53/+57
2013-04-27tcg-arm: Split out tcg_out_tlb_readRichard Henderson1-99/+70
2013-04-27tcg-arm: Cleanup most primitive load store subroutinesRichard Henderson1-124/+111
2013-04-27tcg-arm: Cleanup multiply subroutinesRichard Henderson1-40/+45
2013-04-27tcg-arm: Use R12 for the tcg temporaryRichard Henderson1-1/+1
2013-04-27tcg-arm: Use TCG_REG_TMP name for the tcg temporaryRichard Henderson1-58/+60
2013-04-27tcg-arm: Implement division instructionsRichard Henderson1-0/+36
2013-04-27tcg-arm: Implement deposit for armv7Richard Henderson1-3/+38
2013-04-27tcg-arm: Improve constant generationRichard Henderson1-23/+44
2013-04-27tcg-arm: Handle constant arguments to add2/sub2Richard Henderson1-48/+58
2013-04-27tcg-arm: Use tcg_out_dat_rIN for comparesRichard Henderson1-20/+20
2013-04-27tcg-arm: Allow constant first argument to subRichard Henderson1-3/+12
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