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path: root/target-i386/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2009-05-22x86: Add support for resume flagJan Kiszka1-3/+6
2009-05-22kvm: x86: Save/restore KVM-specific CPU statesJan Kiszka1-1/+2
2009-04-19kqemu: merge CONFIG_KQEMU and USE_KQEMUblueswir11-2/+2
2009-04-18x86: Enhanced dump of segment registers (Jan Kiszka)aliguori1-1/+2
2009-03-07The _exit syscall is used for both thread termination in NPTL applications,pbrook1-1/+2
2009-02-09KVM: CPUID takes ecx as input value for some functions (Amit Shah)aliguori1-1/+1
2009-01-29MTRR support on x86, part 2 (Carl-Daniel Hailfinger)aliguori1-0/+5
2009-01-26MTRR support on x86 (Carl-Daniel Hailfinger)aliguori1-1/+26
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
2008-12-13x86 cleanupblueswir11-28/+38
2008-11-18x86: Debug register emulation (Jan Kiszka)aliguori1-1/+35
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori1-0/+8
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori1-2/+6
2008-11-17TCG variable type checking.pbrook1-2/+0
2008-11-05Add KVM support to QEMUaliguori1-0/+6
2008-11-05Split CPUID from op_helperaliguori1-0/+4
2008-11-05Add additional CPU flag definitionsaliguori1-1/+8
2008-09-29My core2duo patch introduced a vague statement of "missing features" in pbrook1-2/+10
2008-09-26Fix definition of EMX bit in cpuid (Jens Axboe).balrog1-1/+1
2008-09-25SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).balrog1-3/+3
2008-09-25Core 2 Duo specification (Alexander Graf).balrog1-0/+5
2008-09-25Clean up vendor identification (Alexander Graf).balrog1-0/+8
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook1-3/+1
2008-06-30Move CPU save/load registration to common code.pbrook1-0/+2
2008-06-29Add instruction counter.pbrook1-0/+2
2008-06-04save more CPU statebellard1-2/+2
2008-06-04SVM: added tsc_offsetbellard1-3/+4
2008-06-04reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworke...bellard1-10/+19
2008-06-04EFER loading fixes, including SVME bitbellard1-1/+1
2008-06-03Spelling fixes, by Stefan Weil.ths1-1/+1
2008-05-30Fix typo.pbrook1-1/+1
2008-05-30Move clone() register setup to target specific code. Handle fork-like clone.pbrook1-0/+9
2008-05-29Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard1-2/+0
2008-05-28moved halted field to CPU_COMMONbellard1-3/+1
2008-05-28SVM reworkbellard1-0/+6
2008-05-28variable dynamic translation buffer sizebellard1-0/+2
2008-05-25transformed TN into temporaries - add local temporaries usage when needed - o...bellard1-6/+1
2008-05-17converted condition code supprot to TCG - converted shift ops to TCGbellard1-0/+8
2008-05-12removed unused codebellard1-6/+0
2008-04-22x86/x86-64 MMU PAE fixesaurel321-1/+1
2008-04-13x86: Introduce CPU_INTERRUPT_NMIaurel321-0/+2
2008-04-083DNow! instruction set emulationaurel321-2/+6
2008-02-03Make SVM env->cr[8] a valid register (patch from TeLeMan).balrog1-1/+1
2007-11-14x86_64 linux user emulationbellard1-0/+3
2007-11-11consistent types for cpu_x86_fsave and cpu_x86_frstorbellard1-2/+2
2007-11-10added cpu_model parameter to cpu_init()bellard1-2/+1
2007-11-08removed obsolete x86 code copy supportbellard1-11/+0
2007-11-08added -cpu option for x86 (initial patch by Dan Kenigsberg)bellard1-1/+38
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer1-0/+11
2007-09-27Move get_sp_from_cpustate from cpu.h to target_signal.h.ths1-5/+0
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