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2014-04-17target-arm: A64: fix unallocated test of scalar SQXTUNAlex Bennée1-1/+1
2014-04-17arm: translate.c: Fix smlald InstructionPeter Crosthwaite1-11/+23
2014-04-17target-arm/gdbstub64.c: remove useless 'break' statement.Chen Gang1-2/+0
2014-04-17target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32Peter Maydell4-3/+13
2014-04-17target-arm: Handle the CPU being in AArch32 mode in the AArch64 set_pcPeter Maydell1-4/+8
2014-04-17target-arm: Make Cortex-A15 CBAR read-onlyPeter Maydell1-1/+1
2014-04-17target-arm: Implement CBAR for Cortex-A57Peter Maydell5-9/+42
2014-04-17target-arm: Implement Cortex-A57 implementation-defined system registersPeter Maydell1-0/+55
2014-04-17target-arm: Implement RVBAR registerPeter Maydell3-0/+16
2014-04-17target-arm: Implement AArch64 address translation operationsPeter Maydell2-31/+25
2014-04-17target-arm: Implement auxiliary fault status registersPeter Maydell1-0/+9
2014-04-17target-arm: Replace wildcarded cpreg definitions with precise ones for ARMv8Peter Maydell1-5/+91
2014-04-17target-arm: Don't expose wildcard ID register definitions for ARMv8Peter Maydell1-18/+43
2014-04-17target-arm: Remove THUMB2EE feature from AArch64 'any' CPUPeter Maydell1-1/+0
2014-04-17target-arm: Implement ISR_EL1 registerPeter Maydell1-0/+18
2014-04-17target-arm: Implement AArch64 view of ACTLRPeter Maydell1-1/+2
2014-04-17target-arm: Implement AArch64 view of CONTEXTIDRPeter Maydell2-16/+19
2014-04-17target-arm: Implement AArch64 views of AArch32 ID registersPeter Maydell1-29/+44
2014-04-17target-arm: Add Cortex-A57 processorPeter Maydell1-0/+43
2014-04-17target-arm: Implement ARMv8 MVFR registersPeter Maydell5-2/+23
2014-04-17target-arm: Implement AArch64 EL1 exception handlingRob Herring6-0/+143
2014-04-17target-arm: Move arm_log_exception() into internals.hPeter Maydell2-31/+31
2014-04-17target-arm: Implement AArch64 SPSR_EL1Peter Maydell5-11/+40
2014-04-17target-arm: Implement SP_EL0, SP_EL1Peter Maydell6-7/+100
2014-04-17target-arm: Add AArch64 ELR_EL1 register.Peter Maydell4-4/+24
2014-04-17target-arm: Implement AArch64 views of fault status and data registersRob Herring3-18/+29
2014-04-17target-arm: Use dedicated CPU state fields for ARM946 access bit registersPeter Maydell2-10/+16
2014-04-17target-arm: A64: Implement DC ZVAPeter Maydell6-6/+128
2014-04-17target-arm: Don't mention PMU in debug feature registerPeter Maydell1-1/+6
2014-04-17target-arm: Add v8 mmu translation supportRob Herring1-32/+77
2014-04-17target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1Peter Maydell2-1/+40
2014-04-17target-arm: A64: Add assertion that FP access was checkedPeter Maydell2-24/+59
2014-04-17target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN setPeter Maydell5-6/+320
2014-04-17target-arm: Provide syndrome information for MMU faultsRob Herring2-0/+25
2014-04-17target-arm: Add support for generating exceptions with syndrome informationPeter Maydell6-54/+140
2014-04-17target-arm: Provide correct syndrome information for cpreg access trapsPeter Maydell5-7/+184
2014-04-17target-arm: Define exception record for AArch64 exceptionsPeter Maydell3-9/+32
2014-04-17target-arm: Implement AArch64 DAIF system registerPeter Maydell2-1/+21
2014-04-17target-arm: Split out private-to-target functions into internals.hPeter Maydell8-20/+55
2014-03-27target-arm: Add missing 'static' attributeStefan Weil1-1/+1
2014-03-24target-arm: Fix A64 Neon MLSPeter Maydell1-1/+1
2014-03-18target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD)Alex Bennée3-10/+284
2014-03-18target-arm: A64: Add saturating int ops (SQNEG/SQABS)Alex Bennée3-12/+75
2014-03-17target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)Alex Bennée4-37/+140
2014-03-17target-arm: A64: Implement FCVTXNPeter Maydell3-1/+43
2014-03-17target-arm: A64: Implement scalar saturating narrow opsAlex Bennée1-7/+28
2014-03-17target-arm: A64: Move handle_2misc_narrow functionAlex Bennée1-90/+90
2014-03-17target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPEAlex Bennée4-42/+195
2014-03-17target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categoriesPeter Maydell1-2/+78
2014-03-17target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHLPeter Maydell1-0/+132
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