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-rw-r--r--include/exec/cpu-all.h5
-rw-r--r--include/exec/hwaddr.h1
-rw-r--r--include/exec/user/thunk.h15
-rw-r--r--include/hw/acpi/aml-build.h1
-rw-r--r--include/hw/acpi/bios-linker-loader.h1
-rw-r--r--include/hw/i386/ich9.h4
-rw-r--r--include/hw/qdev-properties.h10
-rw-r--r--include/qemu-common.h4
-rw-r--r--include/qemu/bitmap.h1
-rw-r--r--include/qemu/fifo32.h1
-rw-r--r--include/qemu/host-utils.h2
-rw-r--r--include/qemu/rcu.h1
-rw-r--r--include/qom/object.h1
-rw-r--r--include/sysemu/tpm_backend_int.h1
14 files changed, 17 insertions, 31 deletions
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 3911576431..9f38edf419 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -34,14 +34,9 @@
/* some important defines:
*
- * WORDS_ALIGNED : if defined, the host cpu can only make word aligned
- * memory accesses.
- *
* HOST_WORDS_BIGENDIAN : if defined, the host cpu is big endian and
* otherwise little endian.
*
- * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))
- *
* TARGET_WORDS_BIGENDIAN : same for target cpu
*/
diff --git a/include/exec/hwaddr.h b/include/exec/hwaddr.h
index bb41588b9d..a71c93cc81 100644
--- a/include/exec/hwaddr.h
+++ b/include/exec/hwaddr.h
@@ -3,7 +3,6 @@
#ifndef HWADDR_H
#define HWADDR_H
-#include <inttypes.h>
#define HWADDR_BITS 64
/* hwaddr is the type of a physical address (its size can
diff --git a/include/exec/user/thunk.h b/include/exec/user/thunk.h
index ad1d60266e..f19ef4b230 100644
--- a/include/exec/user/thunk.h
+++ b/include/exec/user/thunk.h
@@ -60,10 +60,10 @@ typedef struct {
/* Translation table for bitmasks... */
typedef struct bitmask_transtbl {
- unsigned int x86_mask;
- unsigned int x86_bits;
- unsigned int alpha_mask;
- unsigned int alpha_bits;
+ unsigned int target_mask;
+ unsigned int target_bits;
+ unsigned int host_mask;
+ unsigned int host_bits;
} bitmask_transtbl;
void thunk_register_struct(int id, const char *name, const argtype *types);
@@ -71,7 +71,6 @@ void thunk_register_struct_direct(int id, const char *name,
const StructEntry *se1);
const argtype *thunk_convert(void *dst, const void *src,
const argtype *type_ptr, int to_host);
-#ifndef NO_THUNK_TYPE_SIZE
extern StructEntry *struct_entries;
@@ -178,11 +177,9 @@ static inline int thunk_type_align(const argtype *type_ptr, int is_host)
}
}
-#endif /* NO_THUNK_TYPE_SIZE */
-
-unsigned int target_to_host_bitmask(unsigned int x86_mask,
+unsigned int target_to_host_bitmask(unsigned int target_mask,
const bitmask_transtbl * trans_tbl);
-unsigned int host_to_target_bitmask(unsigned int alpha_mask,
+unsigned int host_to_target_bitmask(unsigned int host_mask,
const bitmask_transtbl * trans_tbl);
void thunk_init(unsigned int max_structs);
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index 3952f85eeb..10c09ca29f 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -1,7 +1,6 @@
#ifndef HW_ACPI_GEN_UTILS_H
#define HW_ACPI_GEN_UTILS_H
-#include <glib.h>
#include "hw/acpi/acpi-defs.h"
#include "hw/acpi/bios-linker-loader.h"
diff --git a/include/hw/acpi/bios-linker-loader.h b/include/hw/acpi/bios-linker-loader.h
index a05227eb30..fa1e5d1a4e 100644
--- a/include/hw/acpi/bios-linker-loader.h
+++ b/include/hw/acpi/bios-linker-loader.h
@@ -1,7 +1,6 @@
#ifndef BIOS_LINKER_LOADER_H
#define BIOS_LINKER_LOADER_H
-#include <glib.h>
typedef struct BIOSLinker {
GArray *cmd_blob;
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index d04dcdcfb3..88233c3077 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -35,7 +35,7 @@ typedef struct ICH9LPCState {
/* (pci device, intx) -> pirq
* In real chipset case, the unused slots are never used
- * as ICH9 supports only D25-D32 irq routing.
+ * as ICH9 supports only D25-D31 irq routing.
* On the other hand in qemu case, any slot/function can be populated
* via command line option.
* So fallback interrupt routing for any devices in any slots is necessary.
@@ -181,7 +181,7 @@ Object *ich9_lpc_find(void);
#define ICH9_SATA1_DEV 31
#define ICH9_SATA1_FUNC 2
-/* D30:F1 power management I/O registers
+/* D31:F0 power management I/O registers
offset from the address ICH9_LPC_PMBASE */
/* ICH9 LPC PM I/O registers are 128 ports and 128-aligned */
diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h
index 0586cacceb..034b75acc5 100644
--- a/include/hw/qdev-properties.h
+++ b/include/hw/qdev-properties.h
@@ -197,8 +197,14 @@ void error_set_from_qdev_prop_error(Error **errp, int ret, DeviceState *dev,
Property *prop, const char *value);
/**
- * @qdev_property_add_static - add a @Property to a device referencing a
- * field in a struct.
+ * qdev_property_add_static:
+ * @dev: Device to add the property to.
+ * @prop: The qdev property definition.
+ * @errp: location to store error information.
+ *
+ * Add a static QOM property to @dev for qdev property @prop.
+ * On error, store error in @errp. Static properties access data in a struct.
+ * The type of the QOM property is derived from prop->info.
*/
void qdev_property_add_static(DeviceState *dev, Property *prop, Error **errp);
diff --git a/include/qemu-common.h b/include/qemu-common.h
index 835cbc68b8..1f2cb94318 100644
--- a/include/qemu-common.h
+++ b/include/qemu-common.h
@@ -14,10 +14,6 @@
#include "qemu/fprintf-fn.h"
-#if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__) || defined(__ia64__)
-#define WORDS_ALIGNED
-#endif
-
#define TFR(expr) do { if ((expr) != -1) break; } while (errno == EINTR)
#include "qemu/option.h"
diff --git a/include/qemu/bitmap.h b/include/qemu/bitmap.h
index 0e33fa5d9d..ec5146f84e 100644
--- a/include/qemu/bitmap.h
+++ b/include/qemu/bitmap.h
@@ -12,7 +12,6 @@
#ifndef BITMAP_H
#define BITMAP_H
-#include <glib.h>
#include "qemu/bitops.h"
diff --git a/include/qemu/fifo32.h b/include/qemu/fifo32.h
index 2e5a0ccddf..4e9fd1b5ef 100644
--- a/include/qemu/fifo32.h
+++ b/include/qemu/fifo32.h
@@ -15,7 +15,6 @@
#ifndef FIFO32_H
#define FIFO32_H
-#include "qemu/osdep.h"
#include "qemu/fifo8.h"
typedef struct {
diff --git a/include/qemu/host-utils.h b/include/qemu/host-utils.h
index 1cdae0d0ed..3de7d4ec55 100644
--- a/include/qemu/host-utils.h
+++ b/include/qemu/host-utils.h
@@ -486,7 +486,7 @@ static inline uint64_t revbit64(uint64_t x)
static inline bool is_power_of_2(uint64_t value)
{
if (!value) {
- return 0;
+ return false;
}
return !(value & (value - 1));
diff --git a/include/qemu/rcu.h b/include/qemu/rcu.h
index 56d3a682a9..83ae2808be 100644
--- a/include/qemu/rcu.h
+++ b/include/qemu/rcu.h
@@ -23,7 +23,6 @@
* IBM's contributions to this file may be relicensed under LGPLv2 or later.
*/
-#include <glib.h>
#include "qemu/thread.h"
#include "qemu/queue.h"
diff --git a/include/qom/object.h b/include/qom/object.h
index 21bb5ff149..99de539e7c 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -14,7 +14,6 @@
#ifndef QEMU_OBJECT_H
#define QEMU_OBJECT_H
-#include <glib.h>
#include "qapi-types.h"
#include "qemu/queue.h"
diff --git a/include/sysemu/tpm_backend_int.h b/include/sysemu/tpm_backend_int.h
index 40f693a0cc..cc0dcb3fd2 100644
--- a/include/sysemu/tpm_backend_int.h
+++ b/include/sysemu/tpm_backend_int.h
@@ -22,7 +22,6 @@
#ifndef TPM_TPM_BACKEND_H
#define TPM_TPM_BACKEND_H
-#include <glib.h>
typedef struct TPMBackendThread {
GThreadPool *pool;
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-04 20:29:18 +0000