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-rw-r--r--cpu-exec.c8
-rw-r--r--include/qom/cpu.h5
-rw-r--r--target-alpha/cpu.h5
-rw-r--r--target-arm/cpu.h5
-rw-r--r--target-cris/cpu.h4
-rw-r--r--target-i386/cpu.c8
-rw-r--r--target-i386/cpu.h5
-rw-r--r--target-lm32/cpu.h5
-rw-r--r--target-m68k/cpu.h5
-rw-r--r--target-microblaze/cpu.h5
-rw-r--r--target-mips/cpu.c11
-rw-r--r--target-mips/cpu.h7
-rw-r--r--target-moxie/cpu.h5
-rw-r--r--target-openrisc/cpu.h5
-rw-r--r--target-ppc/cpu.h5
-rw-r--r--target-s390x/cpu.h5
-rw-r--r--target-sh4/cpu.c9
-rw-r--r--target-sh4/cpu.h6
-rw-r--r--target-sparc/cpu.c9
-rw-r--r--target-sparc/cpu.h6
-rw-r--r--target-unicore32/cpu.h5
-rw-r--r--target-xtensa/cpu.h5
22 files changed, 49 insertions, 84 deletions
diff --git a/cpu-exec.c b/cpu-exec.c
index 6c784a7e09..3fccb8617e 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -59,8 +59,14 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
* counter hit zero); we must restore the guest PC to the address
* of the start of the TB.
*/
+ CPUClass *cc = CPU_GET_CLASS(cpu);
TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
- cpu_pc_from_tb(env, tb);
+ if (cc->synchronize_from_tb) {
+ cc->synchronize_from_tb(cpu, tb);
+ } else {
+ assert(cc->set_pc);
+ cc->set_pc(cpu, tb->pc);
+ }
}
if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
/* We were asked to stop executing TBs (probably a pending
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 4620fee540..4e5ec77919 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -60,6 +60,8 @@ typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
bool is_write, bool is_exec, int opaque,
unsigned size);
+struct TranslationBlock;
+
/**
* CPUClass:
* @class_by_name: Callback to map -cpu command line model name to an
@@ -74,6 +76,8 @@ typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
* @get_paging_enabled: Callback for inquiring whether paging is enabled.
* @get_memory_mapping: Callback for obtaining the memory mappings.
* @set_pc: Callback for setting the Program Counter register.
+ * @synchronize_from_tb: Callback for synchronizing state from a TCG
+ * #TranslationBlock.
* @vmsd: State description for migration.
*
* Represents a CPU family or model.
@@ -98,6 +102,7 @@ typedef struct CPUClass {
void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
Error **errp);
void (*set_pc)(CPUState *cpu, vaddr value);
+ void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
const struct VMStateDescription *vmsd;
int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 066f0324e2..c85dc6e575 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -515,9 +515,4 @@ static inline bool cpu_has_work(CPUState *cpu)
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUAlphaState *env, TranslationBlock *tb)
-{
- env->pc = tb->pc;
-}
-
#endif /* !defined (__CPU_ALPHA_H__) */
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index c798b272a0..b2dc49413c 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -797,11 +797,6 @@ static inline bool cpu_has_work(CPUState *cpu)
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUARMState *env, TranslationBlock *tb)
-{
- env->regs[15] = tb->pc;
-}
-
/* Load an instruction and return it in the standard little-endian order */
static inline uint32_t arm_ldl_code(CPUARMState *env, uint32_t addr,
bool do_swap)
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index c12a8caea1..4b9fc4cb45 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -279,8 +279,4 @@ static inline bool cpu_has_work(CPUState *cpu)
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUCRISState *env, TranslationBlock *tb)
-{
- env->pc = tb->pc;
-}
#endif
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 67b095d17f..b57ea4b6f2 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2513,6 +2513,13 @@ static void x86_cpu_set_pc(CPUState *cs, vaddr value)
cpu->env.eip = value;
}
+static void x86_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+{
+ X86CPU *cpu = X86_CPU(cs);
+
+ cpu->env.eip = tb->pc - tb->cs_base;
+}
+
static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
{
X86CPUClass *xcc = X86_CPU_CLASS(oc);
@@ -2530,6 +2537,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
cc->do_interrupt = x86_cpu_do_interrupt;
cc->dump_state = x86_cpu_dump_state;
cc->set_pc = x86_cpu_set_pc;
+ cc->synchronize_from_tb = x86_cpu_synchronize_from_tb;
cc->get_arch_id = x86_cpu_get_arch_id;
cc->get_paging_enabled = x86_cpu_get_paging_enabled;
#ifndef CONFIG_USER_ONLY
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 2d005b3ce9..cedefdc423 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1148,11 +1148,6 @@ static inline bool cpu_has_work(CPUState *cs)
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUX86State *env, TranslationBlock *tb)
-{
- env->eip = tb->pc - tb->cs_base;
-}
-
static inline void cpu_get_tb_cpu_state(CPUX86State *env, target_ulong *pc,
target_ulong *cs_base, int *flags)
{
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 856bdc745c..dbfe043551 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -232,9 +232,4 @@ static inline bool cpu_has_work(CPUState *cpu)
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPULM32State *env, TranslationBlock *tb)
-{
- env->pc = tb->pc;
-}
-
#endif
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 9fdf89ef91..cfd6846347 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -260,9 +260,4 @@ static inline bool cpu_has_work(CPUState *cpu)
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUM68KState *env, TranslationBlock *tb)
-{
- env->pc = tb->pc;
-}
-
#endif
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 6c35475fd6..7508cf5a06 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -365,9 +365,4 @@ static inline bool cpu_has_work(CPUState *cpu)
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUMBState *env, TranslationBlock *tb)
-{
- env->sregs[SR_PC] = tb->pc;
-}
-
#endif
diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index 6ec3d252e5..1581cd976e 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -35,6 +35,16 @@ static void mips_cpu_set_pc(CPUState *cs, vaddr value)
}
}
+static void mips_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+{
+ MIPSCPU *cpu = MIPS_CPU(cs);
+ CPUMIPSState *env = &cpu->env;
+
+ env->active_tc.PC = tb->pc;
+ env->hflags &= ~MIPS_HFLAG_BMASK;
+ env->hflags |= tb->flags & MIPS_HFLAG_BMASK;
+}
+
/* CPUClass::reset() */
static void mips_cpu_reset(CPUState *s)
{
@@ -90,6 +100,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
cc->dump_state = mips_cpu_dump_state;
cpu_class_set_do_unassigned_access(cc, mips_cpu_unassigned_access);
cc->set_pc = mips_cpu_set_pc;
+ cc->synchronize_from_tb = mips_cpu_synchronize_from_tb;
}
static const TypeInfo mips_cpu_type_info = {
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 7ffd2e36bd..a29c82faf1 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -732,13 +732,6 @@ static inline bool cpu_has_work(CPUState *cpu)
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUMIPSState *env, TranslationBlock *tb)
-{
- env->active_tc.PC = tb->pc;
- env->hflags &= ~MIPS_HFLAG_BMASK;
- env->hflags |= tb->flags & MIPS_HFLAG_BMASK;
-}
-
static inline void compute_hflags(CPUMIPSState *env)
{
env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 |
diff --git a/target-moxie/cpu.h b/target-moxie/cpu.h
index 72d02c20c1..d5030a4c34 100644
--- a/target-moxie/cpu.h
+++ b/target-moxie/cpu.h
@@ -143,11 +143,6 @@ static inline int cpu_mmu_index(CPUMoxieState *env)
#include "exec/cpu-all.h"
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUMoxieState *env, TranslationBlock *tb)
-{
- env->pc = tb->pc;
-}
-
static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
target_ulong *cs_base, int *flags)
{
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index 0aff8f20c7..82bfd03ec1 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -428,9 +428,4 @@ static inline target_ulong cpu_get_pc(CPUOpenRISCState *env)
return env->pc;
}
-static inline void cpu_pc_from_tb(CPUOpenRISCState *env, TranslationBlock *tb)
-{
- env->pc = tb->pc;
-}
-
#endif /* CPU_OPENRISC_H */
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 7a7b1bf35a..6f51e1f526 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2144,11 +2144,6 @@ static inline bool cpu_has_work(CPUState *cpu)
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUPPCState *env, TranslationBlock *tb)
-{
- env->nip = tb->pc;
-}
-
void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env);
#endif /* !defined (__CPU_PPC_H__) */
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 646268858b..65bef8625f 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -1041,11 +1041,6 @@ static inline bool cpu_has_work(CPUState *cpu)
(env->psw.mask & PSW_MASK_EXT);
}
-static inline void cpu_pc_from_tb(CPUS390XState *env, TranslationBlock* tb)
-{
- env->psw.addr = tb->pc;
-}
-
/* fpu_helper.c */
uint32_t set_cc_nz_f32(float32 v);
uint32_t set_cc_nz_f64(float64 v);
diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c
index facbd18d55..03dedc179e 100644
--- a/target-sh4/cpu.c
+++ b/target-sh4/cpu.c
@@ -31,6 +31,14 @@ static void superh_cpu_set_pc(CPUState *cs, vaddr value)
cpu->env.pc = value;
}
+static void superh_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+{
+ SuperHCPU *cpu = SUPERH_CPU(cs);
+
+ cpu->env.pc = tb->pc;
+ cpu->env.flags = tb->flags;
+}
+
/* CPUClass::reset() */
static void superh_cpu_reset(CPUState *s)
{
@@ -277,6 +285,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
cc->do_interrupt = superh_cpu_do_interrupt;
cc->dump_state = superh_cpu_dump_state;
cc->set_pc = superh_cpu_set_pc;
+ cc->synchronize_from_tb = superh_cpu_synchronize_from_tb;
dc->vmsd = &vmstate_sh_cpu;
}
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index c8df18bab1..276d2955c3 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -359,10 +359,4 @@ static inline bool cpu_has_work(CPUState *cpu)
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUSH4State *env, TranslationBlock *tb)
-{
- env->pc = tb->pc;
- env->flags = tb->flags;
-}
-
#endif /* _CPU_SH4_H */
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 88582c6a9b..a2deba5a06 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -731,6 +731,14 @@ static void sparc_cpu_set_pc(CPUState *cs, vaddr value)
cpu->env.npc = value + 4;
}
+static void sparc_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+{
+ SPARCCPU *cpu = SPARC_CPU(cs);
+
+ cpu->env.pc = tb->pc;
+ cpu->env.npc = tb->cs_base;
+}
+
static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
{
SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev);
@@ -776,6 +784,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
cc->dump_state = sparc_cpu_dump_state;
cpu_class_set_do_unassigned_access(cc, sparc_cpu_unassigned_access);
cc->set_pc = sparc_cpu_set_pc;
+ cc->synchronize_from_tb = sparc_cpu_synchronize_from_tb;
}
static const TypeInfo sparc_cpu_type_info = {
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 41b014a0b3..0f35a2216f 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -759,10 +759,4 @@ static inline bool cpu_has_work(CPUState *cpu)
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUSPARCState *env, TranslationBlock *tb)
-{
- env->pc = tb->pc;
- env->npc = tb->cs_base;
-}
-
#endif
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index d4be5252f3..967511e3f6 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -146,11 +146,6 @@ static inline int cpu_mmu_index(CPUUniCore32State *env)
#include "cpu-qom.h"
#include "exec/exec-all.h"
-static inline void cpu_pc_from_tb(CPUUniCore32State *env, TranslationBlock *tb)
-{
- env->regs[31] = tb->pc;
-}
-
static inline void cpu_get_tb_cpu_state(CPUUniCore32State *env, target_ulong *pc,
target_ulong *cs_base, int *flags)
{
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 6c9fc35dcc..a8f02f6e4b 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -522,9 +522,4 @@ static inline int cpu_has_work(CPUState *cpu)
return env->pending_irq_level;
}
-static inline void cpu_pc_from_tb(CPUXtensaState *env, TranslationBlock *tb)
-{
- env->pc = tb->pc;
-}
-
#endif
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-01 01:26:43 +0000