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| author | Max Filippov <jcmvbkbc@gmail.com> | 2018-09-10 18:23:35 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2018-09-17 11:09:04 -0700 |
| commit | 7a54cfbcee8dd7aa87ce655a321b622107556326 (patch) | |
| tree | d68ec569f6bd6269526a658aa32a89745d72d720 /target/xtensa | |
| parent | f68774ccd8174dc80208dcb3b24924c7c1c726f9 (diff) | |
target/xtensa: fix s32c1i TCGMemOp flags
s32c1i must load and store value with target endianness, not host.
This results in an infinite loop in atomic cmpxchg sequences when target
endianness doesn't match host endianness.
Fixes: 9fb40342d4b3 ("target/xtensa: support MTTCG")
Cc: qemu-stable@nongnu.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/xtensa')
| -rw-r--r-- | target/xtensa/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 25399058a0..c626583cd9 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -2288,7 +2288,7 @@ static void translate_s32c1i(DisasContext *dc, const uint32_t arg[], gen_load_store_alignment(dc, 2, addr, true); gen_check_atomctl(dc, addr); tcg_gen_atomic_cmpxchg_i32(cpu_R[arg[0]], addr, cpu_SR[SCOMPARE1], - tmp, dc->cring, MO_32); + tmp, dc->cring, MO_TEUL); tcg_temp_free(addr); tcg_temp_free(tmp); } |