diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2012-05-02 16:49:41 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-06-19 13:24:44 +0000 |
| commit | 84e4fccb7f63ee2b9ac82c299d29b2a723479e3d (patch) | |
| tree | 55aebfdb83f686863c0008239dfe9b9b8ff568ac /hw/arm_gic.c | |
| parent | 6b9680bb5826dcf0ead42bafb62946f472466d63 (diff) | |
hw/arm_gic.c: Make NVIC interrupt numbering a runtime setting
Make the minor tweaks to interrupt numbering used by the NVIC
a runtime setting rather than a compile time one, so we can
drop more NVIC ifdefs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm_gic.c')
| -rw-r--r-- | hw/arm_gic.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/hw/arm_gic.c b/hw/arm_gic.c index a6e2431c20..c288bc5db8 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -36,13 +36,9 @@ do { printf("arm_gic: " fmt , ## __VA_ARGS__); } while (0) #define DPRINTF(fmt, ...) do {} while(0) #endif -#ifdef NVIC /* The NVIC has 16 internal vectors. However these are not exposed through the normal GIC interface. */ -#define GIC_BASE_IRQ 32 -#else -#define GIC_BASE_IRQ 0 -#endif +#define GIC_BASE_IRQ ((s->revision == REV_NVIC) ? 32 : 0) static const uint8_t gic_id[] = { 0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 @@ -839,7 +835,6 @@ static void gic_init(gic_state *s, int num_irq) } i = s->num_irq - GIC_INTERNAL; -#ifndef NVIC /* For the GIC, also expose incoming GPIO lines for PPIs for each CPU. * GPIO array layout is thus: * [0..N-1] SPIs @@ -847,8 +842,9 @@ static void gic_init(gic_state *s, int num_irq) * [N+32..N+63] PPIs for CPU 1 * ... */ - i += (GIC_INTERNAL * s->num_cpu); -#endif + if (s->revision != REV_NVIC) { + i += (GIC_INTERNAL * s->num_cpu); + } qdev_init_gpio_in(&s->busdev.qdev, gic_set_irq, i); for (i = 0; i < NUM_CPU(s); i++) { sysbus_init_irq(&s->busdev, &s->parent_irq[i]); |