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authorShawn Guo <shawn.guo@freescale.com>2014-09-01 14:17:48 +0800
committerShawn Guo <shawn.guo@freescale.com>2014-09-16 10:06:48 +0800
commitb1f156db47ae914a308488ce28e84f3d4ad4f667 (patch)
treeaa6508f3f033301952702c5aaad01f520e78b118 /arch/score
parent19d863446a6b75b2f97b3012acf67c40b9f2ea1f (diff)
ARM: imx6q: add BYPASS support for PLL clocks
The imx6q clock driver currently hard-codes all PLL clocks to source from OSC24M without BYPASS support. The patch adds the missing lvds_in clock which is mutually exclusive with lvds_gate, and implements BYPASS and BYPASS_CLK_SRC selection for PLL clocks as per Figure 10-3. Primary Clock Generation in IMX6DQRM, i.e. both BYPASS_CLK_SRC and BYPASS bits are implemented as mux clocks, and ENABLE bit of PLL clocks is implemented as a gate clock after BYPASS mux. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/score')
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