Fix op2 macro arguments for rv770 pm4 tri test

1 files changed, 88 insertions, 88 deletions

diff --git a/r600_pm4.c b/r600_pm4.c
index deb849e..69f28af 100644
--- a/r600_pm4.c
+++ b/r600_pm4.c
@@ -1894,7 +1894,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -1902,7 +1902,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(127),
 		       DST_REL(ABSOLUTE),
@@ -1920,7 +1920,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -1928,7 +1928,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -1946,7 +1946,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -1954,7 +1954,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -1972,7 +1972,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -1980,7 +1980,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -1998,15 +1998,15 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(1)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
 		       UPDATE_PRED(0),
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
-		       OMOD(SQ_ALU_OMOD_M4),
-		       ALU_INST(SQ_OP2_INST_SETE_DX10),
+		       OMOD(SQ_ALU_OMOD_OFF),
+		       ALU_INST(SQ_OP2_INST_MOV),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2024,7 +2024,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2032,7 +2032,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2050,7 +2050,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2058,7 +2058,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(127),
 		       DST_REL(ABSOLUTE),
@@ -2076,7 +2076,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2084,7 +2084,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2102,7 +2102,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2110,7 +2110,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2128,15 +2128,15 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(1)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
 		       UPDATE_PRED(0),
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
-		       OMOD(SQ_ALU_OMOD_M4),
-		       ALU_INST(SQ_OP2_INST_SETE_DX10),
+		       OMOD(SQ_ALU_OMOD_OFF),
+		       ALU_INST(SQ_OP2_INST_MOV),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2154,7 +2154,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2162,7 +2162,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2180,7 +2180,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2188,7 +2188,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2206,7 +2206,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2214,7 +2214,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(127),
 		       DST_REL(ABSOLUTE),
@@ -2232,7 +2232,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2240,7 +2240,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2258,15 +2258,15 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(1)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
 		       UPDATE_PRED(0),
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
-		       OMOD(SQ_ALU_OMOD_M4),
-		       ALU_INST(SQ_OP2_INST_SETE_DX10),
+		       OMOD(SQ_ALU_OMOD_OFF),
+		       ALU_INST(SQ_OP2_INST_MOV),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2284,7 +2284,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2292,7 +2292,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2310,7 +2310,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2318,7 +2318,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2336,7 +2336,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2344,7 +2344,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2362,7 +2362,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2370,7 +2370,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(127),
 		       DST_REL(ABSOLUTE),
@@ -2388,15 +2388,15 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(1)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
 		       UPDATE_PRED(0),
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
-		       OMOD(SQ_ALU_OMOD_M4),
-		       ALU_INST(SQ_OP2_INST_SETE_DX10),
+		       OMOD(SQ_ALU_OMOD_OFF),
+		       ALU_INST(SQ_OP2_INST_MOV),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2414,7 +2414,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2422,7 +2422,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(1),
 		       DST_REL(ABSOLUTE),
@@ -2440,7 +2440,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2448,7 +2448,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2466,7 +2466,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2474,7 +2474,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2492,7 +2492,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(1)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2500,7 +2500,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2518,7 +2518,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2526,7 +2526,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2544,7 +2544,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2552,7 +2552,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(1),
 		       DST_REL(ABSOLUTE),
@@ -2570,7 +2570,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2578,7 +2578,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2596,7 +2596,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(1)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2604,7 +2604,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2622,7 +2622,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2630,7 +2630,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2648,7 +2648,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2656,7 +2656,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2674,7 +2674,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2682,7 +2682,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(1),
 		       DST_REL(ABSOLUTE),
@@ -2700,7 +2700,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(1)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2708,7 +2708,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2726,7 +2726,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2734,7 +2734,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2752,7 +2752,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2760,7 +2760,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2778,7 +2778,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2786,7 +2786,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(0),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2804,7 +2804,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(1)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
@@ -2812,7 +2812,7 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
 		       OMOD(SQ_ALU_OMOD_OFF),
-		       ALU_INST(SQ_OP2_INST_PRED_SETE_PUSH),
+		       ALU_INST(SQ_OP2_INST_DOT4),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(1),
 		       DST_REL(ABSOLUTE),
@@ -2864,15 +2864,15 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
 		       UPDATE_PRED(0),
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
-		       OMOD(SQ_ALU_OMOD_M4),
-		       ALU_INST(SQ_OP2_INST_SETE_DX10),
+		       OMOD(SQ_ALU_OMOD_OFF),
+		       ALU_INST(SQ_OP2_INST_MOV),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2890,15 +2890,15 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
 		       UPDATE_PRED(0),
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
-		       OMOD(SQ_ALU_OMOD_M4),
-		       ALU_INST(SQ_OP2_INST_SETE_DX10),
+		       OMOD(SQ_ALU_OMOD_OFF),
+		       ALU_INST(SQ_OP2_INST_MOV),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2916,15 +2916,15 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(0)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
 		       UPDATE_PRED(0),
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
-		       OMOD(SQ_ALU_OMOD_M4),
-		       ALU_INST(SQ_OP2_INST_SETE_DX10),
+		       OMOD(SQ_ALU_OMOD_OFF),
+		       ALU_INST(SQ_OP2_INST_MOV),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),
@@ -2942,15 +2942,15 @@ void pm4play_tri_test_r7xx(adapter_t *adapt)
 		   INDEX_MODE(SQ_INDEX_AR_X),
 		   PRED_SEL(SQ_PRED_SEL_OFF),
 		   LAST(1)),
-	ALU_DWORD1_OP2(CHIPSET_R600,  /* FIXME: Macro arguments are wrong for CHIPSET_RV770 */
+	ALU_DWORD1_OP2(CHIPSET_RV770,
 		       SRC0_ABS(0),
 		       SRC1_ABS(0),
 		       UPDATE_EXECUTE_MASK(0),
 		       UPDATE_PRED(0),
 		       WRITE_MASK(1),
 		       FOG_MERGE(0),
-		       OMOD(SQ_ALU_OMOD_M4),
-		       ALU_INST(SQ_OP2_INST_SETE_DX10),
+		       OMOD(SQ_ALU_OMOD_OFF),
+		       ALU_INST(SQ_OP2_INST_MOV),
 		       BANK_SWIZZLE(SQ_ALU_VEC_012),
 		       DST_GPR(0),
 		       DST_REL(ABSOLUTE),