diff options
| author | Kevin E Martin <kem@kem.org> | 2001-01-03 19:53:06 +0000 |
|---|---|---|
| committer | Kevin E Martin <kem@kem.org> | 2001-01-03 19:53:06 +0000 |
| commit | ba08f7f687d386558147395b7bd2726c86021518 (patch) | |
| tree | 5a020d72a0ffe6de06adc562050b05b52b3670fa | |
| parent | 9649e63ba25982d1605aef2b6cf3547dab727100 (diff) | |
- Remove UseCPfor2D option since it is no longer needed/used
- Disable in-memory scratch register shadows since they do not always work
- Fix r128_do_wait_for_idle to wait for the gui to become idle after fifo
has been drained (apply same fix as I made yesterday to radeon code)
| -rw-r--r-- | linux/r128_cce.c | 2 | ||||
| -rw-r--r-- | linux/radeon_cp.c | 11 |
2 files changed, 11 insertions, 2 deletions
diff --git a/linux/r128_cce.c b/linux/r128_cce.c index d2afabe9..6df2b45a 100644 --- a/linux/r128_cce.c +++ b/linux/r128_cce.c @@ -174,7 +174,7 @@ static int r128_do_wait_for_idle( drm_r128_private_t *dev_priv ) int i, ret; ret = r128_do_wait_for_fifo( dev_priv, 64 ); - if ( !ret ) return ret; + if ( ret < 0 ) return ret; for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { if ( !(R128_READ( R128_GUI_STAT ) & R128_GUI_ACTIVE) ) { diff --git a/linux/radeon_cp.c b/linux/radeon_cp.c index ef7a946e..0df883c6 100644 --- a/linux/radeon_cp.c +++ b/linux/radeon_cp.c @@ -394,7 +394,7 @@ static int radeon_do_wait_for_idle( drm_radeon_private_t *dev_priv ) int i, ret; ret = radeon_do_wait_for_fifo( dev_priv, 64 ); - if ( ret ) return ret; + if ( ret < 0 ) return ret; for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { if ( !(RADEON_READ( RADEON_RBBM_STATUS ) @@ -736,13 +736,17 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init ) dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1; +#if 0 /* Initialize the scratch register pointer. This will cause * the scratch register values to be written out to memory * whenever they are updated. + * FIXME: This doesn't quite work yet, so we're disabling it + * for the release. */ RADEON_WRITE( RADEON_SCRATCH_ADDR, (dev_priv->ring_rptr->offset + RADEON_SCRATCH_REG_OFFSET) ); RADEON_WRITE( RADEON_SCRATCH_UMSK, 0x7 ); +#endif dev_priv->scratch = ((__volatile__ u32 *) dev_priv->ring_rptr->handle + @@ -1102,7 +1106,12 @@ drm_buf_t *radeon_freelist_get( drm_device_t *dev ) start = dev_priv->last_buf; #endif for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) { +#if 0 + /* FIXME: Disable this for now */ u32 done_age = dev_priv->scratch[RADEON_LAST_DISPATCH]; +#else + u32 done_age = RADEON_READ( RADEON_LAST_DISPATCH_REG ); +#endif #if ROTATE_BUFS for ( i = start ; i < dma->buf_count ; i++ ) { #else |