diff options
author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2016-06-23 14:01:33 -0700 |
---|---|---|
committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2016-06-29 10:22:52 -0700 |
commit | 22b6e33fe2e8346138ed7d8bd440c05ec4e6465f (patch) | |
tree | 983099a6429b503492068fea30173e772c38e154 | |
parent | 625d1810ad1f61dd4f4b2b2ee7e5cc67e1fdc2f1 (diff) |
intel: Add more Kabylake PCI IDs.
The spec has been updated adding new PCI IDs.
v2: Avoid using "H" instead of HALO to keep names uniform - DK.
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
-rw-r--r-- | intel/intel_chipset.h | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index e2554c3f..6b8d4e96 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -194,7 +194,9 @@ #define PCI_CHIP_KABYLAKE_ULT_GT2 0x5916 #define PCI_CHIP_KABYLAKE_ULT_GT1_5 0x5913 #define PCI_CHIP_KABYLAKE_ULT_GT1 0x5906 -#define PCI_CHIP_KABYLAKE_ULT_GT3 0x5926 +#define PCI_CHIP_KABYLAKE_ULT_GT3_0 0x5923 +#define PCI_CHIP_KABYLAKE_ULT_GT3_1 0x5926 +#define PCI_CHIP_KABYLAKE_ULT_GT3_2 0x5927 #define PCI_CHIP_KABYLAKE_ULT_GT2F 0x5921 #define PCI_CHIP_KABYLAKE_ULX_GT1_5 0x5915 #define PCI_CHIP_KABYLAKE_ULX_GT1 0x590E @@ -206,7 +208,8 @@ #define PCI_CHIP_KABYLAKE_HALO_GT2 0x591B #define PCI_CHIP_KABYLAKE_HALO_GT4 0x593B #define PCI_CHIP_KABYLAKE_HALO_GT3 0x592B -#define PCI_CHIP_KABYLAKE_HALO_GT1 0x590B +#define PCI_CHIP_KABYLAKE_HALO_GT1_0 0x5908 +#define PCI_CHIP_KABYLAKE_HALO_GT1_1 0x590B #define PCI_CHIP_KABYLAKE_SRV_GT2 0x591A #define PCI_CHIP_KABYLAKE_SRV_GT3 0x592A #define PCI_CHIP_KABYLAKE_SRV_GT1 0x590A @@ -414,7 +417,8 @@ (devid) == PCI_CHIP_KABYLAKE_ULT_GT1 || \ (devid) == PCI_CHIP_KABYLAKE_ULX_GT1 || \ (devid) == PCI_CHIP_KABYLAKE_DT_GT1 || \ - (devid) == PCI_CHIP_KABYLAKE_HALO_GT1 || \ + (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0 || \ + (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1 || \ (devid) == PCI_CHIP_KABYLAKE_SRV_GT1) #define IS_KBL_GT2(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT2 || \ @@ -425,7 +429,9 @@ (devid) == PCI_CHIP_KABYLAKE_SRV_GT2 || \ (devid) == PCI_CHIP_KABYLAKE_WKS_GT2) -#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3 || \ +#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0 || \ + (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1 || \ + (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2 || \ (devid) == PCI_CHIP_KABYLAKE_HALO_GT3 || \ (devid) == PCI_CHIP_KABYLAKE_SRV_GT3) |