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path: root/drivers/clk/hisilicon
AgeCommit message (Expand)AuthorFilesLines
2015-09-17clk: Remove unneeded semicolonsJavier Martinez Canillas1-1/+1
2015-09-03clk: Hi6220: separately build stub clock driverLeo Yan2-2/+9
2015-08-24clk: Hi6220: add stub clock driverLeo Yan3-2/+278
2015-08-03clk: hisi: refine parameter checking for initLeo Yan1-8/+3
2015-07-28Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd4-8/+1
2015-07-27clk: fix some determine_rate implementationsBoris Brezillon1-1/+1
2015-07-27clk: change clk_ops' ->determine_rate() prototypeBoris Brezillon1-22/+17
2015-07-20clk: hisilicon: Remove clk.h includeStephen Boyd4-8/+1
2015-06-04clk: make several parent names constUwe Kleine-König3-39/+39
2015-06-03Merge branch 'clk-next-hi6220' into clk-nextMichael Turquette6-12/+505
2015-06-03clk: hi6220: Clock driver support for Hisilicon hi6220 SoCBintian Wang6-1/+494
2015-06-03clk: hisilicon: Remove __init for marking function prototypesBintian Wang1-11/+11
2015-05-14clk: hix5hd2: Silence sparse warningsStephen Boyd1-2/+3
2015-04-12clk: don't use __initconst for non-const arraysUwe Kleine-König2-38/+38
2015-02-02clk: Add rate constraints to clocksTomeu Vizoso1-0/+2
2014-12-03clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso1-1/+1
2014-11-19clk: hi3620: Move const initdata into correct code sectionBintian Wang1-35/+35
2014-09-28clk: hix5hd2: add I2C clocksWei Yan1-0/+25
2014-09-28clk: hix5hd2: add watchdog0 clocksGuoxiong Yan1-0/+5
2014-09-28clk: hix5hd2: add sd clkJiancheng Xue1-6/+15
2014-09-28clk: hix5hd2: add complex clkZhangfei Gao1-0/+181
2014-05-12clk: hisi: add clk-hix5hd2.cZhangfei Gao2-0/+102
2014-05-12clk: hisi: add hisi_clk_register_gateZhangfei Gao2-0/+30
2014-05-12clk: hisi: use clk_register_mux_table in hisi_clk_register_muxZhangfei Gao2-5/+9
2014-03-20clk: hisilicon: fix warning from smatchZhangfei Gao1-8/+7
2014-03-19Merge tag 'clk-hisi' of https://git.kernel.org/pub/scm/linux/kernel/git/hzhua...Mike Turquette5-39/+128
2014-03-19clk: hisi: remove static variableHaojian Zhuang4-42/+72
2014-03-19clk: hip04: add clock driverHaojian Zhuang2-1/+58
2014-03-19clk: hisi: assign missing clk to tableHaojian Zhuang1-0/+2
2014-02-26clk: hisilicon: add hi3620_mmc_clksZhangfei Gao1-0/+274
2013-12-11clk: hi3620: add gate clock flagHaojian Zhuang1-59/+59
2013-12-11clk: hi3620: fix wrong flags on dividerHaojian Zhuang1-11/+11
2013-12-04clk: hisilicon: add common clock supportHaojian Zhuang5-0/+651