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authorJohn Hsu <supercraig0719@gmail.com>2017-04-27 11:22:50 +0800
committerMark Brown <broonie@kernel.org>2017-04-30 21:52:39 +0900
commitc869ce5aaf8f470c8cf32638e7cd498f57118fa5 (patch)
treedd8c8edfc956c3524a2dd398af36b0c7dea863e9 /sound
parent25535f7e0b418fe8b2251008cfcb05d272c2e8e0 (diff)
ASoC: nau8824: leave Class D gain at chip default
Remove initial configuration of Class D gain for 1R and 2L. Leave them at the chip default. Signed-off-by: John Hsu <KCHSU0@nuvoton.com> Signed-off-by: John Hsu <supercraig0719@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/codecs/nau8824.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/sound/soc/codecs/nau8824.c b/sound/soc/codecs/nau8824.c
index cd358be027dd..cca974d26136 100644
--- a/sound/soc/codecs/nau8824.c
+++ b/sound/soc/codecs/nau8824.c
@@ -1626,12 +1626,6 @@ static void nau8824_init_regs(struct nau8824 *nau8824)
regmap_update_bits(regmap, NAU8824_REG_DAC_FILTER_CTRL_1,
NAU8824_DAC_CICCLP_OFF | NAU8824_DAC_OVERSAMPLE_MASK,
NAU8824_DAC_CICCLP_OFF | NAU8824_DAC_OVERSAMPLE_64);
- /* Class D gain 9db for 1R and 2L */
- regmap_update_bits(regmap, NAU8824_REG_CLASSD_GAIN_1,
- NAU8824_CLASSD_GAIN_1R_MASK,
- (0xa << NAU8824_CLASSD_GAIN_1R_SFT));
- regmap_update_bits(regmap, NAU8824_REG_CLASSD_GAIN_2,
- NAU8824_CLASSD_GAIN_2L_MASK, 0xa);
/* DAC clock delay 2ns, VREF */
regmap_update_bits(regmap, NAU8824_REG_RDAC,
NAU8824_RDAC_CLK_DELAY_MASK | NAU8824_RDAC_VREF_MASK,