diff options
| author | Sing-Han Chen <singhanc@nvidia.com> | 2023-01-11 11:04:49 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-01-17 17:27:42 +0100 |
| commit | d8163a32ca95c6e23cd449868ad12008569ac17a (patch) | |
| tree | 1faeaf90d40d7b8d8e28d6bc4a510dbc67e046b5 /drivers/phy/tegra/xusb.h | |
| parent | 71d9e899584e11bbd7eaf9934a619c69a15060d8 (diff) | |
phy: tegra: xusb: Add Tegra234 support
Add support for the XUSB pad controller found on Tegra234 SoCs. It is
mostly similar to the same IP found on Tegra194, because most of
the Tegra234 XUSB PADCTL registers definition and programming sequence
are the same as Tegra194, Tegra234 XUSB PADCTL can share the same
driver with Tegra186 and Tegra194 XUSB PADCTL.
Introduce a new feature, USB2 HW tracking, for Tegra234.
The feature is to enable HW periodical PAD tracking which measure
and capture the electric parameters of USB2.0 PAD.
Signed-off-by: Sing-Han Chen <singhanc@nvidia.com>
Co-developed-by: Wayne Chang <waynec@nvidia.com>
Signed-off-by: Wayne Chang <waynec@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/20230111110450.24617-6-jonathanh@nvidia.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/phy/tegra/xusb.h')
| -rw-r--r-- | drivers/phy/tegra/xusb.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/phy/tegra/xusb.h b/drivers/phy/tegra/xusb.h index c384734a61c2..8bd6cd281119 100644 --- a/drivers/phy/tegra/xusb.h +++ b/drivers/phy/tegra/xusb.h @@ -8,6 +8,7 @@ #define __PHY_TEGRA_XUSB_H #include <linux/io.h> +#include <linux/iopoll.h> #include <linux/mutex.h> #include <linux/workqueue.h> @@ -431,6 +432,8 @@ struct tegra_xusb_padctl_soc { unsigned int num_supplies; bool supports_gen2; bool need_fake_usb3_port; + bool poll_trk_completed; + bool trk_hw_mode; }; struct tegra_xusb_padctl { @@ -473,6 +476,23 @@ static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl, return value; } +static inline u32 padctl_readl_poll(struct tegra_xusb_padctl *padctl, + unsigned long offset, u32 val, u32 mask, + int us) +{ + u32 regval; + int err; + + err = readl_poll_timeout(padctl->regs + offset, regval, + (regval & mask) == val, 1, us); + if (err) { + dev_err(padctl->dev, "%08lx poll timeout > %08x\n", offset, + regval); + } + + return err; +} + struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl, const char *name, unsigned int index); @@ -489,5 +509,8 @@ extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc; #if defined(CONFIG_ARCH_TEGRA_194_SOC) extern const struct tegra_xusb_padctl_soc tegra194_xusb_padctl_soc; #endif +#if defined(CONFIG_ARCH_TEGRA_234_SOC) +extern const struct tegra_xusb_padctl_soc tegra234_xusb_padctl_soc; +#endif #endif /* __PHY_TEGRA_XUSB_H */ |