diff options
| author | Dmitry Osipenko <digetx@gmail.com> | 2021-12-12 00:14:01 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-12-15 17:29:54 +0100 |
| commit | 894ea1121b29713c5da17e1032d1049f31e11d19 (patch) | |
| tree | 8f03c9bb3eafc387054a52610337a5c2a005d450 /arch/arm | |
| parent | 770586291f9a99c0abb6edee7d709a189355ac7e (diff) | |
ARM: tegra: Enable CPU DFLL on Nyan
Enable CPU DFLL node on Nyan Chromebooks. DFLL was previously disabled due
to Linux kernel CPUFreq driver which didn't support suspend-resume. That
problem was fixed years ago, but DFLL was never re-enabled.
Tested-by: Thomas Graichen <thomas.graichen@gmail.com> # T124 Nyan Big
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/tegra124-nyan.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi index e702f91e0707..f693daad68d8 100644 --- a/arch/arm/boot/dts/tegra124-nyan.dtsi +++ b/arch/arm/boot/dts/tegra124-nyan.dtsi @@ -532,7 +532,7 @@ /* CPU DFLL clock */ clock@70110000 { - status = "disabled"; + status = "okay"; vdd-cpu-supply = <&vdd_cpu>; nvidia,i2c-fs-rate = <400000>; }; |