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authorDanny Huang <dahuang@nvidia.com>2012-11-15 15:42:34 +0800
committerStephen Warren <swarren@nvidia.com>2012-11-15 14:36:59 -0700
commitf8ddda713b9ea6c10012429c089c81bc9a5cd49f (patch)
treec469d4819326e0aadccd58f5523bd5f4d1f70852 /arch/arm/mach-tegra/fuse.c
parent25cd5a391478b1e29ef7de172b3bd612159a07cc (diff)
ARM: tegra: Tegra30 speedo-based process identification
This patch adds speedo-based process identification support for Tegra30. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra3/Tegra30/ in log print, s/T30/Tegra30/ in commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/fuse.c')
-rw-r--r--arch/arm/mach-tegra/fuse.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index 9fd02c50ae29..8121742711fe 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -30,11 +30,13 @@
#define FUSE_SKU_INFO 0x110
#define TEGRA20_FUSE_SPARE_BIT 0x200
+#define TEGRA30_FUSE_SPARE_BIT 0x244
int tegra_sku_id;
int tegra_cpu_process_id;
int tegra_core_process_id;
int tegra_chip_id;
+int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */
int tegra_soc_speedo_id;
enum tegra_revision tegra_revision;
@@ -120,13 +122,18 @@ void tegra_init_fuse(void)
id = readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804);
tegra_chip_id = (id >> 8) & 0xff;
- tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
-
switch (tegra_chip_id) {
case TEGRA20:
+ tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
tegra_init_speedo_data = &tegra20_init_speedo_data;
break;
+ case TEGRA30:
+ tegra_fuse_spare_bit = TEGRA30_FUSE_SPARE_BIT;
+ tegra_init_speedo_data = &tegra30_init_speedo_data;
+ break;
default:
+ pr_warn("Tegra: unknown chip id %d\n", tegra_chip_id);
+ tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
tegra_init_speedo_data = &tegra_get_process_id;
}