diff options
author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-01-11 08:04:02 +0200 |
---|---|---|
committer | Bjorn Andersson <andersson@kernel.org> | 2023-01-18 18:27:45 -0600 |
commit | b894f2cf915479f9b25266da394942db9736161d (patch) | |
tree | 4f56c7a44f8b5853cfe9c1f4e707ab94f97e2880 | |
parent | 295bc7195810fea0303bfa6c4a754a12b185791b (diff) |
ARM: dts: qcom: apq8084: add clocks and clock-names to gcc device
Add clocks and clock-names nodes to the gcc device to bind clocks using
the DT links.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111060402.1168726-13-dmitry.baryshkov@linaro.org
-rw-r--r-- | arch/arm/boot/dts/qcom-apq8084.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 562995d2a3bc..fabd7455eb8f 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -689,6 +689,24 @@ #reset-cells = <1>; #power-domain-cells = <1>; reg = <0xfc400000 0x4000>; + clocks = <&xo_board>, + <&sleep_clk>, + <0>, /* ufs */ + <0>, + <0>, + <0>, + <0>, /* sata */ + <0>, + <0>; /* pcie */ + clock-names = "xo", + "sleep_clk", + "ufs_rx_symbol_0_clk_src", + "ufs_rx_symbol_1_clk_src", + "ufs_tx_symbol_0_clk_src", + "ufs_tx_symbol_1_clk_src", + "sata_asic0_clk", + "sata_rx_clk", + "pcie_pipe"; }; tcsr_mutex: hwlock@fd484000 { |