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/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/dts-v1/;
/include/ "socfpga.dtsi"
/ {
model = "Altera SOCFPGA VT";
compatible = "altr,socfpga-vt", "altr,socfpga";
chosen {
bootargs = "console=ttyS0,57600";
};
memory {
name = "memory";
device_type = "memory";
reg = <0x0 0x40000000>; /* 1 GB */
};
soc {
clkmgr@ffd04000 {
clocks {
osc1 {
clock-frequency = <10000000>;
};
};
};
dwmmc0@ff704000 {
num-slots = <1>;
supports-highspeed;
broken-cd;
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
ethernet@ff700000 {
phy-mode = "gmii";
status = "okay";
};
timer0@ffc08000 {
clock-frequency = <7000000>;
};
timer1@ffc09000 {
clock-frequency = <7000000>;
};
timer2@ffd00000 {
clock-frequency = <7000000>;
};
timer3@ffd01000 {
clock-frequency = <7000000>;
};
serial0@ffc02000 {
clock-frequency = <7372800>;
};
serial1@ffc03000 {
clock-frequency = <7372800>;
};
sysmgr@ffd08000 {
cpu1-start-addr = <0xffd08010>;
};
};
};
ðernet0 {
status = "okay";
};
&gmac0 {
phy-mode = "gmii";
};
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