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path: root/include/linux/intel-iommu.h
AgeCommit message (Expand)AuthorFilesLines
2018-05-15iommu/vt-d: Clean up pasid quirk for pre-production devicesLu Baolu1-1/+0
2018-02-13iommu/vt-d: Clean/document fault status flagsDmitry Safonov1-6/+6
2018-01-17iommu/vt-d: Add a check for 5-level paging supportSohil Mehta1-0/+1
2018-01-17iommu/vt-d: Add a check for 1GB page supportSohil Mehta1-0/+1
2017-11-03iommu/vt-d: Clear Page Request Overflow fault bitLu Baolu1-0/+1
2017-03-22iommu/vt-d: Use lo_hi_readq() / lo_hi_writeq()Andy Shevchenko1-16/+2
2017-02-10Merge branches 'iommu/fixes', 'arm/exynos', 'arm/renesas', 'arm/smmu', 'arm/m...Joerg Roedel1-8/+9
2017-02-10iommu: Add sysfs bindings for struct iommu_deviceJoerg Roedel1-1/+0
2017-02-10iommu: Introduce new 'struct iommu_device'Joerg Roedel1-0/+2
2017-01-31iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommuCQ Tang1-7/+7
2016-11-19iommu/vt-d: Fix PASID table allocationDavid Woodhouse1-0/+1
2016-02-15iommu/vt-d: Clear PPR bit to ensure we get more page request interruptsDavid Woodhouse1-0/+3
2015-10-15iommu/vt-d: Implement SVM_FLAG_PRIVATE_PASID to allocate unique PASIDsDavid Woodhouse1-0/+1
2015-10-15iommu/vt-d: Add callback to device driver on page faultsDavid Woodhouse1-0/+3
2015-10-15iommu/vt-d: Implement page request handlingDavid Woodhouse1-0/+26
2015-10-15iommu/vt-d: Generalise DMAR MSI setup to allow for page request eventsDavid Woodhouse1-1/+9
2015-10-15iommu/vt-d: Add basic SVM PASID supportDavid Woodhouse1-5/+63
2015-10-15iommu/vt-d: Add initial support for PASID tablesDavid Woodhouse1-0/+15
2015-10-15iommu/vt-d: Introduce intel_iommu=pasid28, and pasid_enabled() macroDavid Woodhouse1-1/+1
2015-10-13iommu/vt-d: Use plain writeq() for dmar_writeq() where availableDavid Woodhouse1-8/+6
2015-08-12iommu/vt-d: Split up iommu->domains arrayJoerg Roedel1-1/+1
2015-06-23Merge tag 'iommu-updates-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds1-0/+5
2015-06-22Merge branch 'x86-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds1-0/+5
2015-06-16iommu/vt-d: Copy IR table from old kernel when in kdump modeJoerg Roedel1-0/+1
2015-06-16iommu/vt-d: Detect pre enabled translationJoerg Roedel1-0/+4
2015-06-12iommu, x86: Add cap_pi_support() to detect VT-d PI capabilityFeng Wu1-0/+1
2015-06-09iommu/vt-d: Change PASID support to bit 40 of Extended Capability RegisterDavid Woodhouse1-1/+2
2015-05-11Merge branch 'x86/asm' into x86/apic, to resolve a conflictIngo Molnar1-3/+15
2015-04-24irq_remapping/vt-d: Enhance Intel IR driver to support hierarchical irqdomainsJiang Liu1-0/+4
2015-03-25iommu/vt-d: Add new extended capabilities from v2.3 VT-d specificationDavid Woodhouse1-0/+14
2015-03-25iommu/vt-d: kill bogus ecap_niotlb_iunits()David Woodhouse1-3/+1
2014-07-04iommu/vt-d: Make use of IOMMU sysfs supportAlex Williamson1-0/+3
2014-03-24iommu/vt-d: Store PCI segment number in struct intel_iommuDavid Woodhouse1-0/+1
2014-01-09iommu/vt-d: keep shared resources when failed to initialize iommu devicesJiang Liu1-1/+0
2014-01-09iommu/vt-d: mark internal functions as staticJiang Liu1-1/+0
2014-01-07iommu/vt-d: use dedicated bitmap to track remapping entry allocation statusJiang Liu1-0/+1
2013-09-24x86/iommu: correct ICS register offsetLi, Zhen-Hua1-1/+1
2012-06-08iommu/dmar: Reserve mmio space used by the IOMMU, if the BIOS forgets toDonald Dutile1-0/+2
2011-10-26Merge branch 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds1-2/+2
2011-09-21iommu: Rename the DMAR and INTR_REMAP config optionsSuresh Siddha1-3/+3
2011-09-13locking, x86, iommu: Annotate qi->q_lock as rawThomas Gleixner1-1/+1
2011-09-13locking, x86, iommu: Annotate iommu->register_lock as rawThomas Gleixner1-1/+1
2009-10-05dmar: support for parsing Remapping Hardware Static Affinity structureSuresh Siddha1-0/+1
2009-09-11intel-iommu: Fix kernel hang if interrupt remapping disabled in BIOSYouquan Song1-0/+2
2009-05-18VT-d: support the device IOTLBYu Zhao1-0/+1
2009-05-18VT-d: add device IOTLB invalidation supportYu Zhao1-1/+13
2009-05-18VT-d: parse ATSR in DMA Remapping Reporting StructureYu Zhao1-0/+1
2009-05-10intel-iommu: Clean up handling of "caching mode" vs. IOTLB flushing.David Woodhouse1-5/+4
2009-05-10intel-iommu: Clean up handling of "caching mode" vs. context flushing.David Woodhouse1-4/+4
2009-04-29Intel IOMMU Pass Through SupportFenghua Yu1-0/+2