drm/drm-misc - Kernel DRM miscellaneous fixes and cross-tree changes

Age	Commit message (Expand)	Author	Files	Lines
2021-06-15	cxl/pmem: Register 'pmem' / cxl_nvdimm devices	Dan Williams	1	-0/+86
2021-06-15	cxl/pmem: Add initial infrastructure for pmem support	Dan Williams	1	-0/+121
2021-06-15	cxl/core: Add cxl-bus driver infrastructure	Dan Williams	1	-0/+73
2021-06-12	cxl/component_regs: Fix offset	Ben Widawsky	1	-1/+1
2021-06-12	cxl/hdm: Fix decoder count calculation	Ben Widawsky	1	-1/+1
2021-06-09	cxl/acpi: Introduce cxl_decoder objects	Dan Williams	1	-0/+265
2021-06-09	cxl/acpi: Add downstream port data to cxl_port instances	Dan Williams	1	-3/+104
2021-06-09	cxl/acpi: Introduce the root of a cxl_port topology	Dan Williams	1	-0/+160
2021-06-05	cxl/pci: Fixup devm_cxl_iomap_block() to take a 'struct device *'	Dan Williams	1	-7/+8
2021-06-05	cxl/pci: Add HDM decoder capabilities	Ben Widawsky	1	-0/+92
2021-06-05	cxl/pci: Reserve individual register block regions	Ira Weiny	1	-4/+32
2021-06-05	cxl/pci: Map registers based on capabilities	Ira Weiny	1	-12/+62
2021-05-26	cxl/mem: Demarcate vendor specific capability IDs	Ben Widawsky	1	-1/+4
2021-05-14	cxl/core: Refactor CXL register lookup for bridge reuse	Dan Williams	1	-0/+57
2021-05-14	cxl/core: Rename bus.c to core.c	Dan Williams	1	-0/+30