summaryrefslogtreecommitdiff
path: root/drivers/clk/imx
AgeCommit message (Expand)AuthorFilesLines
2019-01-24clk: imx: Fix fractional clock set rate computationAbel Vesa1-2/+3
2019-01-09clk: imx: fix potential NULL dereference in imx8qxp_lpcg_clk_probe()Wei Yongjun1-0/+2
2018-12-28clk: imx8qxp: make the name of clock ID genericAisheng Dong2-151/+151
2018-12-14Merge branch 'clk-imx7ulp' into clk-nextStephen Boyd1-1/+30
2018-12-14clk: imx: imx7ulp: add arm hsrun mode clocks supportAnson Huang1-1/+30
2018-12-14Merge branches 'clk-imx7ulp', 'clk-imx6-fixes', 'clk-imx-fixes', 'clk-imx8qxp...Stephen Boyd24-26/+3348
2018-12-14clk: imx: add imx8qxp lpcg driverAisheng Dong3-1/+319
2018-12-14clk: imx: add lpcg clock supportAisheng Dong3-1/+121
2018-12-14clk: imx: add imx8qxp clk driverAisheng Dong3-0/+162
2018-12-14clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependantAbel Vesa2-0/+7
2018-12-13clk: imx: add scu clock common partAisheng Dong4-0/+292
2018-12-13clk: imx: add configuration option for mmio clksAisheng Dong2-1/+6
2018-12-10clk: imx6q: handle ENET PLL bypassLucas Stach1-6/+57
2018-12-10clk: imx6q: optionally get CCM inputs via standard clock handlesLucas Stach1-5/+17
2018-12-10clk: imx6q: reset exclusive gates on initLucas Stach1-1/+5
2018-12-10clk: imx6q: add DCICx clocks gateAnson Huang1-0/+2
2018-12-10clk: imx6sl: ensure MMDC CH0 handshake is bypassedAnson Huang1-0/+6
2018-12-10clk: imx: remove redundant initialization of ret to zeroColin Ian King1-1/+1
2018-12-03clk: imx: add imx7ulp clk driverA.s. Dong2-0/+221
2018-12-03clk: imx: implement new clk_hw based APIsA.s. Dong2-0/+84
2018-12-03clk: imx: make mux parent strings constA.s. Dong3-9/+13
2018-12-03clk: imx: add imx7ulp composite clk supportA.s. Dong3-0/+94
2018-12-03clk: imx: add pfdv2 supportA.s. Dong3-1/+208
2018-12-03clk: imx: add pllv4 supportA.s. Dong3-0/+188
2018-12-03clk: imx: add gatable clock divider supportA.s. Dong3-0/+226
2018-12-03clk: imx: Add SCCG PLL typeLucas Stach3-1/+267
2018-12-03clk: imx: Add fractional PLL output clockLucas Stach3-0/+236
2018-12-03clk: imx: Add clock driver for i.MX8MQ CCMAbel Vesa3-0/+626
2018-12-03clk: imx: Add imx composite clockAbel Vesa3-0/+195
2018-11-06clk: imx7d: remove UART1 clock settingAnson Huang1-3/+0
2018-10-18Merge branches 'clk-imx6-mmdc', 'clk-qcom-krait', 'clk-rockchip' and 'clk-smp...Stephen Boyd5-0/+6
2018-10-17clk: imx6q: add mmdc0 ipg clockAnson Huang1-0/+1
2018-10-17clk: imx6sl: add mmdc ipg clocksAnson Huang1-0/+2
2018-10-17clk: imx6sll: add mmdc1 ipg clockAnson Huang1-0/+1
2018-10-17clk: imx6sx: add mmdc1 ipg clockAnson Huang1-0/+1
2018-10-17clk: imx6ul: add mmdc1 ipg clockAnson Huang1-0/+1
2018-10-17clk: imx7d: remove CLK_IS_CRITICAL flag for arm_a7_root_clkAnson Huang1-1/+1
2018-10-17clk: imx: cpu clock should be always criticalAnson Huang1-1/+1
2018-10-16clk: imx: imx7d: remove clks_init_on arrayAnson Huang2-19/+15
2018-10-16clk: imx: imx7d: remove unnecessary clocks from clks_init_on arrayAnson Huang1-2/+1
2018-08-14Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter',...Stephen Boyd3-0/+3
2018-08-14Merge branches 'clk-mvebu-spdx', 'clk-meson', 'clk-imx7d-mu', 'clk-imx-init-a...Stephen Boyd4-50/+17
2018-08-14Merge branches 'clk-imx-critical', 'clk-tegra-bpmp', 'clk-tegra-124', 'clk-te...Stephen Boyd1-29/+15
2018-08-14Merge branches 'clk-ingenic-fixes', 'clk-max9485', 'clk-pxa-32k-pll', 'clk-as...Stephen Boyd1-0/+6
2018-08-14Merge branches 'clk-imx6-video-parent', 'clk-qcom-sdm845-criticals', 'clk-ren...Stephen Boyd1-1/+1
2018-07-25clk: imx6sll: fix missing of_node_put()Nicholas Mc Guire1-0/+1
2018-07-25clk: imx6ul: fix missing of_node_put()Nicholas Mc Guire1-0/+1
2018-07-25clk: imx: add ocram_s clock for i.mx6sxAnson Huang1-0/+1
2018-07-09clk: imx7d: add IMX7D_MU_ROOT_CLKOleksij Rempel1-0/+1
2018-07-06clk: imx51-imx53: Include sizes.h to silence compile errorsStephen Boyd1-0/+1