Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2020-09-15 | riscv: Add cache information in AUX vector | Zong Li | 1 | -0/+5 |
2020-05-20 | riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure | Yash Shah | 1 | -0/+15 |
index : drm/drm-misc | ||
Kernel DRM miscellaneous fixes and cross-tree changes | root |
summaryrefslogtreecommitdiff |
Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2020-09-15 | riscv: Add cache information in AUX vector | Zong Li | 1 | -0/+5 |
2020-05-20 | riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure | Yash Shah | 1 | -0/+15 |