diff options
Diffstat (limited to 'drivers/staging')
132 files changed, 3219 insertions, 3746 deletions
diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android/ashmem.c index 4789d36ddfd3..d66a64e42273 100644 --- a/drivers/staging/android/ashmem.c +++ b/drivers/staging/android/ashmem.c @@ -933,7 +933,7 @@ static int __init ashmem_init(void) ashmem_range_cachep = kmem_cache_create("ashmem_range_cache", sizeof(struct ashmem_range), - 0, 0, NULL); + 0, SLAB_RECLAIM_ACCOUNT, NULL); if (!ashmem_range_cachep) { pr_err("failed to create slab cache\n"); goto out_free1; diff --git a/drivers/staging/board/Kconfig b/drivers/staging/board/Kconfig index d0c6e42eadda..64c77970eee8 100644 --- a/drivers/staging/board/Kconfig +++ b/drivers/staging/board/Kconfig @@ -3,7 +3,10 @@ config STAGING_BOARD bool "Staging Board Support" depends on OF_ADDRESS && OF_IRQ && CLKDEV_LOOKUP help - Select to enable per-board staging support code. - - If in doubt, say N here. + Staging board base is to support continuous upstream + in-tree development and integration of platform devices. + Helps developers integrate devices as platform devices for + device drivers that only provide platform device bindings. + This in turn allows for incremental development of both + hardware feature support and DT binding work in parallel. diff --git a/drivers/staging/clocking-wizard/TODO b/drivers/staging/clocking-wizard/TODO index ebe99db7d153..c7e1dc58dfba 100644 --- a/drivers/staging/clocking-wizard/TODO +++ b/drivers/staging/clocking-wizard/TODO @@ -2,7 +2,8 @@ TODO: - support for fractional multiplier - support for fractional divider (output 0 only) - support for set_rate() operations (may benefit from Stephen Boyd's - refactoring of the clk primitives: https://lkml.org/lkml/2014/9/5/766) + refactoring of the clk primitives: + https://lore.kernel.org/lkml/1409957256-23729-1-git-send-email-sboyd@codeaurora.org) - review arithmetic - overflow after multiplication? - maximize accuracy before divisions diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c index 80d74cce2a01..df77b6bf5c64 100644 --- a/drivers/staging/comedi/comedi_fops.c +++ b/drivers/staging/comedi/comedi_fops.c @@ -939,8 +939,8 @@ static int do_devinfo_ioctl(struct comedi_device *dev, /* fill devinfo structure */ devinfo.version_code = COMEDI_VERSION_CODE; devinfo.n_subdevs = dev->n_subdevices; - strlcpy(devinfo.driver_name, dev->driver->driver_name, COMEDI_NAMELEN); - strlcpy(devinfo.board_name, dev->board_name, COMEDI_NAMELEN); + strscpy(devinfo.driver_name, dev->driver->driver_name, COMEDI_NAMELEN); + strscpy(devinfo.board_name, dev->board_name, COMEDI_NAMELEN); s = comedi_file_read_subdevice(file); if (s) diff --git a/drivers/staging/comedi/drivers/adl_pci7x3x.c b/drivers/staging/comedi/drivers/adl_pci7x3x.c index d0081897fe47..8fc45638ff59 100644 --- a/drivers/staging/comedi/drivers/adl_pci7x3x.c +++ b/drivers/staging/comedi/drivers/adl_pci7x3x.c @@ -19,14 +19,15 @@ * PCI-7234 (adl_pci7234), PCI-7432 (adl_pci7432), PCI-7433 (adl_pci7433), * PCI-7434 (adl_pci7434) * Author: H Hartley Sweeten <hsweeten@visionengravers.com> - * Updated: Thu, 02 Aug 2012 14:27:46 -0700 - * Status: untested + * Updated: Fri, 20 Nov 2020 14:49:36 +0000 + * Status: works (tested on PCI-7230) * * One or two subdevices are setup by this driver depending on * the number of digital inputs and/or outputs provided by the * board. Each subdevice has a maximum of 32 channels. * - * PCI-7230 - 2 subdevices: 0 - 16 input, 1 - 16 output + * PCI-7230 - 4 subdevices: 0 - 16 input, 1 - 16 output, + * 2 - IRQ_IDI0, 3 - IRQ_IDI1 * PCI-7233 - 1 subdevice: 0 - 32 input * PCI-7234 - 1 subdevice: 0 - 32 output * PCI-7432 - 2 subdevices: 0 - 32 input, 1 - 32 output @@ -37,8 +38,9 @@ * interrupt signals on digital input channels 0 and 1. The PCI-7233 * has dual-interrupt sources for change-of-state (COS) on any 16 * digital input channels of LSB and for COS on any 16 digital input - * lines of MSB. Interrupts are not currently supported by this - * driver. + * lines of MSB. + * + * Currently, this driver only supports interrupts for PCI-7230. * * Configuration Options: not applicable, uses comedi PCI auto config */ @@ -47,13 +49,22 @@ #include "../comedi_pci.h" +#include "plx9052.h" + /* * Register I/O map (32-bit access only) */ -#define PCI7X3X_DIO_REG 0x00 -#define PCI743X_DIO_REG 0x04 +#define PCI7X3X_DIO_REG 0x0000 /* in the DigIO Port area */ +#define PCI743X_DIO_REG 0x0004 + +#define ADL_PT_CLRIRQ 0x0040 /* in the DigIO Port area */ -enum apci1516_boardid { +#define LINTI1_EN_ACT_IDI0 (PLX9052_INTCSR_LI1ENAB | PLX9052_INTCSR_LI1STAT) +#define LINTI2_EN_ACT_IDI1 (PLX9052_INTCSR_LI2ENAB | PLX9052_INTCSR_LI2STAT) +#define EN_PCI_LINT2H_LINT1H \ + (PLX9052_INTCSR_PCIENAB | PLX9052_INTCSR_LI2POL | PLX9052_INTCSR_LI1POL) + +enum adl_pci7x3x_boardid { BOARD_PCI7230, BOARD_PCI7233, BOARD_PCI7234, @@ -67,14 +78,16 @@ struct adl_pci7x3x_boardinfo { int nsubdevs; int di_nchan; int do_nchan; + int irq_nchan; }; static const struct adl_pci7x3x_boardinfo adl_pci7x3x_boards[] = { [BOARD_PCI7230] = { .name = "adl_pci7230", - .nsubdevs = 2, + .nsubdevs = 4, /* IDI, IDO, IRQ_IDI0, IRQ_IDI1 */ .di_nchan = 16, .do_nchan = 16, + .irq_nchan = 2, }, [BOARD_PCI7233] = { .name = "adl_pci7233", @@ -104,6 +117,178 @@ static const struct adl_pci7x3x_boardinfo adl_pci7x3x_boards[] = { } }; +struct adl_pci7x3x_dev_private_data { + unsigned long lcr_io_base; + unsigned int int_ctrl; +}; + +struct adl_pci7x3x_sd_private_data { + spinlock_t subd_slock; /* spin-lock for cmd_running */ + unsigned long port_offset; + short int cmd_running; +}; + +static void process_irq(struct comedi_device *dev, unsigned int subdev, + unsigned short intcsr) +{ + struct comedi_subdevice *s = &dev->subdevices[subdev]; + struct adl_pci7x3x_sd_private_data *sd_priv = s->private; + unsigned long reg = sd_priv->port_offset; + struct comedi_async *async_p = s->async; + + if (async_p) { + unsigned short val = inw(dev->iobase + reg); + + spin_lock(&sd_priv->subd_slock); + if (sd_priv->cmd_running) + comedi_buf_write_samples(s, &val, 1); + spin_unlock(&sd_priv->subd_slock); + comedi_handle_events(dev, s); + } +} + +static irqreturn_t adl_pci7x3x_interrupt(int irq, void *p_device) +{ + struct comedi_device *dev = p_device; + struct adl_pci7x3x_dev_private_data *dev_private = dev->private; + unsigned long cpu_flags; + unsigned int intcsr; + bool li1stat, li2stat; + + if (!dev->attached) { + /* Ignore interrupt before device fully attached. */ + /* Might not even have allocated subdevices yet! */ + return IRQ_NONE; + } + + /* Check if we are source of interrupt */ + spin_lock_irqsave(&dev->spinlock, cpu_flags); + intcsr = inl(dev_private->lcr_io_base + PLX9052_INTCSR); + li1stat = (intcsr & LINTI1_EN_ACT_IDI0) == LINTI1_EN_ACT_IDI0; + li2stat = (intcsr & LINTI2_EN_ACT_IDI1) == LINTI2_EN_ACT_IDI1; + if (li1stat || li2stat) { + /* clear all current interrupt flags */ + /* Fixme: Reset all 2 Int Flags */ + outb(0x00, dev->iobase + ADL_PT_CLRIRQ); + } + spin_unlock_irqrestore(&dev->spinlock, cpu_flags); + + /* SubDev 2, 3 = Isolated DigIn , on "SCSI2" jack!*/ + + if (li1stat) /* 0x0005 LINTi1 is Enabled && IDI0 is 1 */ + process_irq(dev, 2, intcsr); + + if (li2stat) /* 0x0028 LINTi2 is Enabled && IDI1 is 1 */ + process_irq(dev, 3, intcsr); + + return IRQ_RETVAL(li1stat || li2stat); +} + +static int adl_pci7x3x_asy_cmdtest(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_cmd *cmd) +{ + int err = 0; + + /* Step 1 : check if triggers are trivially valid */ + + err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW); + err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT); + err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW); + err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT); + err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE); + + if (err) + return 1; + + /* Step 2a : make sure trigger sources are unique */ + /* Step 2b : and mutually compatible */ + + /* Step 3: check if arguments are trivially valid */ + + err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0); + err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0); + err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); + err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg, + cmd->chanlist_len); + err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0); + + if (err) + return 3; + + /* Step 4: fix up any arguments */ + + /* Step 5: check channel list if it exists */ + + return 0; +} + +static int adl_pci7x3x_asy_cmd(struct comedi_device *dev, + struct comedi_subdevice *s) +{ + struct adl_pci7x3x_dev_private_data *dev_private = dev->private; + struct adl_pci7x3x_sd_private_data *sd_priv = s->private; + unsigned long cpu_flags; + unsigned int int_enab; + + if (s->index == 2) { + /* enable LINTi1 == IDI sdi[0] Ch 0 IRQ ActHigh */ + int_enab = PLX9052_INTCSR_LI1ENAB; + } else { + /* enable LINTi2 == IDI sdi[0] Ch 1 IRQ ActHigh */ + int_enab = PLX9052_INTCSR_LI2ENAB; + } + + spin_lock_irqsave(&dev->spinlock, cpu_flags); + dev_private->int_ctrl |= int_enab; + outl(dev_private->int_ctrl, dev_private->lcr_io_base + PLX9052_INTCSR); + spin_unlock_irqrestore(&dev->spinlock, cpu_flags); + + spin_lock_irqsave(&sd_priv->subd_slock, cpu_flags); + sd_priv->cmd_running = 1; + spin_unlock_irqrestore(&sd_priv->subd_slock, cpu_flags); + + return 0; +} + +static int adl_pci7x3x_asy_cancel(struct comedi_device *dev, + struct comedi_subdevice *s) +{ + struct adl_pci7x3x_dev_private_data *dev_private = dev->private; + struct adl_pci7x3x_sd_private_data *sd_priv = s->private; + unsigned long cpu_flags; + unsigned int int_enab; + + spin_lock_irqsave(&sd_priv->subd_slock, cpu_flags); + sd_priv->cmd_running = 0; + spin_unlock_irqrestore(&sd_priv->subd_slock, cpu_flags); + /* disable Interrupts */ + if (s->index == 2) + int_enab = PLX9052_INTCSR_LI1ENAB; + else + int_enab = PLX9052_INTCSR_LI2ENAB; + spin_lock_irqsave(&dev->spinlock, cpu_flags); + dev_private->int_ctrl &= ~int_enab; + outl(dev_private->int_ctrl, dev_private->lcr_io_base + PLX9052_INTCSR); + spin_unlock_irqrestore(&dev->spinlock, cpu_flags); + + return 0; +} + +/* same as _di_insn_bits because the IRQ-pins are the DI-ports */ +static int adl_pci7x3x_dirq_insn_bits(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data) +{ + struct adl_pci7x3x_sd_private_data *sd_priv = s->private; + unsigned long reg = (unsigned long)sd_priv->port_offset; + + data[1] = inl(dev->iobase + reg); + + return insn->n; +} + static int adl_pci7x3x_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, @@ -143,15 +328,28 @@ static int adl_pci7x3x_di_insn_bits(struct comedi_device *dev, return insn->n; } +static int adl_pci7x3x_reset(struct comedi_device *dev) +{ + struct adl_pci7x3x_dev_private_data *dev_private = dev->private; + + /* disable Interrupts */ + dev_private->int_ctrl = 0x00; /* Disable PCI + LINTi2 + LINTi1 */ + outl(dev_private->int_ctrl, dev_private->lcr_io_base + PLX9052_INTCSR); + + return 0; +} + static int adl_pci7x3x_auto_attach(struct comedi_device *dev, unsigned long context) { struct pci_dev *pcidev = comedi_to_pci_dev(dev); const struct adl_pci7x3x_boardinfo *board = NULL; struct comedi_subdevice *s; + struct adl_pci7x3x_dev_private_data *dev_private; int subdev; int nchan; int ret; + int ic; if (context < ARRAY_SIZE(adl_pci7x3x_boards)) board = &adl_pci7x3x_boards[context]; @@ -160,10 +358,34 @@ static int adl_pci7x3x_auto_attach(struct comedi_device *dev, dev->board_ptr = board; dev->board_name = board->name; + dev_private = comedi_alloc_devpriv(dev, sizeof(*dev_private)); + if (!dev_private) + return -ENOMEM; + ret = comedi_pci_enable(dev); if (ret) return ret; dev->iobase = pci_resource_start(pcidev, 2); + dev_private->lcr_io_base = pci_resource_start(pcidev, 1); + + adl_pci7x3x_reset(dev); + + if (board->irq_nchan) { + /* discard all evtl. old IRQs */ + outb(0x00, dev->iobase + ADL_PT_CLRIRQ); + + if (pcidev->irq) { + ret = request_irq(pcidev->irq, adl_pci7x3x_interrupt, + IRQF_SHARED, dev->board_name, dev); + if (ret == 0) { + dev->irq = pcidev->irq; + /* 0x52 PCI + IDI Ch 1 Ch 0 IRQ Off ActHigh */ + dev_private->int_ctrl = EN_PCI_LINT2H_LINT1H; + outl(dev_private->int_ctrl, + dev_private->lcr_io_base + PLX9052_INTCSR); + } + } + } ret = comedi_alloc_subdevices(dev, board->nsubdevs); if (ret) @@ -237,14 +459,56 @@ static int adl_pci7x3x_auto_attach(struct comedi_device *dev, } } + for (ic = 0; ic < board->irq_nchan; ++ic) { + struct adl_pci7x3x_sd_private_data *sd_priv; + + nchan = 1; + + s = &dev->subdevices[subdev]; + /* Isolated digital inputs 0 or 1 */ + s->type = COMEDI_SUBD_DI; + s->subdev_flags = SDF_READABLE; + s->n_chan = nchan; + s->maxdata = 1; + s->insn_bits = adl_pci7x3x_dirq_insn_bits; + s->range_table = &range_digital; + + sd_priv = comedi_alloc_spriv(s, sizeof(*sd_priv)); + if (!sd_priv) + return -ENOMEM; + + spin_lock_init(&sd_priv->subd_slock); + sd_priv->port_offset = PCI7X3X_DIO_REG; + sd_priv->cmd_running = 0; + + if (dev->irq) { + dev->read_subdev = s; + s->type = COMEDI_SUBD_DI; + s->subdev_flags = SDF_READABLE | SDF_CMD_READ; + s->len_chanlist = 1; + s->do_cmdtest = adl_pci7x3x_asy_cmdtest; + s->do_cmd = adl_pci7x3x_asy_cmd; + s->cancel = adl_pci7x3x_asy_cancel; + } + + subdev++; + } + return 0; } +static void adl_pci7x3x_detach(struct comedi_device *dev) +{ + if (dev->iobase) + adl_pci7x3x_reset(dev); + comedi_pci_detach(dev); +} + static struct comedi_driver adl_pci7x3x_driver = { .driver_name = "adl_pci7x3x", .module = THIS_MODULE, .auto_attach = adl_pci7x3x_auto_attach, - .detach = comedi_pci_detach, + .detach = adl_pci7x3x_detach, }; static int adl_pci7x3x_pci_probe(struct pci_dev *dev, diff --git a/drivers/staging/comedi/drivers/adv_pci_dio.c b/drivers/staging/comedi/drivers/adv_pci_dio.c index 0df28ec00f37..8e222b6ff2b4 100644 --- a/drivers/staging/comedi/drivers/adv_pci_dio.c +++ b/drivers/staging/comedi/drivers/adv_pci_dio.c @@ -34,9 +34,15 @@ */ /* PCI-1730, PCI-1733, PCI-1736 interrupt control registers */ -#define PCI173X_INT_EN_REG 0x08 /* R/W: enable/disable */ -#define PCI173X_INT_RF_REG 0x0c /* R/W: falling/rising edge */ -#define PCI173X_INT_CLR_REG 0x10 /* R/W: clear */ +#define PCI173X_INT_EN_REG 0x0008 /* R/W: enable/disable */ +#define PCI173X_INT_RF_REG 0x000c /* R/W: falling/rising edge */ +#define PCI173X_INT_FLAG_REG 0x0010 /* R: status */ +#define PCI173X_INT_CLR_REG 0x0010 /* W: clear */ + +#define PCI173X_INT_IDI0 0x01 /* IDI0 edge occurred */ +#define PCI173X_INT_IDI1 0x02 /* IDI1 edge occurred */ +#define PCI173X_INT_DI0 0x04 /* DI0 edge occurred */ +#define PCI173X_INT_DI1 0x08 /* DI1 edge occurred */ /* PCI-1739U, PCI-1750, PCI1751 interrupt control registers */ #define PCI1750_INT_REG 0x20 /* R/W: status/control */ @@ -63,6 +69,7 @@ #define PCI_DIO_MAX_DI_SUBDEVS 2 /* 2 x 8/16/32 input channels max */ #define PCI_DIO_MAX_DO_SUBDEVS 2 /* 2 x 8/16/32 output channels max */ #define PCI_DIO_MAX_DIO_SUBDEVG 2 /* 2 x any number of 8255 devices max */ +#define PCI_DIO_MAX_IRQ_SUBDEVS 4 /* 4 x 1 input IRQ channels max */ enum pci_dio_boardid { TYPE_PCI1730, @@ -84,7 +91,12 @@ enum pci_dio_boardid { struct diosubd_data { int chans; /* num of chans or 8255 devices */ - unsigned long addr; /* PCI address ofset */ + unsigned long addr; /* PCI address offset */ +}; + +struct dio_irq_subd_data { + unsigned short int_en; /* interrupt enable/status bit */ + unsigned long addr; /* PCI address offset */ }; struct dio_boardtype { @@ -93,6 +105,7 @@ struct dio_boardtype { struct diosubd_data sdi[PCI_DIO_MAX_DI_SUBDEVS]; struct diosubd_data sdo[PCI_DIO_MAX_DO_SUBDEVS]; struct diosubd_data sdio[PCI_DIO_MAX_DIO_SUBDEVG]; + struct dio_irq_subd_data sdirq[PCI_DIO_MAX_IRQ_SUBDEVS]; unsigned long id_reg; unsigned long timer_regbase; unsigned int is_16bit:1; @@ -101,12 +114,17 @@ struct dio_boardtype { static const struct dio_boardtype boardtypes[] = { [TYPE_PCI1730] = { .name = "pci1730", - .nsubdevs = 5, + /* DI, IDI, DO, IDO, ID, IRQ_DI0, IRQ_DI1, IRQ_IDI0, IRQ_IDI1 */ + .nsubdevs = 9, .sdi[0] = { 16, 0x02, }, /* DI 0-15 */ .sdi[1] = { 16, 0x00, }, /* ISO DI 0-15 */ .sdo[0] = { 16, 0x02, }, /* DO 0-15 */ .sdo[1] = { 16, 0x00, }, /* ISO DO 0-15 */ .id_reg = 0x04, + .sdirq[0] = { PCI173X_INT_DI0, 0x02, }, /* DI 0 */ + .sdirq[1] = { PCI173X_INT_DI1, 0x02, }, /* DI 1 */ + .sdirq[2] = { PCI173X_INT_IDI0, 0x00, }, /* ISO DI 0 */ + .sdirq[3] = { PCI173X_INT_IDI1, 0x00, }, /* ISO DI 1 */ }, [TYPE_PCI1733] = { .name = "pci1733", @@ -205,6 +223,188 @@ static const struct dio_boardtype boardtypes[] = { }, }; +struct pci_dio_dev_private_data { + int boardtype; + int irq_subd; + unsigned short int_ctrl; + unsigned short int_rf; +}; + +struct pci_dio_sd_private_data { + spinlock_t subd_slock; /* spin-lock for cmd_running */ + unsigned long port_offset; + short int cmd_running; +}; + +static void process_irq(struct comedi_device *dev, unsigned int subdev, + unsigned char irqflags) +{ + struct comedi_subdevice *s = &dev->subdevices[subdev]; + struct pci_dio_sd_private_data *sd_priv = s->private; + unsigned long reg = sd_priv->port_offset; + struct comedi_async *async_p = s->async; + + if (async_p) { + unsigned short val = inw(dev->iobase + reg); + + spin_lock(&sd_priv->subd_slock); + if (sd_priv->cmd_running) + comedi_buf_write_samples(s, &val, 1); + spin_unlock(&sd_priv->subd_slock); + comedi_handle_events(dev, s); + } +} + +static irqreturn_t pci_dio_interrupt(int irq, void *p_device) +{ + struct comedi_device *dev = p_device; + struct pci_dio_dev_private_data *dev_private = dev->private; + const struct dio_boardtype *board = dev->board_ptr; + unsigned long cpu_flags; + unsigned char irqflags; + int i; + + if (!dev->attached) { + /* Ignore interrupt before device fully attached. */ + /* Might not even have allocated subdevices yet! */ + return IRQ_NONE; + } + + /* Check if we are source of interrupt */ + spin_lock_irqsave(&dev->spinlock, cpu_flags); + irqflags = inb(dev->iobase + PCI173X_INT_FLAG_REG); + if (!(irqflags & 0x0F)) { + spin_unlock_irqrestore(&dev->spinlock, cpu_flags); + return IRQ_NONE; + } + + /* clear all current interrupt flags */ + outb(irqflags, dev->iobase + PCI173X_INT_CLR_REG); + spin_unlock_irqrestore(&dev->spinlock, cpu_flags); + + /* check irq subdevice triggers */ + for (i = 0; i < PCI_DIO_MAX_IRQ_SUBDEVS; i++) { + if (irqflags & board->sdirq[i].int_en) + process_irq(dev, dev_private->irq_subd + i, irqflags); + } + + return IRQ_HANDLED; +} + +static int pci_dio_asy_cmdtest(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_cmd *cmd) +{ + int err = 0; + + /* Step 1 : check if triggers are trivially valid */ + + err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW); + err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT); + err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW); + err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT); + err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE); + + if (err) + return 1; + + /* Step 2a : make sure trigger sources are unique */ + /* Step 2b : and mutually compatible */ + + /* Step 3: check if arguments are trivially valid */ + + err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0); + /* + * For scan_begin_arg, the trigger number must be 0 and the only + * allowed flags are CR_EDGE and CR_INVERT. CR_EDGE is ignored, + * CR_INVERT sets the trigger to falling edge. + */ + if (cmd->scan_begin_arg & ~(CR_EDGE | CR_INVERT)) { + cmd->scan_begin_arg &= (CR_EDGE | CR_INVERT); + err |= -EINVAL; + } + err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); + err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg, + cmd->chanlist_len); + err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0); + + if (err) + return 3; + + /* Step 4: fix up any arguments */ + + /* Step 5: check channel list if it exists */ + + return 0; +} + +static int pci_dio_asy_cmd(struct comedi_device *dev, + struct comedi_subdevice *s) +{ + struct pci_dio_dev_private_data *dev_private = dev->private; + struct pci_dio_sd_private_data *sd_priv = s->private; + const struct dio_boardtype *board = dev->board_ptr; + struct comedi_cmd *cmd = &s->async->cmd; + unsigned long cpu_flags; + unsigned short int_en; + + int_en = board->sdirq[s->index - dev_private->irq_subd].int_en; + + spin_lock_irqsave(&dev->spinlock, cpu_flags); + if (cmd->scan_begin_arg & CR_INVERT) + dev_private->int_rf |= int_en; /* falling edge */ + else + dev_private->int_rf &= ~int_en; /* rising edge */ + outb(dev_private->int_rf, dev->iobase + PCI173X_INT_RF_REG); + dev_private->int_ctrl |= int_en; /* enable interrupt source */ + outb(dev_private->int_ctrl, dev->iobase + PCI173X_INT_EN_REG); + spin_unlock_irqrestore(&dev->spinlock, cpu_flags); + + spin_lock_irqsave(&sd_priv->subd_slock, cpu_flags); + sd_priv->cmd_running = 1; + spin_unlock_irqrestore(&sd_priv->subd_slock, cpu_flags); + + return 0; +} + +static int pci_dio_asy_cancel(struct comedi_device *dev, + struct comedi_subdevice *s) +{ + struct pci_dio_dev_private_data *dev_private = dev->private; + struct pci_dio_sd_private_data *sd_priv = s->private; + const struct dio_boardtype *board = dev->board_ptr; + unsigned long cpu_flags; + unsigned short int_en; + + spin_lock_irqsave(&sd_priv->subd_slock, cpu_flags); + sd_priv->cmd_running = 0; + spin_unlock_irqrestore(&sd_priv->subd_slock, cpu_flags); + + int_en = board->sdirq[s->index - dev_private->irq_subd].int_en; + + spin_lock_irqsave(&dev->spinlock, cpu_flags); + dev_private->int_ctrl &= ~int_en; + outb(dev_private->int_ctrl, dev->iobase + PCI173X_INT_EN_REG); + spin_unlock_irqrestore(&dev->spinlock, cpu_flags); + + return 0; +} + +/* same as _insn_bits_di_ because the IRQ-pins are the DI-ports */ +static int pci_dio_insn_bits_dirq_b(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data) +{ + struct pci_dio_sd_private_data *sd_priv = s->private; + unsigned long reg = (unsigned long)sd_priv->port_offset; + unsigned long iobase = dev->iobase + reg; + + data[1] = inb(iobase); + + return insn->n; +} + static int pci_dio_insn_bits_di_b(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, @@ -283,6 +483,7 @@ static int pci_dio_insn_bits_do_w(struct comedi_device *dev, static int pci_dio_reset(struct comedi_device *dev, unsigned long cardtype) { + struct pci_dio_dev_private_data *dev_private = dev->private; /* disable channel freeze function on the PCI-1752/1756 boards */ if (cardtype == TYPE_PCI1752 || cardtype == TYPE_PCI1756) outw(0, dev->iobase + PCI1752_CFC_REG); @@ -292,9 +493,13 @@ static int pci_dio_reset(struct comedi_device *dev, unsigned long cardtype) case TYPE_PCI1730: case TYPE_PCI1733: case TYPE_PCI1736: - outb(0, dev->iobase + PCI173X_INT_EN_REG); + dev_private->int_ctrl = 0x00; + outb(dev_private->int_ctrl, dev->iobase + PCI173X_INT_EN_REG); + /* Reset all 4 Int Flags */ outb(0x0f, dev->iobase + PCI173X_INT_CLR_REG); - outb(0, dev->iobase + PCI173X_INT_RF_REG); + /* Rising Edge => IRQ . On all 4 Pins */ + dev_private->int_rf = 0x00; + outb(dev_private->int_rf, dev->iobase + PCI173X_INT_RF_REG); break; case TYPE_PCI1739: case TYPE_PCI1750: @@ -346,8 +551,8 @@ static int pci_dio_auto_attach(struct comedi_device *dev, { struct pci_dev *pcidev = comedi_to_pci_dev(dev); const struct dio_boardtype *board = NULL; - const struct diosubd_data *d; struct comedi_subdevice *s; + struct pci_dio_dev_private_data *dev_private; int ret, subdev, i, j; if (context < ARRAY_SIZE(boardtypes)) @@ -357,6 +562,10 @@ static int pci_dio_auto_attach(struct comedi_device *dev, dev->board_ptr = board; dev->board_name = board->name; + dev_private = comedi_alloc_devpriv(dev, sizeof(*dev_private)); + if (!dev_private) + return -ENOMEM; + ret = comedi_pci_enable(dev); if (ret) return ret; @@ -365,15 +574,25 @@ static int pci_dio_auto_attach(struct comedi_device *dev, else dev->iobase = pci_resource_start(pcidev, 2); + dev_private->boardtype = context; pci_dio_reset(dev, context); + /* request IRQ if device has irq subdevices */ + if (board->sdirq[0].int_en && pcidev->irq) { + ret = request_irq(pcidev->irq, pci_dio_interrupt, IRQF_SHARED, + dev->board_name, dev); + if (ret == 0) + dev->irq = pcidev->irq; + } + ret = comedi_alloc_subdevices(dev, board->nsubdevs); if (ret) return ret; subdev = 0; for (i = 0; i < PCI_DIO_MAX_DI_SUBDEVS; i++) { - d = &board->sdi[i]; + const struct diosubd_data *d = &board->sdi[i]; + if (d->chans) { s = &dev->subdevices[subdev++]; s->type = COMEDI_SUBD_DI; @@ -385,11 +604,13 @@ static int pci_dio_auto_attach(struct comedi_device *dev, ? pci_dio_insn_bits_di_w : pci_dio_insn_bits_di_b; s->private = (void *)d->addr; + } } for (i = 0; i < PCI_DIO_MAX_DO_SUBDEVS; i++) { - d = &board->sdo[i]; + const struct diosubd_data *d = &board->sdo[i]; + if (d->chans) { s = &dev->subdevices[subdev++]; s->type = COMEDI_SUBD_DO; @@ -420,7 +641,8 @@ static int pci_dio_auto_attach(struct comedi_device *dev, } for (i = 0; i < PCI_DIO_MAX_DIO_SUBDEVG; i++) { - d = &board->sdio[i]; + const struct diosubd_data *d = &board->sdio[i]; + for (j = 0; j < d->chans; j++) { s = &dev->subdevices[subdev++]; ret = subdev_8255_init(dev, s, NULL, @@ -454,14 +676,57 @@ static int pci_dio_auto_attach(struct comedi_device *dev, comedi_8254_subdevice_init(s, dev->pacer); } + dev_private->irq_subd = subdev; /* first interrupt subdevice index */ + for (i = 0; i < PCI_DIO_MAX_IRQ_SUBDEVS; ++i) { + struct pci_dio_sd_private_data *sd_priv = NULL; + const struct dio_irq_subd_data *d = &board->sdirq[i]; + + if (d->int_en) { + s = &dev->subdevices[subdev++]; + s->type = COMEDI_SUBD_DI; + s->subdev_flags = SDF_READABLE; + s->n_chan = 1; + s->maxdata = 1; + s->range_table = &range_digital; + s->insn_bits = pci_dio_insn_bits_dirq_b; + sd_priv = comedi_alloc_spriv(s, sizeof(*sd_priv)); + if (!sd_priv) + return -ENOMEM; + + spin_lock_init(&sd_priv->subd_slock); + sd_priv->port_offset = d->addr; + sd_priv->cmd_running = 0; + + if (dev->irq) { + dev->read_subdev = s; + s->type = COMEDI_SUBD_DI; + s->subdev_flags = SDF_READABLE | SDF_CMD_READ; + s->len_chanlist = 1; + s->do_cmdtest = pci_dio_asy_cmdtest; + s->do_cmd = pci_dio_asy_cmd; + s->cancel = pci_dio_asy_cancel; + } + } + } + return 0; } +static void pci_dio_detach(struct comedi_device *dev) +{ + struct pci_dio_dev_private_data *dev_private = dev->private; + int boardtype = dev_private->boardtype; + + if (dev->iobase) + pci_dio_reset(dev, boardtype); + comedi_pci_detach(dev); +} + static struct comedi_driver adv_pci_dio_driver = { .driver_name = "adv_pci_dio", .module = THIS_MODULE, .auto_attach = pci_dio_auto_attach, - .detach = comedi_pci_detach, + .detach = pci_dio_detach, }; static unsigned long pci_dio_override_cardtype(struct pci_dev *pcidev, diff --git a/drivers/staging/emxx_udc/emxx_udc.c b/drivers/staging/emxx_udc/emxx_udc.c index a30b4f5b199b..3536c03ff523 100644 --- a/drivers/staging/emxx_udc/emxx_udc.c +++ b/drivers/staging/emxx_udc/emxx_udc.c @@ -34,6 +34,9 @@ #define DRIVER_DESC "EMXX UDC driver" #define DMA_ADDR_INVALID (~(dma_addr_t)0) +static struct gpio_desc *vbus_gpio; +static int vbus_irq; + static const char driver_name[] = "emxx_udc"; static const char driver_desc[] = DRIVER_DESC; diff --git a/drivers/staging/emxx_udc/emxx_udc.h b/drivers/staging/emxx_udc/emxx_udc.h index bca614d69aca..c9e37a1b8139 100644 --- a/drivers/staging/emxx_udc/emxx_udc.h +++ b/drivers/staging/emxx_udc/emxx_udc.h @@ -20,8 +20,6 @@ /* below hacked up for staging integration */ #define GPIO_VBUS 0 /* GPIO_P153 on KZM9D */ #define INT_VBUS 0 /* IRQ for GPIO_P153 */ -struct gpio_desc *vbus_gpio; -int vbus_irq; /*------------ Board dependence(Wait) */ diff --git a/drivers/staging/fbtft/fb_st7789v.c b/drivers/staging/fbtft/fb_st7789v.c index 3a280cc1892c..abe9395a0aef 100644 --- a/drivers/staging/fbtft/fb_st7789v.c +++ b/drivers/staging/fbtft/fb_st7789v.c @@ -7,9 +7,13 @@ #include <linux/bitops.h> #include <linux/delay.h> +#include <linux/gpio/consumer.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/interrupt.h> +#include <linux/completion.h> #include <linux/module.h> + #include <video/mipi_display.h> #include "fbtft.h" @@ -66,6 +70,62 @@ enum st7789v_command { #define MADCTL_MX BIT(6) /* bitmask for column address order */ #define MADCTL_MY BIT(7) /* bitmask for page address order */ +/* 60Hz for 16.6ms, configured as 2*16.6ms */ +#define PANEL_TE_TIMEOUT_MS 33 + +static struct completion panel_te; /* completion for panel TE line */ +static int irq_te; /* Linux IRQ for LCD TE line */ + +static irqreturn_t panel_te_handler(int irq, void *data) +{ + complete(&panel_te); + return IRQ_HANDLED; +} + +/* + * init_tearing_effect_line() - init tearing effect line. + * @par: FBTFT parameter object. + * + * Return: 0 on success, or a negative error code otherwise. + */ +static int init_tearing_effect_line(struct fbtft_par *par) +{ + struct device *dev = par->info->device; + struct gpio_desc *te; + int rc, irq; + + te = gpiod_get_optional(dev, "te", GPIOD_IN); + if (IS_ERR(te)) + return dev_err_probe(dev, PTR_ERR(te), "Failed to request te GPIO\n"); + + /* if te is NULL, indicating no configuration, directly return success */ + if (!te) { + irq_te = 0; + return 0; + } + + irq = gpiod_to_irq(te); + + /* GPIO is locked as an IRQ, we may drop the reference */ + gpiod_put(te); + + if (irq < 0) + return irq; + + irq_te = irq; + init_completion(&panel_te); + + /* The effective state is high and lasts no more than 1000 microseconds */ + rc = devm_request_irq(dev, irq_te, panel_te_handler, + IRQF_TRIGGER_RISING, "TE_GPIO", par); + if (rc) + return dev_err_probe(dev, rc, "TE IRQ request failed.\n"); + + disable_irq_nosync(irq_te); + + return 0; +} + /** * init_display() - initialize the display controller * @@ -82,6 +142,12 @@ enum st7789v_command { */ static int init_display(struct fbtft_par *par) { + int rc; + + rc = init_tearing_effect_line(par); + if (rc) + return rc; + /* turn off sleep mode */ write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE); mdelay(120); @@ -137,6 +203,10 @@ static int init_display(struct fbtft_par *par) */ write_reg(par, PWCTRL1, 0xA4, 0xA1); + /* TE line output is off by default when powering on */ + if (irq_te) + write_reg(par, MIPI_DCS_SET_TEAR_ON, 0x00); + write_reg(par, MIPI_DCS_SET_DISPLAY_ON); if (HSD20_IPS) @@ -145,6 +215,50 @@ static int init_display(struct fbtft_par *par) return 0; } +/* + * write_vmem() - write data to display. + * @par: FBTFT parameter object. + * @offset: offset from screen_buffer. + * @len: the length of data to be writte. + * + * Return: 0 on success, or a negative error code otherwise. + */ +static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) +{ + struct device *dev = par->info->device; + int ret; + + if (irq_te) { + enable_irq(irq_te); + reinit_completion(&panel_te); + ret = wait_for_completion_timeout(&panel_te, + msecs_to_jiffies(PANEL_TE_TIMEOUT_MS)); + if (ret == 0) + dev_err(dev, "wait panel TE timeout\n"); + + disable_irq(irq_te); + } + + switch (par->pdata->display.buswidth) { + case 8: + ret = fbtft_write_vmem16_bus8(par, offset, len); + break; + case 9: + ret = fbtft_write_vmem16_bus9(par, offset, len); + break; + case 16: + ret = fbtft_write_vmem16_bus16(par, offset, len); + break; + default: + dev_err(dev, "Unsupported buswidth %d\n", + par->pdata->display.buswidth); + ret = 0; + break; + } + + return ret; +} + /** * set_var() - apply LCD properties like rotation and BGR mode * @@ -259,6 +373,7 @@ static struct fbtft_display display = { .gamma = HSD20_IPS_GAMMA, .fbtftops = { .init_display = init_display, + .write_vmem = write_vmem, .set_var = set_var, .set_gamma = set_gamma, .blank = blank, diff --git a/drivers/staging/fieldbus/anybuss/arcx-anybus.c b/drivers/staging/fieldbus/anybuss/arcx-anybus.c index b5fded15e8a6..9af2e63050d1 100644 --- a/drivers/staging/fieldbus/anybuss/arcx-anybus.c +++ b/drivers/staging/fieldbus/anybuss/arcx-anybus.c @@ -185,7 +185,7 @@ static struct attribute *controller_attributes[] = { NULL, }; -static struct attribute_group controller_attribute_group = { +static const struct attribute_group controller_attribute_group = { .attrs = controller_attributes, }; @@ -206,7 +206,7 @@ static int can_power_is_enabled(struct regulator_dev *rdev) return !(readb(cd->cpld_base + CPLD_STATUS1) & CPLD_STATUS1_CAN_POWER); } -static struct regulator_ops can_power_ops = { +static const struct regulator_ops can_power_ops = { .is_enabled = can_power_is_enabled, }; diff --git a/drivers/staging/fsl-dpaa2/ethsw/ethsw-ethtool.c b/drivers/staging/fsl-dpaa2/ethsw/ethsw-ethtool.c index d7f4ed1df69d..0af2e9914ec4 100644 --- a/drivers/staging/fsl-dpaa2/ethsw/ethsw-ethtool.c +++ b/drivers/staging/fsl-dpaa2/ethsw/ethsw-ethtool.c @@ -38,19 +38,19 @@ static void dpaa2_switch_get_drvinfo(struct net_device *netdev, u16 version_major, version_minor; int err; - strlcpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver)); + strscpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver)); err = dpsw_get_api_version(port_priv->ethsw_data->mc_io, 0, &version_major, &version_minor); if (err) - strlcpy(drvinfo->fw_version, "N/A", + strscpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version)); else snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "%u.%u", version_major, version_minor); - strlcpy(drvinfo->bus_info, dev_name(netdev->dev.parent->parent), + strscpy(drvinfo->bus_info, dev_name(netdev->dev.parent->parent), sizeof(drvinfo->bus_info)); } diff --git a/drivers/staging/fwserial/fwserial.c b/drivers/staging/fwserial/fwserial.c index db83d34cd677..c368082aae1a 100644 --- a/drivers/staging/fwserial/fwserial.c +++ b/drivers/staging/fwserial/fwserial.c @@ -2189,6 +2189,7 @@ static int fwserial_create(struct fw_unit *unit) err = fw_core_add_address_handler(&port->rx_handler, &fw_high_memory_region); if (err) { + tty_port_destroy(&port->port); kfree(port); goto free_ports; } @@ -2271,6 +2272,7 @@ unregister_ttys: free_ports: for (--i; i >= 0; --i) { + fw_core_remove_address_handler(&serial->ports[i]->rx_handler); tty_port_destroy(&serial->ports[i]->port); kfree(serial->ports[i]); } diff --git a/drivers/staging/gasket/gasket_ioctl.c b/drivers/staging/gasket/gasket_ioctl.c index e3047d36d8db..aa65f4fbf860 100644 --- a/drivers/staging/gasket/gasket_ioctl.c +++ b/drivers/staging/gasket/gasket_ioctl.c @@ -40,10 +40,11 @@ static int gasket_set_event_fd(struct gasket_dev *gasket_dev, /* Read the size of the page table. */ static int gasket_read_page_table_size(struct gasket_dev *gasket_dev, - struct gasket_page_table_ioctl __user *argp) + struct gasket_page_table_ioctl __user *argp) { int ret = 0; struct gasket_page_table_ioctl ibuf; + struct gasket_page_table *table; if (copy_from_user(&ibuf, argp, sizeof(struct gasket_page_table_ioctl))) return -EFAULT; @@ -51,8 +52,8 @@ static int gasket_read_page_table_size(struct gasket_dev *gasket_dev, if (ibuf.page_table_index >= gasket_dev->num_page_tables) return -EFAULT; - ibuf.size = gasket_page_table_num_entries( - gasket_dev->page_table[ibuf.page_table_index]); + table = gasket_dev->page_table[ibuf.page_table_index]; + ibuf.size = gasket_page_table_num_entries(table); trace_gasket_ioctl_page_table_data(ibuf.page_table_index, ibuf.size, ibuf.host_address, @@ -66,10 +67,11 @@ static int gasket_read_page_table_size(struct gasket_dev *gasket_dev, /* Read the size of the simple page table. */ static int gasket_read_simple_page_table_size(struct gasket_dev *gasket_dev, - struct gasket_page_table_ioctl __user *argp) + struct gasket_page_table_ioctl __user *argp) { int ret = 0; struct gasket_page_table_ioctl ibuf; + struct gasket_page_table *table; if (copy_from_user(&ibuf, argp, sizeof(struct gasket_page_table_ioctl))) return -EFAULT; @@ -77,8 +79,8 @@ static int gasket_read_simple_page_table_size(struct gasket_dev *gasket_dev, if (ibuf.page_table_index >= gasket_dev->num_page_tables) return -EFAULT; - ibuf.size = - gasket_page_table_num_simple_entries(gasket_dev->page_table[ibuf.page_table_index]); + table = gasket_dev->page_table[ibuf.page_table_index]; + ibuf.size = gasket_page_table_num_simple_entries(table); trace_gasket_ioctl_page_table_data(ibuf.page_table_index, ibuf.size, ibuf.host_address, @@ -92,11 +94,12 @@ static int gasket_read_simple_page_table_size(struct gasket_dev *gasket_dev, /* Set the boundary between the simple and extended page tables. */ static int gasket_partition_page_table(struct gasket_dev *gasket_dev, - struct gasket_page_table_ioctl __user *argp) + struct gasket_page_table_ioctl __user *argp) { int ret; struct gasket_page_table_ioctl ibuf; uint max_page_table_size; + struct gasket_page_table *table; if (copy_from_user(&ibuf, argp, sizeof(struct gasket_page_table_ioctl))) return -EFAULT; @@ -107,8 +110,8 @@ static int gasket_partition_page_table(struct gasket_dev *gasket_dev, if (ibuf.page_table_index >= gasket_dev->num_page_tables) return -EFAULT; - max_page_table_size = gasket_page_table_max_size( - gasket_dev->page_table[ibuf.page_table_index]); + table = gasket_dev->page_table[ibuf.page_table_index]; + max_page_table_size = gasket_page_table_max_size(table); if (ibuf.size > max_page_table_size) { dev_dbg(gasket_dev->dev, @@ -119,8 +122,7 @@ static int gasket_partition_page_table(struct gasket_dev *gasket_dev, mutex_lock(&gasket_dev->mutex); - ret = gasket_page_table_partition( - gasket_dev->page_table[ibuf.page_table_index], ibuf.size); + ret = gasket_page_table_partition(table, ibuf.size); mutex_unlock(&gasket_dev->mutex); return ret; @@ -131,6 +133,7 @@ static int gasket_map_buffers(struct gasket_dev *gasket_dev, struct gasket_page_table_ioctl __user *argp) { struct gasket_page_table_ioctl ibuf; + struct gasket_page_table *table; if (copy_from_user(&ibuf, argp, sizeof(struct gasket_page_table_ioctl))) return -EFAULT; @@ -142,13 +145,12 @@ static int gasket_map_buffers(struct gasket_dev *gasket_dev, if (ibuf.page_table_index >= gasket_dev->num_page_tables) return -EFAULT; - if (gasket_page_table_are_addrs_bad(gasket_dev->page_table[ibuf.page_table_index], - ibuf.host_address, + table = gasket_dev->page_table[ibuf.page_table_index]; + if (gasket_page_table_are_addrs_bad(table, ibuf.host_address, ibuf.device_address, ibuf.size)) return -EINVAL; - return gasket_page_table_map(gasket_dev->page_table[ibuf.page_table_index], - ibuf.host_address, ibuf.device_address, + return gasket_page_table_map(table, ibuf.host_address, ibuf.device_address, ibuf.size / PAGE_SIZE); } @@ -157,6 +159,7 @@ static int gasket_unmap_buffers(struct gasket_dev *gasket_dev, struct gasket_page_table_ioctl __user *argp) { struct gasket_page_table_ioctl ibuf; + struct gasket_page_table *table; if (copy_from_user(&ibuf, argp, sizeof(struct gasket_page_table_ioctl))) return -EFAULT; @@ -168,12 +171,11 @@ static int gasket_unmap_buffers(struct gasket_dev *gasket_dev, if (ibuf.page_table_index >= gasket_dev->num_page_tables) return -EFAULT; - if (gasket_page_table_is_dev_addr_bad(gasket_dev->page_table[ibuf.page_table_index], - ibuf.device_address, ibuf.size)) + table = gasket_dev->page_table[ibuf.page_table_index]; + if (gasket_page_table_is_dev_addr_bad(table, ibuf.device_address, ibuf.size)) return -EINVAL; - gasket_page_table_unmap(gasket_dev->page_table[ibuf.page_table_index], - ibuf.device_address, ibuf.size / PAGE_SIZE); + gasket_page_table_unmap(table, ibuf.device_address, ibuf.size / PAGE_SIZE); return 0; } @@ -183,7 +185,7 @@ static int gasket_unmap_buffers(struct gasket_dev *gasket_dev, * corresponding memory. */ static int gasket_config_coherent_allocator(struct gasket_dev *gasket_dev, - struct gasket_coherent_alloc_config_ioctl __user *argp) + struct gasket_coherent_alloc_config_ioctl __user *argp) { int ret; struct gasket_coherent_alloc_config_ioctl ibuf; diff --git a/drivers/staging/gdm724x/gdm_usb.c b/drivers/staging/gdm724x/gdm_usb.c index dc4da66c3695..54bdb64f52e8 100644 --- a/drivers/staging/gdm724x/gdm_usb.c +++ b/drivers/staging/gdm724x/gdm_usb.c @@ -56,20 +56,24 @@ static int gdm_usb_recv(void *priv_dev, static int request_mac_address(struct lte_udev *udev) { - u8 buf[16] = {0,}; - struct hci_packet *hci = (struct hci_packet *)buf; + struct hci_packet *hci; struct usb_device *usbdev = udev->usbdev; int actual; int ret = -1; + hci = kmalloc(struct_size(hci, data, 1), GFP_KERNEL); + if (!hci) + return -ENOMEM; + hci->cmd_evt = gdm_cpu_to_dev16(udev->gdm_ed, LTE_GET_INFORMATION); hci->len = gdm_cpu_to_dev16(udev->gdm_ed, 1); hci->data[0] = MAC_ADDRESS; - ret = usb_bulk_msg(usbdev, usb_sndbulkpipe(usbdev, 2), buf, 5, + ret = usb_bulk_msg(usbdev, usb_sndbulkpipe(usbdev, 2), hci, 5, &actual, 1000); udev->request_mac_addr = 1; + kfree(hci); return ret; } diff --git a/drivers/staging/greybus/audio_helper.c b/drivers/staging/greybus/audio_helper.c index 3011b8abce38..1ed4772d2771 100644 --- a/drivers/staging/greybus/audio_helper.c +++ b/drivers/staging/greybus/audio_helper.c @@ -166,7 +166,7 @@ static int gbaudio_remove_controls(struct snd_card *card, struct device *dev, snprintf(id.name, sizeof(id.name), "%s %s", prefix, control->name); else - strlcpy(id.name, control->name, sizeof(id.name)); + strscpy(id.name, control->name, sizeof(id.name)); id.numid = 0; id.iface = control->iface; id.device = control->device; diff --git a/drivers/staging/greybus/audio_manager_sysfs.c b/drivers/staging/greybus/audio_manager_sysfs.c index ab882cc49b41..fcd518f9540c 100644 --- a/drivers/staging/greybus/audio_manager_sysfs.c +++ b/drivers/staging/greybus/audio_manager_sysfs.c @@ -18,8 +18,8 @@ static ssize_t manager_sysfs_add_store(struct kobject *kobj, struct gb_audio_manager_module_descriptor desc = { {0} }; int num = sscanf(buf, - "name=%" GB_AUDIO_MANAGER_MODULE_NAME_LEN_SSCANF "s " - "vid=%d pid=%d intf_id=%d i/p devices=0x%X o/p devices=0x%X", + "name=%" GB_AUDIO_MANAGER_MODULE_NAME_LEN_SSCANF + "s vid=%d pid=%d intf_id=%d i/p devices=0x%X o/p devices=0x%X", desc.name, &desc.vid, &desc.pid, &desc.intf_id, &desc.ip_devices, &desc.op_devices); diff --git a/drivers/staging/greybus/audio_module.c b/drivers/staging/greybus/audio_module.c index a243d60f0d56..0f9fdc077b4c 100644 --- a/drivers/staging/greybus/audio_module.c +++ b/drivers/staging/greybus/audio_module.c @@ -342,7 +342,7 @@ static int gb_audio_probe(struct gb_bundle *bundle, /* inform above layer for uevent */ dev_dbg(dev, "Inform set_event:%d to above layer\n", 1); /* prepare for the audio manager */ - strlcpy(desc.name, gbmodule->name, GB_AUDIO_MANAGER_MODULE_NAME_LEN); + strscpy(desc.name, gbmodule->name, GB_AUDIO_MANAGER_MODULE_NAME_LEN); desc.vid = 2; /* todo */ desc.pid = 3; /* todo */ desc.intf_id = gbmodule->dev_id; diff --git a/drivers/staging/greybus/audio_topology.c b/drivers/staging/greybus/audio_topology.c index 662e3e8b4b63..e816e4db555e 100644 --- a/drivers/staging/greybus/audio_topology.c +++ b/drivers/staging/greybus/audio_topology.c @@ -200,7 +200,7 @@ static int gbcodec_mixer_ctl_info(struct snd_kcontrol *kcontrol, return -EINVAL; name = gbaudio_map_controlid(module, data->ctl_id, uinfo->value.enumerated.item); - strlcpy(uinfo->value.enumerated.name, name, NAME_SIZE); + strscpy(uinfo->value.enumerated.name, name, NAME_SIZE); break; default: dev_err(comp->dev, "Invalid type: %d for %s:kcontrol\n", @@ -1047,7 +1047,7 @@ static int gbaudio_tplg_create_widget(struct gbaudio_module_info *module, } /* Prefix dev_id to widget control_name */ - strlcpy(temp_name, w->name, NAME_SIZE); + strscpy(temp_name, w->name, NAME_SIZE); snprintf(w->name, NAME_SIZE, "GB %d %s", module->dev_id, temp_name); switch (w->type) { @@ -1169,7 +1169,7 @@ static int gbaudio_tplg_process_kcontrols(struct gbaudio_module_info *module, } control->id = curr->id; /* Prefix dev_id to widget_name */ - strlcpy(temp_name, curr->name, NAME_SIZE); + strscpy(temp_name, curr->name, NAME_SIZE); snprintf(curr->name, NAME_SIZE, "GB %d %s", module->dev_id, temp_name); control->name = curr->name; diff --git a/drivers/staging/greybus/hid.c b/drivers/staging/greybus/hid.c index ed706f39e87a..adb91286803a 100644 --- a/drivers/staging/greybus/hid.c +++ b/drivers/staging/greybus/hid.c @@ -221,8 +221,8 @@ static void gb_hid_init_reports(struct gb_hid *ghid) } static int __gb_hid_get_raw_report(struct hid_device *hid, - unsigned char report_number, __u8 *buf, size_t count, - unsigned char report_type) + unsigned char report_number, __u8 *buf, size_t count, + unsigned char report_type) { struct gb_hid *ghid = hid->driver_data; int ret; @@ -254,7 +254,7 @@ static int __gb_hid_output_raw_report(struct hid_device *hid, __u8 *buf, ret = gb_hid_set_report(ghid, report_type, report_id, buf, len); if (report_id && ret >= 0) - ret++; /* add report_id to the number of transfered bytes */ + ret++; /* add report_id to the number of transferred bytes */ return 0; } diff --git a/drivers/staging/greybus/light.c b/drivers/staging/greybus/light.c index d2672b65c3f4..87d36948c610 100644 --- a/drivers/staging/greybus/light.c +++ b/drivers/staging/greybus/light.c @@ -290,8 +290,7 @@ static int channel_attr_groups_set(struct gb_channel *channel, channel->attrs = kcalloc(size + 1, sizeof(*channel->attrs), GFP_KERNEL); if (!channel->attrs) return -ENOMEM; - channel->attr_group = kcalloc(1, sizeof(*channel->attr_group), - GFP_KERNEL); + channel->attr_group = kzalloc(sizeof(*channel->attr_group), GFP_KERNEL); if (!channel->attr_group) return -ENOMEM; channel->attr_groups = kcalloc(2, sizeof(*channel->attr_groups), diff --git a/drivers/staging/greybus/power_supply.c b/drivers/staging/greybus/power_supply.c index ec96f28887f9..75cb170e05fb 100644 --- a/drivers/staging/greybus/power_supply.c +++ b/drivers/staging/greybus/power_supply.c @@ -449,7 +449,7 @@ static int __gb_power_supply_set_name(char *init_name, char *name, size_t len) if (!strlen(init_name)) init_name = "gb_power_supply"; - strlcpy(name, init_name, len); + strscpy(name, init_name, len); while ((ret < len) && (psy = power_supply_get_by_name(name))) { power_supply_put(psy); diff --git a/drivers/staging/greybus/spilib.c b/drivers/staging/greybus/spilib.c index fc27c52de74a..672d540d3365 100644 --- a/drivers/staging/greybus/spilib.c +++ b/drivers/staging/greybus/spilib.c @@ -455,10 +455,10 @@ static int gb_spi_setup_device(struct gb_spilib *spi, u8 cs) dev_type = response.device_type; if (dev_type == GB_SPI_SPI_DEV) - strlcpy(spi_board.modalias, "spidev", + strscpy(spi_board.modalias, "spidev", sizeof(spi_board.modalias)); else if (dev_type == GB_SPI_SPI_NOR) - strlcpy(spi_board.modalias, "spi-nor", + strscpy(spi_board.modalias, "spi-nor", sizeof(spi_board.modalias)); else if (dev_type == GB_SPI_SPI_MODALIAS) memcpy(spi_board.modalias, response.name, diff --git a/drivers/staging/hikey9xx/Kconfig b/drivers/staging/hikey9xx/Kconfig index 2e48ded92a7e..82bb4a22b286 100644 --- a/drivers/staging/hikey9xx/Kconfig +++ b/drivers/staging/hikey9xx/Kconfig @@ -29,6 +29,7 @@ config MFD_HI6421_SPMI depends on OF depends on SPMI select MFD_CORE + select REGMAP_SPMI help Add support for HiSilicon Hi6421v600 SPMI PMIC. Hi6421 includes multi-functions, such as regulators, RTC, codec, Coulomb counter, @@ -44,6 +45,7 @@ config REGULATOR_HI6421V600 tristate "HiSilicon Hi6421v600 PMIC voltage regulator support" depends on MFD_HI6421_SPMI && OF depends on REGULATOR + select REGMAP help This driver provides support for the voltage regulators on HiSilicon Hi6421v600 PMU / Codec IC. diff --git a/drivers/staging/hikey9xx/hi6421-spmi-pmic.c b/drivers/staging/hikey9xx/hi6421-spmi-pmic.c index 4f34a5282970..4ebcfea9f3bf 100644 --- a/drivers/staging/hikey9xx/hi6421-spmi-pmic.c +++ b/drivers/staging/hikey9xx/hi6421-spmi-pmic.c @@ -4,149 +4,105 @@ * * Copyright (c) 2013 Linaro Ltd. * Copyright (c) 2011 Hisilicon. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * + * Copyright (c) 2020-2021 Huawei Technologies Co., Ltd */ -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/err.h> +#include <linux/bitops.h> #include <linux/interrupt.h> -#include <linux/io.h> #include <linux/irq.h> #include <linux/mfd/core.h> #include <linux/mfd/hi6421-spmi-pmic.h> #include <linux/module.h> -#include <linux/of_address.h> -#include <linux/of_device.h> #include <linux/of_gpio.h> -#include <linux/of.h> -#include <linux/of_irq.h> #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/spmi.h> -/* 8-bit register offset in PMIC */ -#define HISI_MASK_STATE 0xff +enum hi6421_spmi_pmic_irq_list { + OTMP = 0, + VBUS_CONNECT, + VBUS_DISCONNECT, + ALARMON_R, + HOLD_6S, + HOLD_1S, + POWERKEY_UP, + POWERKEY_DOWN, + OCP_SCP_R, + COUL_R, + SIM0_HPD_R, + SIM0_HPD_F, + SIM1_HPD_R, + SIM1_HPD_F, + PMIC_IRQ_LIST_MAX, +}; #define HISI_IRQ_ARRAY 2 #define HISI_IRQ_NUM (HISI_IRQ_ARRAY * 8) -#define SOC_PMIC_IRQ_MASK_0_ADDR 0x0202 -#define SOC_PMIC_IRQ0_ADDR 0x0212 - #define HISI_IRQ_KEY_NUM 0 -#define HISI_IRQ_KEY_VALUE 0xc0 -#define HISI_IRQ_KEY_DOWN 7 -#define HISI_IRQ_KEY_UP 6 -#define HISI_MASK_FIELD 0xFF #define HISI_BITS 8 - -/*define the first group interrupt register number*/ -#define HISI_PMIC_FIRST_GROUP_INT_NUM 2 - -static const struct mfd_cell hi6421v600_devs[] = { - { .name = "hi6421v600-regulator", }, -}; +#define HISI_IRQ_KEY_VALUE (BIT(POWERKEY_DOWN) | BIT(POWERKEY_UP)) +#define HISI_MASK GENMASK(HISI_BITS - 1, 0) /* - * The PMIC register is only 8-bit. - * Hisilicon SoC use hardware to map PMIC register into SoC mapping. - * At here, we are accessing SoC register with 32-bit. + * The IRQs are mapped as: + * + * ====================== ============= ============ ===== + * IRQ MASK REGISTER IRQ REGISTER BIT + * ====================== ============= ============ ===== + * OTMP 0x0202 0x212 bit 0 + * VBUS_CONNECT 0x0202 0x212 bit 1 + * VBUS_DISCONNECT 0x0202 0x212 bit 2 + * ALARMON_R 0x0202 0x212 bit 3 + * HOLD_6S 0x0202 0x212 bit 4 + * HOLD_1S 0x0202 0x212 bit 5 + * POWERKEY_UP 0x0202 0x212 bit 6 + * POWERKEY_DOWN 0x0202 0x212 bit 7 + * + * OCP_SCP_R 0x0203 0x213 bit 0 + * COUL_R 0x0203 0x213 bit 1 + * SIM0_HPD_R 0x0203 0x213 bit 2 + * SIM0_HPD_F 0x0203 0x213 bit 3 + * SIM1_HPD_R 0x0203 0x213 bit 4 + * SIM1_HPD_F 0x0203 0x213 bit 5 + * ====================== ============= ============ ===== */ -int hi6421_spmi_pmic_read(struct hi6421_spmi_pmic *pmic, int reg) -{ - struct spmi_device *pdev; - u8 read_value = 0; - u32 ret; - - pdev = to_spmi_device(pmic->dev); - if (!pdev) { - pr_err("%s: pdev get failed!\n", __func__); - return -ENODEV; - } - - ret = spmi_ext_register_readl(pdev, reg, &read_value, 1); - if (ret) { - pr_err("%s: spmi_ext_register_readl failed!\n", __func__); - return ret; - } - return read_value; -} -EXPORT_SYMBOL(hi6421_spmi_pmic_read); - -int hi6421_spmi_pmic_write(struct hi6421_spmi_pmic *pmic, int reg, u32 val) -{ - struct spmi_device *pdev; - u32 ret; - - pdev = to_spmi_device(pmic->dev); - if (!pdev) { - pr_err("%s: pdev get failed!\n", __func__); - return -ENODEV; - } - - ret = spmi_ext_register_writel(pdev, reg, (unsigned char *)&val, 1); - if (ret) - pr_err("%s: spmi_ext_register_writel failed!\n", __func__); - - return ret; -} -EXPORT_SYMBOL(hi6421_spmi_pmic_write); - -int hi6421_spmi_pmic_rmw(struct hi6421_spmi_pmic *pmic, int reg, - u32 mask, u32 bits) -{ - unsigned long flags; - u32 data; - int ret; +#define SOC_PMIC_IRQ_MASK_0_ADDR 0x0202 +#define SOC_PMIC_IRQ0_ADDR 0x0212 - spin_lock_irqsave(&pmic->lock, flags); - data = hi6421_spmi_pmic_read(pmic, reg) & ~mask; - data |= mask & bits; - ret = hi6421_spmi_pmic_write(pmic, reg, data); - spin_unlock_irqrestore(&pmic->lock, flags); +#define IRQ_MASK_REGISTER(irq_data) (SOC_PMIC_IRQ_MASK_0_ADDR + \ + (irqd_to_hwirq(irq_data) >> 3)) +#define IRQ_MASK_BIT(irq_data) BIT(irqd_to_hwirq(irq_data) & 0x07) - return ret; -} -EXPORT_SYMBOL(hi6421_spmi_pmic_rmw); +static const struct mfd_cell hi6421v600_devs[] = { + { .name = "hi6421v600-regulator", }, +}; -static irqreturn_t hi6421_spmi_irq_handler(int irq, void *data) +static irqreturn_t hi6421_spmi_irq_handler(int irq, void *priv) { - struct hi6421_spmi_pmic *pmic = (struct hi6421_spmi_pmic *)data; + struct hi6421_spmi_pmic *ddata = (struct hi6421_spmi_pmic *)priv; unsigned long pending; + unsigned int in; int i, offset; for (i = 0; i < HISI_IRQ_ARRAY; i++) { - pending = hi6421_spmi_pmic_read(pmic, (i + SOC_PMIC_IRQ0_ADDR)); - pending &= HISI_MASK_FIELD; - if (pending != 0) - pr_debug("pending[%d]=0x%lx\n\r", i, pending); - - hi6421_spmi_pmic_write(pmic, (i + SOC_PMIC_IRQ0_ADDR), pending); - - /* solve powerkey order */ - if ((i == HISI_IRQ_KEY_NUM) && - ((pending & HISI_IRQ_KEY_VALUE) == HISI_IRQ_KEY_VALUE)) { - generic_handle_irq(pmic->irqs[HISI_IRQ_KEY_DOWN]); - generic_handle_irq(pmic->irqs[HISI_IRQ_KEY_UP]); + regmap_read(ddata->regmap, SOC_PMIC_IRQ0_ADDR + i, &in); + pending = HISI_MASK & in; + regmap_write(ddata->regmap, SOC_PMIC_IRQ0_ADDR + i, pending); + + if (i == HISI_IRQ_KEY_NUM && + (pending & HISI_IRQ_KEY_VALUE) == HISI_IRQ_KEY_VALUE) { + generic_handle_irq(ddata->irqs[POWERKEY_DOWN]); + generic_handle_irq(ddata->irqs[POWERKEY_UP]); pending &= (~HISI_IRQ_KEY_VALUE); } - if (pending) { - for_each_set_bit(offset, &pending, HISI_BITS) - generic_handle_irq(pmic->irqs[offset + i * HISI_BITS]); - } + if (!pending) + continue; + + for_each_set_bit(offset, &pending, HISI_BITS) + generic_handle_irq(ddata->irqs[offset + i * HISI_BITS]); } return IRQ_HANDLED; @@ -154,34 +110,38 @@ static irqreturn_t hi6421_spmi_irq_handler(int irq, void *data) static void hi6421_spmi_irq_mask(struct irq_data *d) { - struct hi6421_spmi_pmic *pmic = irq_data_get_irq_chip_data(d); - u32 data, offset; + struct hi6421_spmi_pmic *ddata = irq_data_get_irq_chip_data(d); unsigned long flags; + unsigned int data; + u32 offset; - offset = (irqd_to_hwirq(d) >> 3); - offset += SOC_PMIC_IRQ_MASK_0_ADDR; + offset = IRQ_MASK_REGISTER(d); - spin_lock_irqsave(&pmic->lock, flags); - data = hi6421_spmi_pmic_read(pmic, offset); - data |= (1 << (irqd_to_hwirq(d) & 0x07)); - hi6421_spmi_pmic_write(pmic, offset, data); - spin_unlock_irqrestore(&pmic->lock, flags); + spin_lock_irqsave(&ddata->lock, flags); + + regmap_read(ddata->regmap, offset, &data); + data |= IRQ_MASK_BIT(d); + regmap_write(ddata->regmap, offset, data); + + spin_unlock_irqrestore(&ddata->lock, flags); } static void hi6421_spmi_irq_unmask(struct irq_data *d) { - struct hi6421_spmi_pmic *pmic = irq_data_get_irq_chip_data(d); + struct hi6421_spmi_pmic *ddata = irq_data_get_irq_chip_data(d); u32 data, offset; unsigned long flags; offset = (irqd_to_hwirq(d) >> 3); offset += SOC_PMIC_IRQ_MASK_0_ADDR; - spin_lock_irqsave(&pmic->lock, flags); - data = hi6421_spmi_pmic_read(pmic, offset); + spin_lock_irqsave(&ddata->lock, flags); + + regmap_read(ddata->regmap, offset, &data); data &= ~(1 << (irqd_to_hwirq(d) & 0x07)); - hi6421_spmi_pmic_write(pmic, offset, data); - spin_unlock_irqrestore(&pmic->lock, flags); + regmap_write(ddata->regmap, offset, data); + + spin_unlock_irqrestore(&ddata->lock, flags); } static struct irq_chip hi6421_spmi_pmu_irqchip = { @@ -195,11 +155,11 @@ static struct irq_chip hi6421_spmi_pmu_irqchip = { static int hi6421_spmi_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw) { - struct hi6421_spmi_pmic *pmic = d->host_data; + struct hi6421_spmi_pmic *ddata = d->host_data; irq_set_chip_and_handler_name(virq, &hi6421_spmi_pmu_irqchip, handle_simple_irq, "hisi"); - irq_set_chip_data(virq, pmic); + irq_set_chip_data(virq, ddata); irq_set_irq_type(virq, IRQ_TYPE_NONE); return 0; @@ -210,118 +170,111 @@ static const struct irq_domain_ops hi6421_spmi_domain_ops = { .xlate = irq_domain_xlate_twocell, }; -static void hi6421_spmi_pmic_irq_prc(struct hi6421_spmi_pmic *pmic) +static void hi6421_spmi_pmic_irq_init(struct hi6421_spmi_pmic *ddata) { - int i, pending; + int i; + unsigned int pending; - for (i = 0 ; i < HISI_IRQ_ARRAY; i++) - hi6421_spmi_pmic_write(pmic, SOC_PMIC_IRQ_MASK_0_ADDR + i, - HISI_MASK_STATE); + for (i = 0; i < HISI_IRQ_ARRAY; i++) + regmap_write(ddata->regmap, SOC_PMIC_IRQ_MASK_0_ADDR + i, + HISI_MASK); - for (i = 0 ; i < HISI_IRQ_ARRAY; i++) { - pending = hi6421_spmi_pmic_read(pmic, SOC_PMIC_IRQ0_ADDR + i); - - pr_debug("PMU IRQ address value:irq[0x%x] = 0x%x\n", - SOC_PMIC_IRQ0_ADDR + i, pending); - hi6421_spmi_pmic_write(pmic, SOC_PMIC_IRQ0_ADDR + i, - HISI_MASK_STATE); + for (i = 0; i < HISI_IRQ_ARRAY; i++) { + regmap_read(ddata->regmap, SOC_PMIC_IRQ0_ADDR + i, &pending); + regmap_write(ddata->regmap, SOC_PMIC_IRQ0_ADDR + i, + HISI_MASK); } } +static const struct regmap_config regmap_config = { + .reg_bits = 16, + .val_bits = HISI_BITS, + .max_register = 0xffff, + .fast_io = true +}; + static int hi6421_spmi_pmic_probe(struct spmi_device *pdev) { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; - struct hi6421_spmi_pmic *pmic; + struct hi6421_spmi_pmic *ddata; unsigned int virq; int ret, i; - pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); - if (!pmic) + ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL); + if (!ddata) return -ENOMEM; - spin_lock_init(&pmic->lock); + ddata->regmap = devm_regmap_init_spmi_ext(pdev, ®map_config); + if (IS_ERR(ddata->regmap)) + return PTR_ERR(ddata->regmap); - pmic->dev = dev; + spin_lock_init(&ddata->lock); - pmic->gpio = of_get_gpio(np, 0); - if (pmic->gpio < 0) - return pmic->gpio; + ddata->dev = dev; - if (!gpio_is_valid(pmic->gpio)) + ddata->gpio = of_get_gpio(np, 0); + if (ddata->gpio < 0) + return ddata->gpio; + + if (!gpio_is_valid(ddata->gpio)) return -EINVAL; - ret = devm_gpio_request_one(dev, pmic->gpio, GPIOF_IN, "pmic"); + ret = devm_gpio_request_one(dev, ddata->gpio, GPIOF_IN, "pmic"); if (ret < 0) { - dev_err(dev, "failed to request gpio%d\n", pmic->gpio); + dev_err(dev, "Failed to request gpio%d\n", ddata->gpio); return ret; } - pmic->irq = gpio_to_irq(pmic->gpio); + ddata->irq = gpio_to_irq(ddata->gpio); - hi6421_spmi_pmic_irq_prc(pmic); + hi6421_spmi_pmic_irq_init(ddata); - pmic->irqs = devm_kzalloc(dev, HISI_IRQ_NUM * sizeof(int), GFP_KERNEL); - if (!pmic->irqs) { - ret = -ENOMEM; - goto irq_malloc; - } + ddata->irqs = devm_kzalloc(dev, HISI_IRQ_NUM * sizeof(int), GFP_KERNEL); + if (!ddata->irqs) + return -ENOMEM; - pmic->domain = irq_domain_add_simple(np, HISI_IRQ_NUM, 0, - &hi6421_spmi_domain_ops, pmic); - if (!pmic->domain) { - dev_err(dev, "failed irq domain add simple!\n"); - ret = -ENODEV; - goto irq_malloc; + ddata->domain = irq_domain_add_simple(np, HISI_IRQ_NUM, 0, + &hi6421_spmi_domain_ops, ddata); + if (!ddata->domain) { + dev_err(dev, "Failed to create IRQ domain\n"); + return -ENODEV; } for (i = 0; i < HISI_IRQ_NUM; i++) { - virq = irq_create_mapping(pmic->domain, i); + virq = irq_create_mapping(ddata->domain, i); if (!virq) { - dev_err(dev, "Failed mapping hwirq\n"); - ret = -ENOSPC; - goto irq_malloc; + dev_err(dev, "Failed to map H/W IRQ\n"); + return -ENOSPC; } - pmic->irqs[i] = virq; - dev_dbg(dev, "%s: pmic->irqs[%d] = %d\n", - __func__, i, pmic->irqs[i]); + ddata->irqs[i] = virq; } - ret = request_threaded_irq(pmic->irq, hi6421_spmi_irq_handler, NULL, + ret = request_threaded_irq(ddata->irq, hi6421_spmi_irq_handler, NULL, IRQF_TRIGGER_LOW | IRQF_SHARED | IRQF_NO_SUSPEND, - "pmic", pmic); + "pmic", ddata); if (ret < 0) { - dev_err(dev, "could not claim pmic IRQ: error %d\n", ret); - goto irq_malloc; + dev_err(dev, "Failed to start IRQ handling thread: error %d\n", + ret); + return ret; } - dev_set_drvdata(&pdev->dev, pmic); + dev_set_drvdata(&pdev->dev, ddata); - /* - * The logic below will rely that the pmic is already stored at - * drvdata. - */ - dev_dbg(&pdev->dev, "SPMI-PMIC: adding children for %pOF\n", - pdev->dev.of_node); ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, hi6421v600_devs, ARRAY_SIZE(hi6421v600_devs), NULL, 0, NULL); - if (!ret) - return 0; - - dev_err(dev, "Failed to add child devices: %d\n", ret); - -irq_malloc: - free_irq(pmic->irq, pmic); + if (ret < 0) + dev_err(dev, "Failed to add child devices: %d\n", ret); return ret; } static void hi6421_spmi_pmic_remove(struct spmi_device *pdev) { - struct hi6421_spmi_pmic *pmic = dev_get_drvdata(&pdev->dev); + struct hi6421_spmi_pmic *ddata = dev_get_drvdata(&pdev->dev); - free_irq(pmic->irq, pmic); + free_irq(ddata->irq, ddata); } static const struct of_device_id pmic_spmi_id_table[] = { diff --git a/drivers/staging/hikey9xx/hi6421v600-regulator.c b/drivers/staging/hikey9xx/hi6421v600-regulator.c index 614b03c9ddfb..f6a14e9c3cbf 100644 --- a/drivers/staging/hikey9xx/hi6421v600-regulator.c +++ b/drivers/staging/hikey9xx/hi6421v600-regulator.c @@ -1,183 +1,148 @@ // SPDX-License-Identifier: GPL-2.0 -/* - * Device driver for regulators in Hisi IC - * - * Copyright (c) 2013 Linaro Ltd. - * Copyright (c) 2011 Hisilicon. - * - * Guodong Xu <guodong.xu@linaro.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +// +// Device driver for regulators in Hisi IC +// +// Copyright (c) 2013 Linaro Ltd. +// Copyright (c) 2011 Hisilicon. +// Copyright (c) 2020-2021 Huawei Technologies Co., Ltd +// +// Guodong Xu <guodong.xu@linaro.org> #include <linux/delay.h> -#include <linux/device.h> -#include <linux/err.h> -#include <linux/io.h> #include <linux/mfd/hi6421-spmi-pmic.h> #include <linux/module.h> -#include <linux/of_address.h> -#include <linux/of_device.h> -#include <linux/of.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/regulator/driver.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/of_regulator.h> -#include <linux/seq_file.h> -#include <linux/slab.h> #include <linux/spmi.h> -#include <linux/time.h> -#include <linux/uaccess.h> - -#define rdev_dbg(rdev, fmt, arg...) \ - pr_debug("%s: %s: " fmt, (rdev)->desc->name, __func__, ##arg) -struct hi6421v600_regulator { - struct regulator_desc rdesc; +struct hi6421_spmi_reg_info { + struct regulator_desc desc; struct hi6421_spmi_pmic *pmic; - u32 eco_mode_mask, eco_uA; + u8 eco_mode_mask; + u32 eco_uA; + + /* Serialize regulator enable logic */ + struct mutex enable_mutex; }; -static DEFINE_MUTEX(enable_mutex); +static const unsigned int ldo3_voltages[] = { + 1500000, 1550000, 1600000, 1650000, + 1700000, 1725000, 1750000, 1775000, + 1800000, 1825000, 1850000, 1875000, + 1900000, 1925000, 1950000, 2000000 +}; -/* - * helper function to ensure when it returns it is at least 'delay_us' - * microseconds after 'since'. - */ +static const unsigned int ldo4_voltages[] = { + 1725000, 1750000, 1775000, 1800000, + 1825000, 1850000, 1875000, 1900000 +}; -static int hi6421_spmi_regulator_is_enabled(struct regulator_dev *rdev) -{ - struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev); - struct hi6421_spmi_pmic *pmic = sreg->pmic; - u32 reg_val; +static const unsigned int ldo9_voltages[] = { + 1750000, 1800000, 1825000, 2800000, + 2850000, 2950000, 3000000, 3300000 +}; - reg_val = hi6421_spmi_pmic_read(pmic, rdev->desc->enable_reg); +static const unsigned int ldo15_voltages[] = { + 1800000, 1850000, 2400000, 2600000, + 2700000, 2850000, 2950000, 3000000 +}; - rdev_dbg(rdev, - "enable_reg=0x%x, val= 0x%x, enable_state=%d\n", - rdev->desc->enable_reg, - reg_val, (reg_val & rdev->desc->enable_mask)); +static const unsigned int ldo17_voltages[] = { + 2500000, 2600000, 2700000, 2800000, + 3000000, 3100000, 3200000, 3300000 +}; - return ((reg_val & rdev->desc->enable_mask) != 0); -} +static const unsigned int ldo34_voltages[] = { + 2600000, 2700000, 2800000, 2900000, + 3000000, 3100000, 3200000, 3300000 +}; + +/** + * HI6421V600_LDO() - specify a LDO power line + * @_id: LDO id name string + * @vtable: voltage table + * @ereg: enable register + * @emask: enable mask + * @vreg: voltage select register + * @odelay: off/on delay time in uS + * @etime: enable time in uS + * @ecomask: eco mode mask + * @ecoamp: eco mode load uppler limit in uA + */ +#define HI6421V600_LDO(_id, vtable, ereg, emask, vreg, \ + odelay, etime, ecomask, ecoamp) \ + [HI6421V600_##_id] = { \ + .desc = { \ + .name = #_id, \ + .of_match = of_match_ptr(#_id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &hi6421_spmi_ldo_rops, \ + .type = REGULATOR_VOLTAGE, \ + .id = HI6421V600_##_id, \ + .owner = THIS_MODULE, \ + .volt_table = vtable, \ + .n_voltages = ARRAY_SIZE(vtable), \ + .vsel_mask = (1 << (ARRAY_SIZE(vtable) - 1)) - 1, \ + .vsel_reg = vreg, \ + .enable_reg = ereg, \ + .enable_mask = emask, \ + .enable_time = etime, \ + .ramp_delay = etime, \ + .off_on_delay = odelay, \ + }, \ + .eco_mode_mask = ecomask, \ + .eco_uA = ecoamp, \ + } static int hi6421_spmi_regulator_enable(struct regulator_dev *rdev) { - struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev); + struct hi6421_spmi_reg_info *sreg = rdev_get_drvdata(rdev); struct hi6421_spmi_pmic *pmic = sreg->pmic; + int ret; /* cannot enable more than one regulator at one time */ - mutex_lock(&enable_mutex); - usleep_range(HISI_REGS_ENA_PROTECT_TIME, - HISI_REGS_ENA_PROTECT_TIME + 1000); + mutex_lock(&sreg->enable_mutex); - /* set enable register */ - rdev_dbg(rdev, - "off_on_delay=%d us, enable_reg=0x%x, enable_mask=0x%x\n", - rdev->desc->off_on_delay, rdev->desc->enable_reg, - rdev->desc->enable_mask); + ret = regmap_update_bits(pmic->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, + rdev->desc->enable_mask); - hi6421_spmi_pmic_rmw(pmic, rdev->desc->enable_reg, - rdev->desc->enable_mask, - rdev->desc->enable_mask); + /* Avoid powering up multiple devices at the same time */ + usleep_range(rdev->desc->off_on_delay, rdev->desc->off_on_delay + 60); - mutex_unlock(&enable_mutex); + mutex_unlock(&sreg->enable_mutex); - return 0; + return ret; } static int hi6421_spmi_regulator_disable(struct regulator_dev *rdev) { - struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev); - struct hi6421_spmi_pmic *pmic = sreg->pmic; - - /* set enable register to 0 */ - rdev_dbg(rdev, "enable_reg=0x%x, enable_mask=0x%x\n", - rdev->desc->enable_reg, rdev->desc->enable_mask); - - hi6421_spmi_pmic_rmw(pmic, rdev->desc->enable_reg, - rdev->desc->enable_mask, 0); - - return 0; -} - -static int hi6421_spmi_regulator_get_voltage_sel(struct regulator_dev *rdev) -{ - struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev); + struct hi6421_spmi_reg_info *sreg = rdev_get_drvdata(rdev); struct hi6421_spmi_pmic *pmic = sreg->pmic; - u32 reg_val, selector; - - /* get voltage selector */ - reg_val = hi6421_spmi_pmic_read(pmic, rdev->desc->vsel_reg); - - selector = (reg_val & rdev->desc->vsel_mask) >> (ffs(rdev->desc->vsel_mask) - 1); - rdev_dbg(rdev, - "vsel_reg=0x%x, value=0x%x, entry=0x%x, voltage=%d mV\n", - rdev->desc->vsel_reg, reg_val, selector, - rdev->desc->ops->list_voltage(rdev, selector) / 1000); - - return selector; -} - -static int hi6421_spmi_regulator_set_voltage_sel(struct regulator_dev *rdev, - unsigned int selector) -{ - struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev); - struct hi6421_spmi_pmic *pmic = sreg->pmic; - u32 reg_val; - - if (unlikely(selector >= rdev->desc->n_voltages)) - return -EINVAL; - - reg_val = selector << (ffs(rdev->desc->vsel_mask) - 1); - - /* set voltage selector */ - rdev_dbg(rdev, - "vsel_reg=0x%x, mask=0x%x, value=0x%x, voltage=%d mV\n", - rdev->desc->vsel_reg, rdev->desc->vsel_mask, reg_val, - rdev->desc->ops->list_voltage(rdev, selector) / 1000); - - hi6421_spmi_pmic_rmw(pmic, rdev->desc->vsel_reg, - rdev->desc->vsel_mask, reg_val); - - return 0; + return regmap_update_bits(pmic->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, 0); } static unsigned int hi6421_spmi_regulator_get_mode(struct regulator_dev *rdev) { - struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev); + struct hi6421_spmi_reg_info *sreg = rdev_get_drvdata(rdev); struct hi6421_spmi_pmic *pmic = sreg->pmic; - unsigned int mode; u32 reg_val; - reg_val = hi6421_spmi_pmic_read(pmic, rdev->desc->enable_reg); + regmap_read(pmic->regmap, rdev->desc->enable_reg, ®_val); if (reg_val & sreg->eco_mode_mask) - mode = REGULATOR_MODE_IDLE; - else - mode = REGULATOR_MODE_NORMAL; - - rdev_dbg(rdev, - "enable_reg=0x%x, eco_mode_mask=0x%x, reg_val=0x%x, %s mode\n", - rdev->desc->enable_reg, sreg->eco_mode_mask, reg_val, - mode == REGULATOR_MODE_IDLE ? "idle" : "normal"); + return REGULATOR_MODE_IDLE; - return mode; + return REGULATOR_MODE_NORMAL; } static int hi6421_spmi_regulator_set_mode(struct regulator_dev *rdev, unsigned int mode) { - struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev); + struct hi6421_spmi_reg_info *sreg = rdev_get_drvdata(rdev); struct hi6421_spmi_pmic *pmic = sreg->pmic; u32 val; @@ -192,14 +157,8 @@ static int hi6421_spmi_regulator_set_mode(struct regulator_dev *rdev, return -EINVAL; } - /* set mode */ - rdev_dbg(rdev, "enable_reg=0x%x, eco_mode_mask=0x%x, value=0x%x\n", - rdev->desc->enable_reg, sreg->eco_mode_mask, val); - - hi6421_spmi_pmic_rmw(pmic, rdev->desc->enable_reg, - sreg->eco_mode_mask, val); - - return 0; + return regmap_update_bits(pmic->regmap, rdev->desc->enable_reg, + sreg->eco_mode_mask, val); } static unsigned int @@ -207,199 +166,84 @@ hi6421_spmi_regulator_get_optimum_mode(struct regulator_dev *rdev, int input_uV, int output_uV, int load_uA) { - struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev); + struct hi6421_spmi_reg_info *sreg = rdev_get_drvdata(rdev); - if (load_uA || ((unsigned int)load_uA > sreg->eco_uA)) + if (!sreg->eco_uA || ((unsigned int)load_uA > sreg->eco_uA)) return REGULATOR_MODE_NORMAL; return REGULATOR_MODE_IDLE; } -static int hi6421_spmi_dt_parse(struct platform_device *pdev, - struct hi6421v600_regulator *sreg, - struct regulator_desc *rdesc) -{ - struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node; - unsigned int *v_table; - int ret; - - ret = of_property_read_u32(np, "reg", &rdesc->enable_reg); - if (ret) { - dev_err(dev, "missing reg property\n"); - return ret; - } - - ret = of_property_read_u32(np, "vsel-reg", &rdesc->vsel_reg); - if (ret) { - dev_err(dev, "missing vsel-reg property\n"); - return ret; - } - - ret = of_property_read_u32(np, "enable-mask", &rdesc->enable_mask); - if (ret) { - dev_err(dev, "missing enable-mask property\n"); - return ret; - } - - /* - * Not all regulators work on idle mode - */ - ret = of_property_read_u32(np, "idle-mode-mask", &sreg->eco_mode_mask); - if (ret) { - dev_dbg(dev, "LDO doesn't support economy mode.\n"); - sreg->eco_mode_mask = 0; - sreg->eco_uA = 0; - } else { - ret = of_property_read_u32(np, "eco-microamp", &sreg->eco_uA); - if (ret) { - dev_err(dev, "missing eco-microamp property\n"); - return ret; - } - } - - /* parse .off-on-delay */ - ret = of_property_read_u32(np, "off-on-delay-us", - &rdesc->off_on_delay); - if (ret) { - dev_err(dev, "missing off-on-delay-us property\n"); - return ret; - } - - /* parse .enable_time */ - ret = of_property_read_u32(np, "startup-delay-us", - &rdesc->enable_time); - if (ret) { - dev_err(dev, "missing startup-delay-us property\n"); - return ret; - } - - /* FIXME: are there a better value for this? */ - rdesc->ramp_delay = rdesc->enable_time; - - /* parse volt_table */ - - rdesc->n_voltages = of_property_count_u32_elems(np, "voltage-table"); - - v_table = devm_kzalloc(dev, sizeof(unsigned int) * rdesc->n_voltages, - GFP_KERNEL); - if (unlikely(!v_table)) - return -ENOMEM; - rdesc->volt_table = v_table; - - ret = of_property_read_u32_array(np, "voltage-table", - v_table, rdesc->n_voltages); - if (ret) { - dev_err(dev, "missing voltage-table property\n"); - return ret; - } - - /* - * Instead of explicitly requiring a mask for the voltage selector, - * as they all start from bit zero (at least on the known LDOs), - * just use the number of voltages at the voltage table, getting the - * minimal mask that would pick everything. - */ - rdesc->vsel_mask = (1 << (fls(rdesc->n_voltages) - 1)) - 1; - - dev_dbg(dev, "voltage selector settings: reg: 0x%x, mask: 0x%x\n", - rdesc->vsel_reg, rdesc->vsel_mask); - - return 0; -} - static const struct regulator_ops hi6421_spmi_ldo_rops = { - .is_enabled = hi6421_spmi_regulator_is_enabled, + .is_enabled = regulator_is_enabled_regmap, .enable = hi6421_spmi_regulator_enable, .disable = hi6421_spmi_regulator_disable, .list_voltage = regulator_list_voltage_table, .map_voltage = regulator_map_voltage_iterate, - .get_voltage_sel = hi6421_spmi_regulator_get_voltage_sel, - .set_voltage_sel = hi6421_spmi_regulator_set_voltage_sel, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, .get_mode = hi6421_spmi_regulator_get_mode, .set_mode = hi6421_spmi_regulator_set_mode, .get_optimum_mode = hi6421_spmi_regulator_get_optimum_mode, }; -static int hi6421_spmi_regulator_probe_ldo(struct platform_device *pdev, - struct device_node *np, - struct hi6421_spmi_pmic *pmic) -{ - struct regulation_constraints *constraint; - struct regulator_init_data *initdata; - struct regulator_config config = { }; - struct hi6421v600_regulator *sreg; - struct device *dev = &pdev->dev; - struct regulator_desc *rdesc; - struct regulator_dev *rdev; - const char *supplyname; - int ret; - - initdata = of_get_regulator_init_data(dev, np, NULL); - if (!initdata) { - dev_err(dev, "failed to get regulator data\n"); - return -EINVAL; - } - - sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL); - if (!sreg) - return -ENOMEM; - - sreg->pmic = pmic; - rdesc = &sreg->rdesc; - - rdesc->name = initdata->constraints.name; - rdesc->ops = &hi6421_spmi_ldo_rops; - rdesc->type = REGULATOR_VOLTAGE; - rdesc->min_uV = initdata->constraints.min_uV; - - supplyname = of_get_property(np, "supply_name", NULL); - if (supplyname) - initdata->supply_regulator = supplyname; - - /* parse device tree data for regulator specific */ - ret = hi6421_spmi_dt_parse(pdev, sreg, rdesc); - if (ret) - return ret; - - /* hisi regulator supports two modes */ - constraint = &initdata->constraints; - - constraint->valid_modes_mask = REGULATOR_MODE_NORMAL; - if (sreg->eco_mode_mask) { - constraint->valid_modes_mask |= REGULATOR_MODE_IDLE; - constraint->valid_ops_mask |= REGULATOR_CHANGE_MODE; - } - - config.dev = &pdev->dev; - config.init_data = initdata; - config.driver_data = sreg; - config.of_node = pdev->dev.of_node; - - /* register regulator */ - rdev = regulator_register(rdesc, &config); - if (IS_ERR(rdev)) { - dev_err(dev, "failed to register %s\n", - rdesc->name); - return PTR_ERR(rdev); - } - - rdev_dbg(rdev, "valid_modes_mask: 0x%x, valid_ops_mask: 0x%x\n", - constraint->valid_modes_mask, constraint->valid_ops_mask); - - dev_set_drvdata(dev, rdev); +/* HI6421v600 regulators with known registers */ +enum hi6421_spmi_regulator_id { + HI6421V600_LDO3, + HI6421V600_LDO4, + HI6421V600_LDO9, + HI6421V600_LDO15, + HI6421V600_LDO16, + HI6421V600_LDO17, + HI6421V600_LDO33, + HI6421V600_LDO34, +}; - return 0; -} +static struct hi6421_spmi_reg_info regulator_info[] = { + HI6421V600_LDO(LDO3, ldo3_voltages, + 0x16, 0x01, 0x51, + 20000, 120, + 0, 0), + HI6421V600_LDO(LDO4, ldo4_voltages, + 0x17, 0x01, 0x52, + 20000, 120, + 0x10, 10000), + HI6421V600_LDO(LDO9, ldo9_voltages, + 0x1c, 0x01, 0x57, + 20000, 360, + 0x10, 10000), + HI6421V600_LDO(LDO15, ldo15_voltages, + 0x21, 0x01, 0x5c, + 20000, 360, + 0x10, 10000), + HI6421V600_LDO(LDO16, ldo15_voltages, + 0x22, 0x01, 0x5d, + 20000, 360, + 0x10, 10000), + HI6421V600_LDO(LDO17, ldo17_voltages, + 0x23, 0x01, 0x5e, + 20000, 120, + 0x10, 10000), + HI6421V600_LDO(LDO33, ldo17_voltages, + 0x32, 0x01, 0x6d, + 20000, 120, + 0, 0), + HI6421V600_LDO(LDO34, ldo34_voltages, + 0x33, 0x01, 0x6e, + 20000, 120, + 0, 0), +}; static int hi6421_spmi_regulator_probe(struct platform_device *pdev) { struct device *pmic_dev = pdev->dev.parent; - struct device_node *np = pmic_dev->of_node; - struct device_node *regulators, *child; - struct platform_device *new_pdev; + struct regulator_config config = { }; + struct hi6421_spmi_reg_info *sreg; + struct hi6421_spmi_reg_info *info; + struct device *dev = &pdev->dev; struct hi6421_spmi_pmic *pmic; - int ret; + struct regulator_dev *rdev; + int i; /* * This driver is meant to be called by hi6421-spmi-core, @@ -410,69 +254,46 @@ static int hi6421_spmi_regulator_probe(struct platform_device *pdev) if (WARN_ON(!pmic)) return -ENODEV; - regulators = of_get_child_by_name(np, "regulators"); - if (!regulators) { - dev_err(&pdev->dev, "regulator node not found\n"); - return -ENODEV; - } + sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL); + if (!sreg) + return -ENOMEM; - /* - * Parse all LDO regulator nodes - */ - for_each_child_of_node(regulators, child) { - dev_dbg(&pdev->dev, "adding child %pOF\n", child); + sreg->pmic = pmic; + mutex_init(&sreg->enable_mutex); - new_pdev = platform_device_alloc(child->name, -1); - new_pdev->dev.parent = pmic_dev; - new_pdev->dev.of_node = of_node_get(child); + for (i = 0; i < ARRAY_SIZE(regulator_info); i++) { + info = ®ulator_info[i]; - ret = platform_device_add(new_pdev); - if (ret < 0) { - platform_device_put(new_pdev); - continue; - } + config.dev = pdev->dev.parent; + config.driver_data = sreg; + config.regmap = pmic->regmap; - ret = hi6421_spmi_regulator_probe_ldo(new_pdev, child, pmic); - if (ret < 0) - platform_device_put(new_pdev); + rdev = devm_regulator_register(dev, &info->desc, &config); + if (IS_ERR(rdev)) { + dev_err(dev, "failed to register %s\n", + info->desc.name); + return PTR_ERR(rdev); + } } - of_node_put(regulators); - - return 0; -} - -static int hi6421_spmi_regulator_remove(struct platform_device *pdev) -{ - struct regulator_dev *rdev = dev_get_drvdata(&pdev->dev); - struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev); - - regulator_unregister(rdev); - - if (rdev->desc->volt_table) - devm_kfree(&pdev->dev, (unsigned int *)rdev->desc->volt_table); - - kfree(sreg); - return 0; } -static const struct platform_device_id hi6421v600_regulator_table[] = { +static const struct platform_device_id hi6421_spmi_regulator_table[] = { { .name = "hi6421v600-regulator" }, {}, }; -MODULE_DEVICE_TABLE(platform, hi6421v600_regulator_table); +MODULE_DEVICE_TABLE(platform, hi6421_spmi_regulator_table); -static struct platform_driver hi6421v600_regulator_driver = { - .id_table = hi6421v600_regulator_table, +static struct platform_driver hi6421_spmi_regulator_driver = { + .id_table = hi6421_spmi_regulator_table, .driver = { - .name = "hi6421v600-regulator", + .name = "hi6421v600-regulator", }, .probe = hi6421_spmi_regulator_probe, - .remove = hi6421_spmi_regulator_remove, }; -module_platform_driver(hi6421v600_regulator_driver); +module_platform_driver(hi6421_spmi_regulator_driver); -MODULE_DESCRIPTION("Hi6421v600 regulator driver"); +MODULE_DESCRIPTION("Hi6421v600 SPMI regulator driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml b/drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml index 80e74c261e05..3b23ad56b31a 100644 --- a/drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml +++ b/drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml @@ -55,52 +55,13 @@ properties: $ref: "/schemas/regulator/regulator.yaml#" - properties: - reg: - description: Enable register. - - '#address-cells': - const: 1 - - '#size-cells': - const: 0 - - vsel-reg: - description: Voltage selector register. - - enable-mask: - description: Bitmask used to enable the regulator. - - voltage-table: - description: Table with the selector items for the voltage regulator. - minItems: 2 - maxItems: 16 - - off-on-delay-us: - description: Time required for changing state to enabled in microseconds. - - startup-delay-us: - description: Startup time in microseconds. - - idle-mode-mask: - description: Bitmask used to put the regulator on idle mode. - - eco-microamp: - description: Maximum current while on idle mode. - - required: - - reg - - vsel-reg - - enable-mask - - voltage-table - - off-on-delay-us - - startup-delay-us - required: - compatible - reg - regulators +additionalProperties: false + examples: - | /* pmic properties */ @@ -117,43 +78,58 @@ examples: #address-cells = <1>; #size-cells = <0>; - ldo3: ldo3@16 { - reg = <0x16>; - vsel-reg = <0x51>; - + ldo3: LDO3 { regulator-name = "ldo3"; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <2000000>; regulator-boot-on; - - enable-mask = <0x01>; - - voltage-table = <1500000>, <1550000>, <1600000>, <1650000>, - <1700000>, <1725000>, <1750000>, <1775000>, - <1800000>, <1825000>, <1850000>, <1875000>, - <1900000>, <1925000>, <1950000>, <2000000>; - off-on-delay-us = <20000>; - startup-delay-us = <120>; }; - ldo4: ldo4@17 { /* 40 PIN */ - reg = <0x17>; - vsel-reg = <0x52>; - + ldo4: LDO4 { regulator-name = "ldo4"; regulator-min-microvolt = <1725000>; regulator-max-microvolt = <1900000>; regulator-boot-on; + }; + + ldo9: LDO9 { + regulator-name = "ldo9"; + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + + ldo15: LDO15 { + regulator-name = "ldo15"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + ldo16: LDO16 { + regulator-name = "ldo16"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + }; - enable-mask = <0x01>; - idle-mode-mask = <0x10>; - eco-microamp = <10000>; + ldo17: LDO17 { + regulator-name = "ldo17"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3300000>; + }; + + ldo33: LDO33 { + regulator-name = "ldo33"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; - hi6421-vsel = <0x52 0x07>; - voltage-table = <1725000>, <1750000>, <1775000>, <1800000>, - <1825000>, <1850000>, <1875000>, <1900000>; - off-on-delay-us = <20000>; - startup-delay-us = <120>; + ldo34: LDO34 { + regulator-name = "ldo34"; + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <3300000>; }; }; }; diff --git a/drivers/staging/hikey9xx/hisilicon,hisi-spmi-controller.yaml b/drivers/staging/hikey9xx/hisilicon,hisi-spmi-controller.yaml index f2a56fa4e78e..21f68a9c2df1 100644 --- a/drivers/staging/hikey9xx/hisilicon,hisi-spmi-controller.yaml +++ b/drivers/staging/hikey9xx/hisilicon,hisi-spmi-controller.yaml @@ -26,14 +26,22 @@ properties: reg: maxItems: 1 + "#address-cells": + const: 2 + + "#size-cells": + const: 0 + spmi-channel: description: | number of the Kirin 970 SPMI channel where the SPMI devices are connected. required: - - compatible - - reg - - spmi-channel + - compatible + - reg + - spmi-channel + - "#address-cells" + - "#size-cells" patternProperties: "^pmic@[0-9a-f]$": @@ -43,6 +51,8 @@ patternProperties: are documented at drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml. +additionalProperties: false + examples: - | bus { @@ -51,11 +61,14 @@ examples: spmi: spmi@fff24000 { compatible = "hisilicon,kirin970-spmi-controller"; + #address-cells = <2>; + #size-cells = <0>; status = "ok"; reg = <0x0 0xfff24000 0x0 0x1000>; spmi-channel = <2>; pmic@0 { + reg = <0 0>; /* pmic properties */ }; }; diff --git a/drivers/staging/hikey9xx/phy-hi3670-usb3.c b/drivers/staging/hikey9xx/phy-hi3670-usb3.c index 4fc013911a78..e7e579ce0302 100644 --- a/drivers/staging/hikey9xx/phy-hi3670-usb3.c +++ b/drivers/staging/hikey9xx/phy-hi3670-usb3.c @@ -8,6 +8,7 @@ * Authors: Yu Chen <chenyu56@huawei.com> */ +#include <linux/bitfield.h> #include <linux/clk.h> #include <linux/kernel.h> #include <linux/mfd/syscon.h> @@ -41,15 +42,15 @@ #define SC_CLK_USB3PHY_3MUX1_SEL BIT(25) #define USB3OTG_CTRL0 (0x00) -#define USB3OTG_CTRL3 (0x0C) +#define USB3OTG_CTRL3 (0x0c) #define USB3OTG_CTRL4 (0x10) #define USB3OTG_CTRL5 (0x14) -#define USB3OTG_CTRL7 (0x1C) +#define USB3OTG_CTRL7 (0x1c) #define USB_MISC_CFG50 (0x50) #define USB_MISC_CFG54 (0x54) #define USB_MISC_CFG58 (0x58) -#define USB_MISC_CFG5C (0x5C) -#define USB_MISC_CFGA0 (0xA0) +#define USB_MISC_CFG5C (0x5c) +#define USB_MISC_CFGA0 (0xa0) #define TCA_CLK_RST (0x200) #define TCA_INTR_EN (0x204) #define TCA_INTR_STS (0x208) @@ -66,14 +67,14 @@ #define CTRL5_USB2_SIDDQ BIT(0) -#define CTRL7_USB2_REFCLKSEL_MASK (3 << 3) -#define CTRL7_USB2_REFCLKSEL_ABB (3 << 3) -#define CTRL7_USB2_REFCLKSEL_PAD (2 << 3) +#define CTRL7_USB2_REFCLKSEL_MASK GENMASK(4, 3) +#define CTRL7_USB2_REFCLKSEL_ABB (BIT(4) | BIT(3)) +#define CTRL7_USB2_REFCLKSEL_PAD BIT(4) #define CFG50_USB3_PHY_TEST_POWERDOWN BIT(23) -#define CFG54_USB31PHY_CR_ADDR_MASK (0xFFFF) -#define CFG54_USB31PHY_CR_ADDR_SHIFT (16) +#define CFG54_USB31PHY_CR_ADDR_MASK GENMASK(31, 16) + #define CFG54_USB3PHY_REF_USE_PAD BIT(12) #define CFG54_PHY0_PMA_PWR_STABLE BIT(11) #define CFG54_PHY0_PCS_PWR_STABLE BIT(9) @@ -84,8 +85,7 @@ #define CFG54_USB31PHY_CR_CLK BIT(2) #define CFG54_USB3_PHY0_ANA_PWR_EN BIT(1) -#define CFG58_USB31PHY_CR_DATA_MASK (0xFFFF) -#define CFG58_USB31PHY_CR_DATA_RD_START (16) +#define CFG58_USB31PHY_CR_DATA_MASK GENMASK(31, 16) #define CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN BIT(1) @@ -102,20 +102,20 @@ #define CLK_RST_SUSPEND_CLK_EN BIT(0) #define GCFG_ROLE_HSTDEV BIT(4) -#define GCFG_OP_MODE (3 << 0) +#define GCFG_OP_MODE GENMASK(1, 0) #define GCFG_OP_MODE_CTRL_SYNC_MODE BIT(0) #define TCPC_VALID BIT(4) #define TCPC_LOW_POWER_EN BIT(3) -#define TCPC_MUX_CONTROL_MASK (3 << 0) +#define TCPC_MUX_CONTROL_MASK GENMASK(1, 0) #define TCPC_MUX_CONTROL_USB31 BIT(0) #define SYSMODE_CFG_TYPEC_DISABLE BIT(3) -#define VBUS_CTRL_POWERPRESENT_OVERRD (3 << 2) -#define VBUS_CTRL_VBUSVALID_OVERRD (3 << 0) +#define VBUS_CTRL_POWERPRESENT_OVERRD GENMASK(3, 2) +#define VBUS_CTRL_VBUSVALID_OVERRD GENMASK(1, 0) -#define KIRIN970_USB_DEFAULT_PHY_PARAM (0xFDFEE4) +#define KIRIN970_USB_DEFAULT_PHY_PARAM (0xfdfee4) #define KIRIN970_USB_DEFAULT_PHY_VBOOST (0x5) #define TX_VBOOST_LVL_REG (0xf) @@ -162,16 +162,14 @@ static int hi3670_phy_cr_set_sel(struct regmap *usb31misc) static int hi3670_phy_cr_start(struct regmap *usb31misc, int direction) { - int ret; + int ret, reg; if (direction) - ret = regmap_update_bits(usb31misc, USB_MISC_CFG54, - CFG54_USB31PHY_CR_WR_EN, - CFG54_USB31PHY_CR_WR_EN); + reg = CFG54_USB31PHY_CR_WR_EN; else - ret = regmap_update_bits(usb31misc, USB_MISC_CFG54, - CFG54_USB31PHY_CR_RD_EN, - CFG54_USB31PHY_CR_RD_EN); + reg = CFG54_USB31PHY_CR_RD_EN; + + ret = regmap_update_bits(usb31misc, USB_MISC_CFG54, reg, reg); if (ret) return ret; @@ -180,16 +178,14 @@ static int hi3670_phy_cr_start(struct regmap *usb31misc, int direction) if (ret) return ret; - ret = regmap_update_bits(usb31misc, USB_MISC_CFG54, - CFG54_USB31PHY_CR_RD_EN | CFG54_USB31PHY_CR_WR_EN, 0); - - return ret; + return regmap_update_bits(usb31misc, USB_MISC_CFG54, + CFG54_USB31PHY_CR_RD_EN | CFG54_USB31PHY_CR_WR_EN, 0); } static int hi3670_phy_cr_wait_ack(struct regmap *usb31misc) { u32 reg; - int retry = 100000; + int retry = 10; int ret; while (retry-- > 0) { @@ -202,6 +198,8 @@ static int hi3670_phy_cr_wait_ack(struct regmap *usb31misc) ret = hi3670_phy_cr_clk(usb31misc); if (ret) return ret; + + usleep_range(10, 20); } return -ETIMEDOUT; @@ -216,9 +214,9 @@ static int hi3670_phy_cr_set_addr(struct regmap *usb31misc, u32 addr) if (ret) return ret; - reg &= ~(CFG54_USB31PHY_CR_ADDR_MASK << CFG54_USB31PHY_CR_ADDR_SHIFT); - reg |= ((addr & CFG54_USB31PHY_CR_ADDR_MASK) << CFG54_USB31PHY_CR_ADDR_SHIFT); - ret = regmap_write(usb31misc, USB_MISC_CFG54, reg); + reg = FIELD_PREP(CFG54_USB31PHY_CR_ADDR_MASK, addr); + ret = regmap_update_bits(usb31misc, USB_MISC_CFG54, + CFG54_USB31PHY_CR_ADDR_MASK, reg); return ret; } @@ -255,8 +253,7 @@ static int hi3670_phy_cr_read(struct regmap *usb31misc, u32 addr, u32 *val) if (ret) return ret; - *val = (reg >> CFG58_USB31PHY_CR_DATA_RD_START) & - CFG58_USB31PHY_CR_DATA_MASK; + *val = FIELD_GET(CFG58_USB31PHY_CR_DATA_MASK, reg); return 0; } @@ -281,7 +278,7 @@ static int hi3670_phy_cr_write(struct regmap *usb31misc, u32 addr, u32 val) return ret; ret = regmap_write(usb31misc, USB_MISC_CFG58, - val & CFG58_USB31PHY_CR_DATA_MASK); + FIELD_PREP(CFG58_USB31PHY_CR_DATA_MASK, val)); if (ret) return ret; @@ -329,24 +326,24 @@ static int hi3670_phy_set_params(struct hi3670_priv *priv) return ret; } -static int hi3670_is_abbclk_seleted(struct hi3670_priv *priv) +static bool hi3670_is_abbclk_selected(struct hi3670_priv *priv) { u32 reg; if (!priv->sctrl) { dev_err(priv->dev, "priv->sctrl is null!\n"); - return 1; + return false; } if (regmap_read(priv->sctrl, SCTRL_SCDEEPSLEEPED, ®)) { dev_err(priv->dev, "SCTRL_SCDEEPSLEEPED read failed!\n"); - return 1; + return false; } if ((reg & USB_CLK_SELECTED) == 0) - return 1; + return false; - return 0; + return true; } static int hi3670_config_phy_clock(struct hi3670_priv *priv) @@ -354,7 +351,7 @@ static int hi3670_config_phy_clock(struct hi3670_priv *priv) u32 val, mask; int ret; - if (hi3670_is_abbclk_seleted(priv)) { + if (!hi3670_is_abbclk_selected(priv)) { /* usb refclk iso disable */ ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS, USB_REFCLK_ISO_EN); @@ -571,7 +568,7 @@ static int hi3670_phy_exit(struct phy *phy) if (ret) goto out; - if (hi3670_is_abbclk_seleted(priv)) { + if (!hi3670_is_abbclk_selected(priv)) { /* disable usb_tcxo_en */ ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START); @@ -588,7 +585,7 @@ out: return ret; } -static struct phy_ops hi3670_phy_ops = { +static const struct phy_ops hi3670_phy_ops = { .init = hi3670_phy_init, .exit = hi3670_phy_exit, .owner = THIS_MODULE, diff --git a/drivers/staging/hikey9xx/phy-hi3670-usb3.yaml b/drivers/staging/hikey9xx/phy-hi3670-usb3.yaml index 125a5d6546ae..ebd78acfe2de 100644 --- a/drivers/staging/hikey9xx/phy-hi3670-usb3.yaml +++ b/drivers/staging/hikey9xx/phy-hi3670-usb3.yaml @@ -8,6 +8,7 @@ title: Hisilicon Kirin970 USB PHY maintainers: - Mauro Carvalho Chehab <mchehab+huawei@kernel.org> + description: |+ Bindings for USB3 PHY on HiSilicon Kirin 970. diff --git a/drivers/staging/media/atomisp/pci/hmm/hmm.c b/drivers/staging/media/atomisp/pci/hmm/hmm.c index e0eaff0f8a22..6a5ee4607089 100644 --- a/drivers/staging/media/atomisp/pci/hmm/hmm.c +++ b/drivers/staging/media/atomisp/pci/hmm/hmm.c @@ -269,7 +269,7 @@ ia_css_ptr hmm_alloc(size_t bytes, enum hmm_bo_type type, hmm_set(bo->start, 0, bytes); dev_dbg(atomisp_dev, - "%s: pages: 0x%08x (%ld bytes), type: %d from highmem %d, user ptr %p, cached %d\n", + "%s: pages: 0x%08x (%zu bytes), type: %d from highmem %d, user ptr %p, cached %d\n", __func__, bo->start, bytes, type, from_highmem, userptr, cached); return bo->start; diff --git a/drivers/staging/most/net/net.c b/drivers/staging/most/net/net.c index b6fecb06a0e6..f125bb6da406 100644 --- a/drivers/staging/most/net/net.c +++ b/drivers/staging/most/net/net.c @@ -68,7 +68,7 @@ struct net_dev_context { }; static struct list_head net_devices = LIST_HEAD_INIT(net_devices); -static struct mutex probe_disc_mt; /* ch->linked = true, most_nd_open */ +static DEFINE_MUTEX(probe_disc_mt); /* ch->linked = true, most_nd_open */ static DEFINE_SPINLOCK(list_lock); /* list_head, ch->linked = false, dev_hold */ static struct most_component comp; @@ -520,7 +520,6 @@ static int __init most_net_init(void) { int err; - mutex_init(&probe_disc_mt); err = most_register_component(&comp); if (err) return err; diff --git a/drivers/staging/most/sound/sound.c b/drivers/staging/most/sound/sound.c index 3a1a59058042..c87f6a037874 100644 --- a/drivers/staging/most/sound/sound.c +++ b/drivers/staging/most/sound/sound.c @@ -86,6 +86,8 @@ static void swap_copy24(u8 *dest, const u8 *source, unsigned int bytes) { unsigned int i = 0; + if (bytes < 2) + return; while (i < bytes - 2) { dest[i] = source[i + 2]; dest[i + 1] = source[i + 1]; @@ -158,9 +160,9 @@ static struct channel *get_channel(struct most_interface *iface, int channel_id) { struct sound_adapter *adpt = iface->priv; - struct channel *channel, *tmp; + struct channel *channel; - list_for_each_entry_safe(channel, tmp, &adpt->dev_list, list) { + list_for_each_entry(channel, &adpt->dev_list, list) { if ((channel->iface == iface) && (channel->id == channel_id)) return channel; } @@ -525,7 +527,7 @@ static int audio_probe_channel(struct most_interface *iface, int channel_id, pr_err("Incompatible channel type\n"); return -EINVAL; } - strlcpy(arg_list_cpy, arg_list, STRING_SIZE); + strscpy(arg_list_cpy, arg_list, STRING_SIZE); ret = split_arg_list(arg_list_cpy, &ch_num, &sample_res); if (ret < 0) return ret; diff --git a/drivers/staging/most/video/video.c b/drivers/staging/most/video/video.c index 829df899b993..90933d78c332 100644 --- a/drivers/staging/most/video/video.c +++ b/drivers/staging/most/video/video.c @@ -245,8 +245,8 @@ static int vidioc_querycap(struct file *file, void *priv, struct comp_fh *fh = priv; struct most_video_dev *mdev = fh->mdev; - strlcpy(cap->driver, "v4l2_component", sizeof(cap->driver)); - strlcpy(cap->card, "MOST", sizeof(cap->card)); + strscpy(cap->driver, "v4l2_component", sizeof(cap->driver)); + strscpy(cap->card, "MOST", sizeof(cap->card)); snprintf(cap->bus_info, sizeof(cap->bus_info), "%s", mdev->iface->description); return 0; @@ -483,7 +483,7 @@ static int comp_probe_channel(struct most_interface *iface, int channel_idx, mdev->v4l2_dev.release = comp_v4l2_dev_release; /* Create the v4l2_device */ - strlcpy(mdev->v4l2_dev.name, name, sizeof(mdev->v4l2_dev.name)); + strscpy(mdev->v4l2_dev.name, name, sizeof(mdev->v4l2_dev.name)); ret = v4l2_device_register(NULL, &mdev->v4l2_dev); if (ret) { pr_err("v4l2_device_register() failed\n"); diff --git a/drivers/staging/mt7621-dma/Makefile b/drivers/staging/mt7621-dma/Makefile index 66da1bf10c32..23256d1286f3 100644 --- a/drivers/staging/mt7621-dma/Makefile +++ b/drivers/staging/mt7621-dma/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_MTK_HSDMA) += mtk-hsdma.o +obj-$(CONFIG_MTK_HSDMA) += hsdma-mt7621.o ccflags-y += -I$(srctree)/drivers/dma diff --git a/drivers/staging/mt7621-dma/mtk-hsdma.c b/drivers/staging/mt7621-dma/hsdma-mt7621.c index bc4bb4374313..b0ed935de7ac 100644 --- a/drivers/staging/mt7621-dma/mtk-hsdma.c +++ b/drivers/staging/mt7621-dma/hsdma-mt7621.c @@ -749,7 +749,7 @@ static struct platform_driver mtk_hsdma_driver = { .probe = mtk_hsdma_probe, .remove = mtk_hsdma_remove, .driver = { - .name = "hsdma-mt7621", + .name = KBUILD_MODNAME, .of_match_table = mtk_hsdma_of_match, }, }; diff --git a/drivers/staging/mt7621-dts/mt7621.dtsi b/drivers/staging/mt7621-dts/mt7621.dtsi index 5b9d3bf82cb1..16fc94f65486 100644 --- a/drivers/staging/mt7621-dts/mt7621.dtsi +++ b/drivers/staging/mt7621-dts/mt7621.dtsi @@ -222,89 +222,84 @@ pinctrl: pinctrl { compatible = "ralink,rt2880-pinmux"; - pinctrl-names = "default"; - pinctrl-0 = <&state_default>; - - state_default: pinctrl0 { - }; - i2c_pins: i2c0 { - i2c0 { + i2c_pins: i2c0-pins { + pinmux { groups = "i2c"; function = "i2c"; }; }; - spi_pins: spi0 { - spi0 { + spi_pins: spi0-pins { + pinmux { groups = "spi"; function = "spi"; }; }; - uart1_pins: uart1 { - uart1 { + uart1_pins: uart1-pins { + pinmux { groups = "uart1"; function = "uart1"; }; }; - uart2_pins: uart2 { - uart2 { + uart2_pins: uart2-pins { + pinmux { groups = "uart2"; function = "uart2"; }; }; - uart3_pins: uart3 { - uart3 { + uart3_pins: uart3-pins { + pinmux { groups = "uart3"; function = "uart3"; }; }; - rgmii1_pins: rgmii1 { - rgmii1 { + rgmii1_pins: rgmii1-pins { + pinmux { groups = "rgmii1"; function = "rgmii1"; }; }; - rgmii2_pins: rgmii2 { - rgmii2 { + rgmii2_pins: rgmii2-pins { + pinmux { groups = "rgmii2"; function = "rgmii2"; }; }; - mdio_pins: mdio0 { - mdio0 { + mdio_pins: mdio0-pins { + pinmux { groups = "mdio"; function = "mdio"; }; }; - pcie_pins: pcie0 { - pcie0 { + pcie_pins: pcie0-pins { + pinmux { groups = "pcie"; function = "gpio"; }; }; - nand_pins: nand0 { - spi-nand { + nand_pins: nand0-pins { + spi-pinmux { groups = "spi"; function = "nand1"; }; - sdhci-nand { + sdhci-pinmux { groups = "sdhci"; function = "nand2"; }; }; - sdhci_pins: sdhci0 { - sdhci0 { + sdhci_pins: sdhci0-pins { + pinmux { groups = "sdhci"; function = "sdhci"; }; @@ -497,13 +492,6 @@ }; }; - gsw: gsw@1e110000 { - compatible = "mediatek,mt7621-gsw"; - reg = <0x1e110000 0x8000>; - interrupt-parent = <&gic>; - interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>; - }; - pcie: pcie@1e140000 { compatible = "mediatek,mt7621-pci"; reg = <0x1e140000 0x100 /* host-pci bridge registers */ diff --git a/drivers/staging/nvec/nvec_power.c b/drivers/staging/nvec/nvec_power.c index 0e861c4bfcbf..b1ef196e1cfe 100644 --- a/drivers/staging/nvec/nvec_power.c +++ b/drivers/staging/nvec/nvec_power.c @@ -338,7 +338,7 @@ static const struct power_supply_desc nvec_psy_desc = { }; static int counter; -static int const bat_iter[] = { +static const int bat_iter[] = { SLOT_STATUS, VOLTAGE, CURRENT, CAPACITY_REMAINING, #ifdef EC_FULL_DIAG AVERAGE_CURRENT, TEMPERATURE, TIME_REMAINING, diff --git a/drivers/staging/nvec/nvec_ps2.c b/drivers/staging/nvec/nvec_ps2.c index 45db29262a9c..157009015c3b 100644 --- a/drivers/staging/nvec/nvec_ps2.c +++ b/drivers/staging/nvec/nvec_ps2.c @@ -112,8 +112,8 @@ static int nvec_mouse_probe(struct platform_device *pdev) ser_dev->start = ps2_startstreaming; ser_dev->stop = ps2_stopstreaming; - strlcpy(ser_dev->name, "nvec mouse", sizeof(ser_dev->name)); - strlcpy(ser_dev->phys, "nvec", sizeof(ser_dev->phys)); + strscpy(ser_dev->name, "nvec mouse", sizeof(ser_dev->name)); + strscpy(ser_dev->phys, "nvec", sizeof(ser_dev->phys)); ps2_dev.ser_dev = ser_dev; ps2_dev.notifier.notifier_call = nvec_ps2_notifier; diff --git a/drivers/staging/octeon/ethernet-mdio.c b/drivers/staging/octeon/ethernet-mdio.c index 0bf545849b11..b3049108edc4 100644 --- a/drivers/staging/octeon/ethernet-mdio.c +++ b/drivers/staging/octeon/ethernet-mdio.c @@ -21,9 +21,9 @@ static void cvm_oct_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) { - strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); - strlcpy(info->version, UTS_RELEASE, sizeof(info->version)); - strlcpy(info->bus_info, "Builtin", sizeof(info->bus_info)); + strscpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); + strscpy(info->version, UTS_RELEASE, sizeof(info->version)); + strscpy(info->bus_info, "Builtin", sizeof(info->bus_info)); } static int cvm_oct_nway_reset(struct net_device *dev) @@ -146,9 +146,8 @@ int cvm_oct_phy_setup_device(struct net_device *dev) goto no_phy; phy_node = of_parse_phandle(priv->of_node, "phy-handle", 0); - if (!phy_node && of_phy_is_fixed_link(priv->of_node)) { + if (!phy_node && of_phy_is_fixed_link(priv->of_node)) phy_node = of_node_get(priv->of_node); - } if (!phy_node) goto no_phy; diff --git a/drivers/staging/olpc_dcon/olpc_dcon.c b/drivers/staging/olpc_dcon/olpc_dcon.c index e7281212db5b..6d8e9a481786 100644 --- a/drivers/staging/olpc_dcon/olpc_dcon.c +++ b/drivers/staging/olpc_dcon/olpc_dcon.c @@ -576,7 +576,7 @@ static struct notifier_block dcon_panic_nb = { static int dcon_detect(struct i2c_client *client, struct i2c_board_info *info) { - strlcpy(info->type, "olpc_dcon", I2C_NAME_SIZE); + strscpy(info->type, "olpc_dcon", I2C_NAME_SIZE); return 0; } diff --git a/drivers/staging/qlge/Kconfig b/drivers/staging/qlge/Kconfig index a3cb25a3ab80..6d831ed67965 100644 --- a/drivers/staging/qlge/Kconfig +++ b/drivers/staging/qlge/Kconfig @@ -3,6 +3,7 @@ config QLGE tristate "QLogic QLGE 10Gb Ethernet Driver Support" depends on ETHERNET && PCI + select NET_DEVLINK help This driver supports QLogic ISP8XXX 10Gb Ethernet cards. diff --git a/drivers/staging/qlge/Makefile b/drivers/staging/qlge/Makefile index 1dc2568e820c..07c1898a512e 100644 --- a/drivers/staging/qlge/Makefile +++ b/drivers/staging/qlge/Makefile @@ -5,4 +5,4 @@ obj-$(CONFIG_QLGE) += qlge.o -qlge-objs := qlge_main.o qlge_dbg.o qlge_mpi.o qlge_ethtool.o +qlge-objs := qlge_main.o qlge_dbg.o qlge_mpi.o qlge_ethtool.o qlge_devlink.o diff --git a/drivers/staging/qlge/TODO b/drivers/staging/qlge/TODO index f93f7428f5d5..c76394b9451b 100644 --- a/drivers/staging/qlge/TODO +++ b/drivers/staging/qlge/TODO @@ -14,12 +14,6 @@ queues" is confusing. * struct rx_ring is used for rx and tx completions, with some members relevant to one case only -* there is an inordinate amount of disparate debugging code, most of which is - of questionable value. In particular, qlge_dbg.c has hundreds of lines of - code bitrotting away in ifdef land (doesn't compile since commit - 18c49b91777c ("qlge: do vlan cleanup", v3.1-rc1), 8 years ago). -* triggering an ethtool regdump will hexdump a 176k struct to dmesg depending - on some module parameters. * the flow control implementation in firmware is buggy (sends a flood of pause frames, resets the link, device and driver buffer queues become desynchronized), disable it by default @@ -28,10 +22,6 @@ * the driver has a habit of using runtime checks where compile time checks are possible (ex. ql_free_rx_buffers(), ql_alloc_rx_buffers()) * reorder struct members to avoid holes if it doesn't impact performance -* in terms of namespace, the driver uses either qlge_, ql_ (used by - other qlogic drivers, with clashes, ex: ql_sem_spinlock) or nothing (with - clashes, ex: struct ob_mac_iocb_req). Rename everything to use the "qlge_" - prefix. * avoid legacy/deprecated apis (ex. replace pci_dma_*, replace pci_enable_msi, use pci_iomap) * some "while" loops could be rewritten with simple "for", ex. diff --git a/drivers/staging/qlge/qlge.h b/drivers/staging/qlge/qlge.h index 0381f3f56bc7..55e0ad759250 100644 --- a/drivers/staging/qlge/qlge.h +++ b/drivers/staging/qlge/qlge.h @@ -1081,7 +1081,7 @@ struct tx_buf_desc { #define OPCODE_IB_MPI_IOCB 0x21 #define OPCODE_IB_AE_IOCB 0x3f -struct ob_mac_iocb_req { +struct qlge_ob_mac_iocb_req { u8 opcode; u8 flags1; #define OB_MAC_IOCB_REQ_OI 0x01 @@ -1104,7 +1104,7 @@ struct ob_mac_iocb_req { struct tx_buf_desc tbd[TX_DESC_PER_IOCB]; } __packed; -struct ob_mac_iocb_rsp { +struct qlge_ob_mac_iocb_rsp { u8 opcode; /* */ u8 flags1; /* */ #define OB_MAC_IOCB_RSP_OI 0x01 /* */ @@ -1121,7 +1121,7 @@ struct ob_mac_iocb_rsp { __le32 reserved[13]; } __packed; -struct ob_mac_tso_iocb_req { +struct qlge_ob_mac_tso_iocb_req { u8 opcode; u8 flags1; #define OB_MAC_TSO_IOCB_OI 0x01 @@ -1149,7 +1149,7 @@ struct ob_mac_tso_iocb_req { struct tx_buf_desc tbd[TX_DESC_PER_IOCB]; } __packed; -struct ob_mac_tso_iocb_rsp { +struct qlge_ob_mac_tso_iocb_rsp { u8 opcode; u8 flags1; #define OB_MAC_TSO_IOCB_RSP_OI 0x01 @@ -1166,7 +1166,7 @@ struct ob_mac_tso_iocb_rsp { __le32 reserved2[13]; } __packed; -struct ib_mac_iocb_rsp { +struct qlge_ib_mac_iocb_rsp { u8 opcode; /* 0x20 */ u8 flags1; #define IB_MAC_IOCB_RSP_OI 0x01 /* Override intr delay */ @@ -1225,7 +1225,7 @@ struct ib_mac_iocb_rsp { __le64 hdr_addr; /* */ } __packed; -struct ib_ae_iocb_rsp { +struct qlge_ib_ae_iocb_rsp { u8 opcode; u8 flags1; #define IB_AE_IOCB_RSP_OI 0x01 @@ -1250,7 +1250,7 @@ struct ib_ae_iocb_rsp { * These three structures are for generic * handling of ib and ob iocbs. */ -struct ql_net_rsp_iocb { +struct qlge_net_rsp_iocb { u8 opcode; u8 flags0; __le16 length; @@ -1258,7 +1258,7 @@ struct ql_net_rsp_iocb { __le32 reserved[14]; } __packed; -struct net_req_iocb { +struct qlge_net_req_iocb { u8 opcode; u8 flags0; __le16 flags1; @@ -1346,7 +1346,7 @@ struct ricb { /* SOFTWARE/DRIVER DATA STRUCTURES. */ -struct oal { +struct qlge_oal { struct tx_buf_desc oal[TX_DESC_PER_OAL]; }; @@ -1357,9 +1357,9 @@ struct map_list { struct tx_ring_desc { struct sk_buff *skb; - struct ob_mac_iocb_req *queue_entry; + struct qlge_ob_mac_iocb_req *queue_entry; u32 index; - struct oal oal; + struct qlge_oal oal; struct map_list map[MAX_SKB_FRAGS + 2]; int map_cnt; struct tx_ring_desc *next; @@ -1388,7 +1388,7 @@ struct tx_ring { spinlock_t lock; atomic_t tx_count; /* counts down for every outstanding IO */ struct delayed_work tx_work; - struct ql_adapter *qdev; + struct qlge_adapter *qdev; u64 tx_packets; u64 tx_bytes; u64 tx_errors; @@ -1469,7 +1469,7 @@ struct rx_ring { dma_addr_t prod_idx_sh_reg_dma; void __iomem *cnsmr_idx_db_reg; /* PCI doorbell mem area + 0 */ u32 cnsmr_idx; /* current sw idx */ - struct ql_net_rsp_iocb *curr_entry; /* next entry on queue */ + struct qlge_net_rsp_iocb *curr_entry; /* next entry on queue */ void __iomem *valid_db_reg; /* PCI doorbell mem area + 0x04 */ /* Large buffer queue elements. */ @@ -1487,7 +1487,7 @@ struct rx_ring { char name[IFNAMSIZ + 5]; struct napi_struct napi; u8 reserved; - struct ql_adapter *qdev; + struct qlge_adapter *qdev; u64 rx_packets; u64 rx_multicast; u64 rx_bytes; @@ -1752,14 +1752,14 @@ enum { #define SHADOW_OFFSET 0xb0000000 #define SHADOW_REG_SHIFT 20 -struct ql_nic_misc { +struct qlge_nic_misc { u32 rx_ring_count; u32 tx_ring_count; u32 intr_count; u32 function; }; -struct ql_reg_dump { +struct qlge_reg_dump { /* segment 0 */ struct mpi_coredump_global_header mpi_global_header; @@ -1769,7 +1769,7 @@ struct ql_reg_dump { /* segment 30 */ struct mpi_coredump_segment_header misc_nic_seg_hdr; - struct ql_nic_misc misc_nic_info; + struct qlge_nic_misc misc_nic_info; /* segment 31 */ /* one interrupt state for each CQ */ @@ -1792,7 +1792,7 @@ struct ql_reg_dump { u32 ets[8 + 2]; }; -struct ql_mpi_coredump { +struct qlge_mpi_coredump { /* segment 0 */ struct mpi_coredump_global_header mpi_global_header; @@ -1914,7 +1914,7 @@ struct ql_mpi_coredump { /* segment 30 */ struct mpi_coredump_segment_header misc_nic_seg_hdr; - struct ql_nic_misc misc_nic_info; + struct qlge_nic_misc misc_nic_info; /* segment 31 */ /* one interrupt state for each CQ */ @@ -1991,7 +1991,7 @@ struct ql_mpi_coredump { * irq environment as a context to the ISR. */ struct intr_context { - struct ql_adapter *qdev; + struct qlge_adapter *qdev; u32 intr; u32 irq_mask; /* Mask of which rings the vector services. */ u32 hooked; @@ -2056,15 +2056,27 @@ enum { }; struct nic_operations { - int (*get_flash)(struct ql_adapter *qdev); - int (*port_initialize)(struct ql_adapter *qdev); + int (*get_flash)(struct qlge_adapter *qdev); + int (*port_initialize)(struct qlge_adapter *qdev); }; +struct qlge_netdev_priv { + struct qlge_adapter *qdev; + struct net_device *ndev; +}; + +static inline +struct qlge_adapter *netdev_to_qdev(struct net_device *ndev) +{ + struct qlge_netdev_priv *ndev_priv = netdev_priv(ndev); + + return ndev_priv->qdev; +} /* * The main Adapter structure definition. * This structure has all fields relevant to the hardware. */ -struct ql_adapter { +struct qlge_adapter { struct ricb ricb; unsigned long flags; u32 wol; @@ -2077,6 +2089,7 @@ struct ql_adapter { struct pci_dev *pdev; struct net_device *ndev; /* Parent NET device */ + struct devlink_health_reporter *reporter; /* Hardware information */ u32 chip_rev_id; u32 fw_rev_id; @@ -2139,8 +2152,7 @@ struct ql_adapter { u32 port_link_up; u32 port_init; u32 link_status; - struct ql_mpi_coredump *mpi_coredump; - u32 core_is_dumped; + struct qlge_mpi_coredump *mpi_coredump; u32 link_config; u32 led_config; u32 max_frame_size; @@ -2153,7 +2165,6 @@ struct ql_adapter { struct delayed_work mpi_work; struct delayed_work mpi_port_cfg_work; struct delayed_work mpi_idc_work; - struct delayed_work mpi_core_to_log; struct completion ide_completion; const struct nic_operations *nic_ops; u16 device_id; @@ -2166,7 +2177,7 @@ struct ql_adapter { /* * Typical Register accessor for memory mapped device. */ -static inline u32 ql_read32(const struct ql_adapter *qdev, int reg) +static inline u32 qlge_read32(const struct qlge_adapter *qdev, int reg) { return readl(qdev->reg_base + reg); } @@ -2174,7 +2185,7 @@ static inline u32 ql_read32(const struct ql_adapter *qdev, int reg) /* * Typical Register accessor for memory mapped device. */ -static inline void ql_write32(const struct ql_adapter *qdev, int reg, u32 val) +static inline void qlge_write32(const struct qlge_adapter *qdev, int reg, u32 val) { writel(val, qdev->reg_base + reg); } @@ -2189,7 +2200,7 @@ static inline void ql_write32(const struct ql_adapter *qdev, int reg, u32 val) * 1 4k chunk of memory. The lower half of the space is for outbound * queues. The upper half is for inbound queues. */ -static inline void ql_write_db_reg(u32 val, void __iomem *addr) +static inline void qlge_write_db_reg(u32 val, void __iomem *addr) { writel(val, addr); } @@ -2205,7 +2216,7 @@ static inline void ql_write_db_reg(u32 val, void __iomem *addr) * queues. The upper half is for inbound queues. * Caller has to guarantee ordering. */ -static inline void ql_write_db_reg_relaxed(u32 val, void __iomem *addr) +static inline void qlge_write_db_reg_relaxed(u32 val, void __iomem *addr) { writel_relaxed(val, addr); } @@ -2220,7 +2231,7 @@ static inline void ql_write_db_reg_relaxed(u32 val, void __iomem *addr) * update the relevant index register and then copy the value to the * shadow register in host memory. */ -static inline u32 ql_read_sh_reg(__le32 *addr) +static inline u32 qlge_read_sh_reg(__le32 *addr) { u32 reg; @@ -2233,132 +2244,49 @@ extern char qlge_driver_name[]; extern const char qlge_driver_version[]; extern const struct ethtool_ops qlge_ethtool_ops; -int ql_sem_spinlock(struct ql_adapter *qdev, u32 sem_mask); -void ql_sem_unlock(struct ql_adapter *qdev, u32 sem_mask); -int ql_read_xgmac_reg(struct ql_adapter *qdev, u32 reg, u32 *data); -int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index, - u32 *value); -int ql_get_routing_reg(struct ql_adapter *qdev, u32 index, u32 *value); -int ql_write_cfg(struct ql_adapter *qdev, void *ptr, int size, u32 bit, - u16 q_id); -void ql_queue_fw_error(struct ql_adapter *qdev); -void ql_mpi_work(struct work_struct *work); -void ql_mpi_reset_work(struct work_struct *work); -void ql_mpi_core_to_log(struct work_struct *work); -int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 ebit); -void ql_queue_asic_error(struct ql_adapter *qdev); -void ql_set_ethtool_ops(struct net_device *ndev); -int ql_read_xgmac_reg64(struct ql_adapter *qdev, u32 reg, u64 *data); -void ql_mpi_idc_work(struct work_struct *work); -void ql_mpi_port_cfg_work(struct work_struct *work); -int ql_mb_get_fw_state(struct ql_adapter *qdev); -int ql_cam_route_initialize(struct ql_adapter *qdev); -int ql_read_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 *data); -int ql_write_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 data); -int ql_unpause_mpi_risc(struct ql_adapter *qdev); -int ql_pause_mpi_risc(struct ql_adapter *qdev); -int ql_hard_reset_mpi_risc(struct ql_adapter *qdev); -int ql_soft_reset_mpi_risc(struct ql_adapter *qdev); -int ql_dump_risc_ram_area(struct ql_adapter *qdev, void *buf, u32 ram_addr, - int word_count); -int ql_core_dump(struct ql_adapter *qdev, struct ql_mpi_coredump *mpi_coredump); -int ql_mb_about_fw(struct ql_adapter *qdev); -int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol); -int ql_mb_wol_mode(struct ql_adapter *qdev, u32 wol); -int ql_mb_set_led_cfg(struct ql_adapter *qdev, u32 led_config); -int ql_mb_get_led_cfg(struct ql_adapter *qdev); -void ql_link_on(struct ql_adapter *qdev); -void ql_link_off(struct ql_adapter *qdev); -int ql_mb_set_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 control); -int ql_mb_get_port_cfg(struct ql_adapter *qdev); -int ql_mb_set_port_cfg(struct ql_adapter *qdev); -int ql_wait_fifo_empty(struct ql_adapter *qdev); -void ql_get_dump(struct ql_adapter *qdev, void *buff); -netdev_tx_t ql_lb_send(struct sk_buff *skb, struct net_device *ndev); -void ql_check_lb_frame(struct ql_adapter *qdev, struct sk_buff *skb); -int ql_own_firmware(struct ql_adapter *qdev); -int ql_clean_lb_rx_ring(struct rx_ring *rx_ring, int budget); - -/* #define QL_ALL_DUMP */ -/* #define QL_REG_DUMP */ -/* #define QL_DEV_DUMP */ -/* #define QL_CB_DUMP */ -/* #define QL_IB_DUMP */ -/* #define QL_OB_DUMP */ - -#ifdef QL_REG_DUMP -void ql_dump_xgmac_control_regs(struct ql_adapter *qdev); -void ql_dump_routing_entries(struct ql_adapter *qdev); -void ql_dump_regs(struct ql_adapter *qdev); -#define QL_DUMP_REGS(qdev) ql_dump_regs(qdev) -#define QL_DUMP_ROUTE(qdev) ql_dump_routing_entries(qdev) -#define QL_DUMP_XGMAC_CONTROL_REGS(qdev) ql_dump_xgmac_control_regs(qdev) -#else -#define QL_DUMP_REGS(qdev) -#define QL_DUMP_ROUTE(qdev) -#define QL_DUMP_XGMAC_CONTROL_REGS(qdev) -#endif - -#ifdef QL_STAT_DUMP -void ql_dump_stat(struct ql_adapter *qdev); -#define QL_DUMP_STAT(qdev) ql_dump_stat(qdev) -#else -#define QL_DUMP_STAT(qdev) -#endif - -#ifdef QL_DEV_DUMP -void ql_dump_qdev(struct ql_adapter *qdev); -#define QL_DUMP_QDEV(qdev) ql_dump_qdev(qdev) -#else -#define QL_DUMP_QDEV(qdev) -#endif - -#ifdef QL_CB_DUMP -void ql_dump_wqicb(struct wqicb *wqicb); -void ql_dump_tx_ring(struct tx_ring *tx_ring); -void ql_dump_ricb(struct ricb *ricb); -void ql_dump_cqicb(struct cqicb *cqicb); -void ql_dump_rx_ring(struct rx_ring *rx_ring); -void ql_dump_hw_cb(struct ql_adapter *qdev, int size, u32 bit, u16 q_id); -#define QL_DUMP_RICB(ricb) ql_dump_ricb(ricb) -#define QL_DUMP_WQICB(wqicb) ql_dump_wqicb(wqicb) -#define QL_DUMP_TX_RING(tx_ring) ql_dump_tx_ring(tx_ring) -#define QL_DUMP_CQICB(cqicb) ql_dump_cqicb(cqicb) -#define QL_DUMP_RX_RING(rx_ring) ql_dump_rx_ring(rx_ring) -#define QL_DUMP_HW_CB(qdev, size, bit, q_id) \ - ql_dump_hw_cb(qdev, size, bit, q_id) -#else -#define QL_DUMP_RICB(ricb) -#define QL_DUMP_WQICB(wqicb) -#define QL_DUMP_TX_RING(tx_ring) -#define QL_DUMP_CQICB(cqicb) -#define QL_DUMP_RX_RING(rx_ring) -#define QL_DUMP_HW_CB(qdev, size, bit, q_id) -#endif - -#ifdef QL_OB_DUMP -void ql_dump_tx_desc(struct ql_adapter *qdev, struct tx_buf_desc *tbd); -void ql_dump_ob_mac_iocb(struct ql_adapter *qdev, struct ob_mac_iocb_req *ob_mac_iocb); -void ql_dump_ob_mac_rsp(struct ql_adapter *qdev, struct ob_mac_iocb_rsp *ob_mac_rsp); -#define QL_DUMP_OB_MAC_IOCB(qdev, ob_mac_iocb) ql_dump_ob_mac_iocb(qdev, ob_mac_iocb) -#define QL_DUMP_OB_MAC_RSP(qdev, ob_mac_rsp) ql_dump_ob_mac_rsp(qdev, ob_mac_rsp) -#else -#define QL_DUMP_OB_MAC_IOCB(qdev, ob_mac_iocb) -#define QL_DUMP_OB_MAC_RSP(qdev, ob_mac_rsp) -#endif - -#ifdef QL_IB_DUMP -void ql_dump_ib_mac_rsp(struct ql_adapter *qdev, struct ib_mac_iocb_rsp *ib_mac_rsp); -#define QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp) ql_dump_ib_mac_rsp(qdev, ib_mac_rsp) -#else -#define QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp) -#endif - -#ifdef QL_ALL_DUMP -void ql_dump_all(struct ql_adapter *qdev); -#define QL_DUMP_ALL(qdev) ql_dump_all(qdev) -#else -#define QL_DUMP_ALL(qdev) -#endif +int qlge_sem_spinlock(struct qlge_adapter *qdev, u32 sem_mask); +void qlge_sem_unlock(struct qlge_adapter *qdev, u32 sem_mask); +int qlge_read_xgmac_reg(struct qlge_adapter *qdev, u32 reg, u32 *data); +int qlge_get_mac_addr_reg(struct qlge_adapter *qdev, u32 type, u16 index, + u32 *value); +int qlge_get_routing_reg(struct qlge_adapter *qdev, u32 index, u32 *value); +int qlge_write_cfg(struct qlge_adapter *qdev, void *ptr, int size, u32 bit, + u16 q_id); +void qlge_queue_fw_error(struct qlge_adapter *qdev); +void qlge_mpi_work(struct work_struct *work); +void qlge_mpi_reset_work(struct work_struct *work); +int qlge_wait_reg_rdy(struct qlge_adapter *qdev, u32 reg, u32 bit, u32 ebit); +void qlge_queue_asic_error(struct qlge_adapter *qdev); +void qlge_set_ethtool_ops(struct net_device *ndev); +int qlge_read_xgmac_reg64(struct qlge_adapter *qdev, u32 reg, u64 *data); +void qlge_mpi_idc_work(struct work_struct *work); +void qlge_mpi_port_cfg_work(struct work_struct *work); +int qlge_mb_get_fw_state(struct qlge_adapter *qdev); +int qlge_cam_route_initialize(struct qlge_adapter *qdev); +int qlge_read_mpi_reg(struct qlge_adapter *qdev, u32 reg, u32 *data); +int qlge_write_mpi_reg(struct qlge_adapter *qdev, u32 reg, u32 data); +int qlge_unpause_mpi_risc(struct qlge_adapter *qdev); +int qlge_pause_mpi_risc(struct qlge_adapter *qdev); +int qlge_hard_reset_mpi_risc(struct qlge_adapter *qdev); +int qlge_soft_reset_mpi_risc(struct qlge_adapter *qdev); +int qlge_dump_risc_ram_area(struct qlge_adapter *qdev, void *buf, u32 ram_addr, + int word_count); +int qlge_core_dump(struct qlge_adapter *qdev, struct qlge_mpi_coredump *mpi_coredump); +int qlge_mb_about_fw(struct qlge_adapter *qdev); +int qlge_mb_wol_set_magic(struct qlge_adapter *qdev, u32 enable_wol); +int qlge_mb_wol_mode(struct qlge_adapter *qdev, u32 wol); +int qlge_mb_set_led_cfg(struct qlge_adapter *qdev, u32 led_config); +int qlge_mb_get_led_cfg(struct qlge_adapter *qdev); +void qlge_link_on(struct qlge_adapter *qdev); +void qlge_link_off(struct qlge_adapter *qdev); +int qlge_mb_set_mgmnt_traffic_ctl(struct qlge_adapter *qdev, u32 control); +int qlge_mb_get_port_cfg(struct qlge_adapter *qdev); +int qlge_mb_set_port_cfg(struct qlge_adapter *qdev); +int qlge_wait_fifo_empty(struct qlge_adapter *qdev); +void qlge_get_dump(struct qlge_adapter *qdev, void *buff); +netdev_tx_t qlge_lb_send(struct sk_buff *skb, struct net_device *ndev); +void qlge_check_lb_frame(struct qlge_adapter *qdev, struct sk_buff *skb); +int qlge_own_firmware(struct qlge_adapter *qdev); +int qlge_clean_lb_rx_ring(struct rx_ring *rx_ring, int budget); #endif /* _QLGE_H_ */ diff --git a/drivers/staging/qlge/qlge_dbg.c b/drivers/staging/qlge/qlge_dbg.c index 42fd13990f3a..37e593f0fd82 100644 --- a/drivers/staging/qlge/qlge_dbg.c +++ b/drivers/staging/qlge/qlge_dbg.c @@ -6,8 +6,8 @@ #include "qlge.h" /* Read a NIC register from the alternate function. */ -static u32 ql_read_other_func_reg(struct ql_adapter *qdev, - u32 reg) +static u32 qlge_read_other_func_reg(struct qlge_adapter *qdev, + u32 reg) { u32 register_to_read; u32 reg_val; @@ -17,7 +17,7 @@ static u32 ql_read_other_func_reg(struct ql_adapter *qdev, | MPI_NIC_READ | (qdev->alt_func << MPI_NIC_FUNCTION_SHIFT) | reg; - status = ql_read_mpi_reg(qdev, register_to_read, ®_val); + status = qlge_read_mpi_reg(qdev, register_to_read, ®_val); if (status != 0) return 0xffffffff; @@ -25,8 +25,8 @@ static u32 ql_read_other_func_reg(struct ql_adapter *qdev, } /* Write a NIC register from the alternate function. */ -static int ql_write_other_func_reg(struct ql_adapter *qdev, - u32 reg, u32 reg_val) +static int qlge_write_other_func_reg(struct qlge_adapter *qdev, + u32 reg, u32 reg_val) { u32 register_to_read; @@ -35,17 +35,17 @@ static int ql_write_other_func_reg(struct ql_adapter *qdev, | (qdev->alt_func << MPI_NIC_FUNCTION_SHIFT) | reg; - return ql_write_mpi_reg(qdev, register_to_read, reg_val); + return qlge_write_mpi_reg(qdev, register_to_read, reg_val); } -static int ql_wait_other_func_reg_rdy(struct ql_adapter *qdev, u32 reg, - u32 bit, u32 err_bit) +static int qlge_wait_other_func_reg_rdy(struct qlge_adapter *qdev, u32 reg, + u32 bit, u32 err_bit) { u32 temp; int count; for (count = 10; count; count--) { - temp = ql_read_other_func_reg(qdev, reg); + temp = qlge_read_other_func_reg(qdev, reg); /* check for errors */ if (temp & err_bit) @@ -57,80 +57,80 @@ static int ql_wait_other_func_reg_rdy(struct ql_adapter *qdev, u32 reg, return -1; } -static int ql_read_other_func_serdes_reg(struct ql_adapter *qdev, u32 reg, - u32 *data) +static int qlge_read_other_func_serdes_reg(struct qlge_adapter *qdev, u32 reg, + u32 *data) { int status; /* wait for reg to come ready */ - status = ql_wait_other_func_reg_rdy(qdev, XG_SERDES_ADDR / 4, - XG_SERDES_ADDR_RDY, 0); + status = qlge_wait_other_func_reg_rdy(qdev, XG_SERDES_ADDR / 4, + XG_SERDES_ADDR_RDY, 0); if (status) goto exit; /* set up for reg read */ - ql_write_other_func_reg(qdev, XG_SERDES_ADDR / 4, reg | PROC_ADDR_R); + qlge_write_other_func_reg(qdev, XG_SERDES_ADDR / 4, reg | PROC_ADDR_R); /* wait for reg to come ready */ - status = ql_wait_other_func_reg_rdy(qdev, XG_SERDES_ADDR / 4, - XG_SERDES_ADDR_RDY, 0); + status = qlge_wait_other_func_reg_rdy(qdev, XG_SERDES_ADDR / 4, + XG_SERDES_ADDR_RDY, 0); if (status) goto exit; /* get the data */ - *data = ql_read_other_func_reg(qdev, (XG_SERDES_DATA / 4)); + *data = qlge_read_other_func_reg(qdev, (XG_SERDES_DATA / 4)); exit: return status; } /* Read out the SERDES registers */ -static int ql_read_serdes_reg(struct ql_adapter *qdev, u32 reg, u32 *data) +static int qlge_read_serdes_reg(struct qlge_adapter *qdev, u32 reg, u32 *data) { int status; /* wait for reg to come ready */ - status = ql_wait_reg_rdy(qdev, XG_SERDES_ADDR, XG_SERDES_ADDR_RDY, 0); + status = qlge_wait_reg_rdy(qdev, XG_SERDES_ADDR, XG_SERDES_ADDR_RDY, 0); if (status) goto exit; /* set up for reg read */ - ql_write32(qdev, XG_SERDES_ADDR, reg | PROC_ADDR_R); + qlge_write32(qdev, XG_SERDES_ADDR, reg | PROC_ADDR_R); /* wait for reg to come ready */ - status = ql_wait_reg_rdy(qdev, XG_SERDES_ADDR, XG_SERDES_ADDR_RDY, 0); + status = qlge_wait_reg_rdy(qdev, XG_SERDES_ADDR, XG_SERDES_ADDR_RDY, 0); if (status) goto exit; /* get the data */ - *data = ql_read32(qdev, XG_SERDES_DATA); + *data = qlge_read32(qdev, XG_SERDES_DATA); exit: return status; } -static void ql_get_both_serdes(struct ql_adapter *qdev, u32 addr, - u32 *direct_ptr, u32 *indirect_ptr, - bool direct_valid, bool indirect_valid) +static void qlge_get_both_serdes(struct qlge_adapter *qdev, u32 addr, + u32 *direct_ptr, u32 *indirect_ptr, + bool direct_valid, bool indirect_valid) { unsigned int status; status = 1; if (direct_valid) - status = ql_read_serdes_reg(qdev, addr, direct_ptr); + status = qlge_read_serdes_reg(qdev, addr, direct_ptr); /* Dead fill any failures or invalids. */ if (status) *direct_ptr = 0xDEADBEEF; status = 1; if (indirect_valid) - status = ql_read_other_func_serdes_reg( - qdev, addr, indirect_ptr); + status = qlge_read_other_func_serdes_reg(qdev, addr, + indirect_ptr); /* Dead fill any failures or invalids. */ if (status) *indirect_ptr = 0xDEADBEEF; } -static int ql_get_serdes_regs(struct ql_adapter *qdev, - struct ql_mpi_coredump *mpi_coredump) +static int qlge_get_serdes_regs(struct qlge_adapter *qdev, + struct qlge_mpi_coredump *mpi_coredump) { int status; bool xfi_direct_valid = false, xfi_indirect_valid = false; @@ -140,9 +140,9 @@ static int ql_get_serdes_regs(struct ql_adapter *qdev, u32 *indirect_ptr; /* The XAUI needs to be read out per port */ - status = ql_read_other_func_serdes_reg(qdev, - XG_SERDES_XAUI_HSS_PCS_START, - &temp); + status = qlge_read_other_func_serdes_reg(qdev, + XG_SERDES_XAUI_HSS_PCS_START, + &temp); if (status) temp = XG_SERDES_ADDR_XAUI_PWR_DOWN; @@ -150,7 +150,7 @@ static int ql_get_serdes_regs(struct ql_adapter *qdev, XG_SERDES_ADDR_XAUI_PWR_DOWN) xaui_indirect_valid = false; - status = ql_read_serdes_reg(qdev, XG_SERDES_XAUI_HSS_PCS_START, &temp); + status = qlge_read_serdes_reg(qdev, XG_SERDES_XAUI_HSS_PCS_START, &temp); if (status) temp = XG_SERDES_ADDR_XAUI_PWR_DOWN; @@ -163,7 +163,7 @@ static int ql_get_serdes_regs(struct ql_adapter *qdev, * XFI register is shared so only need to read one * functions and then check the bits. */ - status = ql_read_serdes_reg(qdev, XG_SERDES_ADDR_STS, &temp); + status = qlge_read_serdes_reg(qdev, XG_SERDES_ADDR_STS, &temp); if (status) temp = 0; @@ -198,8 +198,8 @@ static int ql_get_serdes_regs(struct ql_adapter *qdev, } for (i = 0; i <= 0x000000034; i += 4, direct_ptr++, indirect_ptr++) - ql_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, - xaui_direct_valid, xaui_indirect_valid); + qlge_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, + xaui_direct_valid, xaui_indirect_valid); /* Get XAUI_HSS_PCS register block. */ if (qdev->func & 1) { @@ -215,8 +215,8 @@ static int ql_get_serdes_regs(struct ql_adapter *qdev, } for (i = 0x800; i <= 0x880; i += 4, direct_ptr++, indirect_ptr++) - ql_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, - xaui_direct_valid, xaui_indirect_valid); + qlge_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, + xaui_direct_valid, xaui_indirect_valid); /* Get XAUI_XFI_AN register block. */ if (qdev->func & 1) { @@ -228,8 +228,8 @@ static int ql_get_serdes_regs(struct ql_adapter *qdev, } for (i = 0x1000; i <= 0x1034; i += 4, direct_ptr++, indirect_ptr++) - ql_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, - xfi_direct_valid, xfi_indirect_valid); + qlge_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, + xfi_direct_valid, xfi_indirect_valid); /* Get XAUI_XFI_TRAIN register block. */ if (qdev->func & 1) { @@ -243,8 +243,8 @@ static int ql_get_serdes_regs(struct ql_adapter *qdev, } for (i = 0x1050; i <= 0x107c; i += 4, direct_ptr++, indirect_ptr++) - ql_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, - xfi_direct_valid, xfi_indirect_valid); + qlge_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, + xfi_direct_valid, xfi_indirect_valid); /* Get XAUI_XFI_HSS_PCS register block. */ if (qdev->func & 1) { @@ -260,8 +260,8 @@ static int ql_get_serdes_regs(struct ql_adapter *qdev, } for (i = 0x1800; i <= 0x1838; i += 4, direct_ptr++, indirect_ptr++) - ql_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, - xfi_direct_valid, xfi_indirect_valid); + qlge_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, + xfi_direct_valid, xfi_indirect_valid); /* Get XAUI_XFI_HSS_TX register block. */ if (qdev->func & 1) { @@ -275,8 +275,8 @@ static int ql_get_serdes_regs(struct ql_adapter *qdev, mpi_coredump->serdes2_xfi_hss_tx; } for (i = 0x1c00; i <= 0x1c1f; i++, direct_ptr++, indirect_ptr++) - ql_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, - xfi_direct_valid, xfi_indirect_valid); + qlge_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, + xfi_direct_valid, xfi_indirect_valid); /* Get XAUI_XFI_HSS_RX register block. */ if (qdev->func & 1) { @@ -291,8 +291,8 @@ static int ql_get_serdes_regs(struct ql_adapter *qdev, } for (i = 0x1c40; i <= 0x1c5f; i++, direct_ptr++, indirect_ptr++) - ql_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, - xfi_direct_valid, xfi_indirect_valid); + qlge_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, + xfi_direct_valid, xfi_indirect_valid); /* Get XAUI_XFI_HSS_PLL register block. */ if (qdev->func & 1) { @@ -307,33 +307,33 @@ static int ql_get_serdes_regs(struct ql_adapter *qdev, mpi_coredump->serdes2_xfi_hss_pll; } for (i = 0x1e00; i <= 0x1e1f; i++, direct_ptr++, indirect_ptr++) - ql_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, - xfi_direct_valid, xfi_indirect_valid); + qlge_get_both_serdes(qdev, i, direct_ptr, indirect_ptr, + xfi_direct_valid, xfi_indirect_valid); return 0; } -static int ql_read_other_func_xgmac_reg(struct ql_adapter *qdev, u32 reg, - u32 *data) +static int qlge_read_other_func_xgmac_reg(struct qlge_adapter *qdev, u32 reg, + u32 *data) { int status = 0; /* wait for reg to come ready */ - status = ql_wait_other_func_reg_rdy(qdev, XGMAC_ADDR / 4, - XGMAC_ADDR_RDY, XGMAC_ADDR_XME); + status = qlge_wait_other_func_reg_rdy(qdev, XGMAC_ADDR / 4, + XGMAC_ADDR_RDY, XGMAC_ADDR_XME); if (status) goto exit; /* set up for reg read */ - ql_write_other_func_reg(qdev, XGMAC_ADDR / 4, reg | XGMAC_ADDR_R); + qlge_write_other_func_reg(qdev, XGMAC_ADDR / 4, reg | XGMAC_ADDR_R); /* wait for reg to come ready */ - status = ql_wait_other_func_reg_rdy(qdev, XGMAC_ADDR / 4, - XGMAC_ADDR_RDY, XGMAC_ADDR_XME); + status = qlge_wait_other_func_reg_rdy(qdev, XGMAC_ADDR / 4, + XGMAC_ADDR_RDY, XGMAC_ADDR_XME); if (status) goto exit; /* get the data */ - *data = ql_read_other_func_reg(qdev, XGMAC_DATA / 4); + *data = qlge_read_other_func_reg(qdev, XGMAC_DATA / 4); exit: return status; } @@ -341,8 +341,8 @@ exit: /* Read the 400 xgmac control/statistics registers * skipping unused locations. */ -static int ql_get_xgmac_regs(struct ql_adapter *qdev, u32 *buf, - unsigned int other_function) +static int qlge_get_xgmac_regs(struct qlge_adapter *qdev, u32 *buf, + unsigned int other_function) { int status = 0; int i; @@ -370,9 +370,9 @@ static int ql_get_xgmac_regs(struct ql_adapter *qdev, u32 *buf, (i > 0x000005c8 && i < 0x00000600)) { if (other_function) status = - ql_read_other_func_xgmac_reg(qdev, i, buf); + qlge_read_other_func_xgmac_reg(qdev, i, buf); else - status = ql_read_xgmac_reg(qdev, i, buf); + status = qlge_read_xgmac_reg(qdev, i, buf); if (status) *buf = 0xdeadbeef; @@ -382,46 +382,46 @@ static int ql_get_xgmac_regs(struct ql_adapter *qdev, u32 *buf, return status; } -static int ql_get_ets_regs(struct ql_adapter *qdev, u32 *buf) +static int qlge_get_ets_regs(struct qlge_adapter *qdev, u32 *buf) { int i; for (i = 0; i < 8; i++, buf++) { - ql_write32(qdev, NIC_ETS, i << 29 | 0x08000000); - *buf = ql_read32(qdev, NIC_ETS); + qlge_write32(qdev, NIC_ETS, i << 29 | 0x08000000); + *buf = qlge_read32(qdev, NIC_ETS); } for (i = 0; i < 2; i++, buf++) { - ql_write32(qdev, CNA_ETS, i << 29 | 0x08000000); - *buf = ql_read32(qdev, CNA_ETS); + qlge_write32(qdev, CNA_ETS, i << 29 | 0x08000000); + *buf = qlge_read32(qdev, CNA_ETS); } return 0; } -static void ql_get_intr_states(struct ql_adapter *qdev, u32 *buf) +static void qlge_get_intr_states(struct qlge_adapter *qdev, u32 *buf) { int i; for (i = 0; i < qdev->rx_ring_count; i++, buf++) { - ql_write32(qdev, INTR_EN, - qdev->intr_context[i].intr_read_mask); - *buf = ql_read32(qdev, INTR_EN); + qlge_write32(qdev, INTR_EN, + qdev->intr_context[i].intr_read_mask); + *buf = qlge_read32(qdev, INTR_EN); } } -static int ql_get_cam_entries(struct ql_adapter *qdev, u32 *buf) +static int qlge_get_cam_entries(struct qlge_adapter *qdev, u32 *buf) { int i, status; u32 value[3]; - status = ql_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); + status = qlge_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); if (status) return status; for (i = 0; i < 16; i++) { - status = ql_get_mac_addr_reg(qdev, - MAC_ADDR_TYPE_CAM_MAC, i, value); + status = qlge_get_mac_addr_reg(qdev, + MAC_ADDR_TYPE_CAM_MAC, i, value); if (status) { netif_err(qdev, drv, qdev->ndev, "Failed read of mac index register\n"); @@ -432,8 +432,8 @@ static int ql_get_cam_entries(struct ql_adapter *qdev, u32 *buf) *buf++ = value[2]; /* output */ } for (i = 0; i < 32; i++) { - status = ql_get_mac_addr_reg(qdev, - MAC_ADDR_TYPE_MULTI_MAC, i, value); + status = qlge_get_mac_addr_reg(qdev, MAC_ADDR_TYPE_MULTI_MAC, + i, value); if (status) { netif_err(qdev, drv, qdev->ndev, "Failed read of mac index register\n"); @@ -443,21 +443,21 @@ static int ql_get_cam_entries(struct ql_adapter *qdev, u32 *buf) *buf++ = value[1]; /* upper Mcast address */ } err: - ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK); + qlge_sem_unlock(qdev, SEM_MAC_ADDR_MASK); return status; } -static int ql_get_routing_entries(struct ql_adapter *qdev, u32 *buf) +static int qlge_get_routing_entries(struct qlge_adapter *qdev, u32 *buf) { int status; u32 value, i; - status = ql_sem_spinlock(qdev, SEM_RT_IDX_MASK); + status = qlge_sem_spinlock(qdev, SEM_RT_IDX_MASK); if (status) return status; for (i = 0; i < 16; i++) { - status = ql_get_routing_reg(qdev, i, &value); + status = qlge_get_routing_reg(qdev, i, &value); if (status) { netif_err(qdev, drv, qdev->ndev, "Failed read of routing index register\n"); @@ -467,23 +467,23 @@ static int ql_get_routing_entries(struct ql_adapter *qdev, u32 *buf) } } err: - ql_sem_unlock(qdev, SEM_RT_IDX_MASK); + qlge_sem_unlock(qdev, SEM_RT_IDX_MASK); return status; } /* Read the MPI Processor shadow registers */ -static int ql_get_mpi_shadow_regs(struct ql_adapter *qdev, u32 *buf) +static int qlge_get_mpi_shadow_regs(struct qlge_adapter *qdev, u32 *buf) { u32 i; int status; for (i = 0; i < MPI_CORE_SH_REGS_CNT; i++, buf++) { - status = ql_write_mpi_reg(qdev, - RISC_124, - (SHADOW_OFFSET | i << SHADOW_REG_SHIFT)); + status = qlge_write_mpi_reg(qdev, + RISC_124, + (SHADOW_OFFSET | i << SHADOW_REG_SHIFT)); if (status) goto end; - status = ql_read_mpi_reg(qdev, RISC_127, buf); + status = qlge_read_mpi_reg(qdev, RISC_127, buf); if (status) goto end; } @@ -492,13 +492,13 @@ end: } /* Read the MPI Processor core registers */ -static int ql_get_mpi_regs(struct ql_adapter *qdev, u32 *buf, - u32 offset, u32 count) +static int qlge_get_mpi_regs(struct qlge_adapter *qdev, u32 *buf, + u32 offset, u32 count) { int i, status = 0; for (i = 0; i < count; i++, buf++) { - status = ql_read_mpi_reg(qdev, offset + i, buf); + status = qlge_read_mpi_reg(qdev, offset + i, buf); if (status) return status; } @@ -506,8 +506,8 @@ static int ql_get_mpi_regs(struct ql_adapter *qdev, u32 *buf, } /* Read the ASIC probe dump */ -static unsigned int *ql_get_probe(struct ql_adapter *qdev, u32 clock, - u32 valid, u32 *buf) +static unsigned int *qlge_get_probe(struct qlge_adapter *qdev, u32 clock, + u32 valid, u32 *buf) { u32 module, mux_sel, probe, lo_val, hi_val; @@ -519,15 +519,15 @@ static unsigned int *ql_get_probe(struct ql_adapter *qdev, u32 clock, | PRB_MX_ADDR_ARE | mux_sel | (module << PRB_MX_ADDR_MOD_SEL_SHIFT); - ql_write32(qdev, PRB_MX_ADDR, probe); - lo_val = ql_read32(qdev, PRB_MX_DATA); + qlge_write32(qdev, PRB_MX_ADDR, probe); + lo_val = qlge_read32(qdev, PRB_MX_DATA); if (mux_sel == 0) { *buf = probe; buf++; } probe |= PRB_MX_ADDR_UP; - ql_write32(qdev, PRB_MX_ADDR, probe); - hi_val = ql_read32(qdev, PRB_MX_DATA); + qlge_write32(qdev, PRB_MX_ADDR, probe); + hi_val = qlge_read32(qdev, PRB_MX_DATA); *buf = lo_val; buf++; *buf = hi_val; @@ -537,23 +537,23 @@ static unsigned int *ql_get_probe(struct ql_adapter *qdev, u32 clock, return buf; } -static int ql_get_probe_dump(struct ql_adapter *qdev, unsigned int *buf) +static int qlge_get_probe_dump(struct qlge_adapter *qdev, unsigned int *buf) { /* First we have to enable the probe mux */ - ql_write_mpi_reg(qdev, MPI_TEST_FUNC_PRB_CTL, MPI_TEST_FUNC_PRB_EN); - buf = ql_get_probe(qdev, PRB_MX_ADDR_SYS_CLOCK, - PRB_MX_ADDR_VALID_SYS_MOD, buf); - buf = ql_get_probe(qdev, PRB_MX_ADDR_PCI_CLOCK, - PRB_MX_ADDR_VALID_PCI_MOD, buf); - buf = ql_get_probe(qdev, PRB_MX_ADDR_XGM_CLOCK, - PRB_MX_ADDR_VALID_XGM_MOD, buf); - buf = ql_get_probe(qdev, PRB_MX_ADDR_FC_CLOCK, - PRB_MX_ADDR_VALID_FC_MOD, buf); + qlge_write_mpi_reg(qdev, MPI_TEST_FUNC_PRB_CTL, MPI_TEST_FUNC_PRB_EN); + buf = qlge_get_probe(qdev, PRB_MX_ADDR_SYS_CLOCK, + PRB_MX_ADDR_VALID_SYS_MOD, buf); + buf = qlge_get_probe(qdev, PRB_MX_ADDR_PCI_CLOCK, + PRB_MX_ADDR_VALID_PCI_MOD, buf); + buf = qlge_get_probe(qdev, PRB_MX_ADDR_XGM_CLOCK, + PRB_MX_ADDR_VALID_XGM_MOD, buf); + buf = qlge_get_probe(qdev, PRB_MX_ADDR_FC_CLOCK, + PRB_MX_ADDR_VALID_FC_MOD, buf); return 0; } /* Read out the routing index registers */ -static int ql_get_routing_index_registers(struct ql_adapter *qdev, u32 *buf) +static int qlge_get_routing_index_registers(struct qlge_adapter *qdev, u32 *buf) { int status; u32 type, index, index_max; @@ -561,7 +561,7 @@ static int ql_get_routing_index_registers(struct ql_adapter *qdev, u32 *buf) u32 result_data; u32 val; - status = ql_sem_spinlock(qdev, SEM_RT_IDX_MASK); + status = qlge_sem_spinlock(qdev, SEM_RT_IDX_MASK); if (status) return status; @@ -574,11 +574,11 @@ static int ql_get_routing_index_registers(struct ql_adapter *qdev, u32 *buf) val = RT_IDX_RS | (type << RT_IDX_TYPE_SHIFT) | (index << RT_IDX_IDX_SHIFT); - ql_write32(qdev, RT_IDX, val); + qlge_write32(qdev, RT_IDX, val); result_index = 0; while ((result_index & RT_IDX_MR) == 0) - result_index = ql_read32(qdev, RT_IDX); - result_data = ql_read32(qdev, RT_DATA); + result_index = qlge_read32(qdev, RT_IDX); + result_data = qlge_read32(qdev, RT_DATA); *buf = type; buf++; *buf = index; @@ -589,12 +589,12 @@ static int ql_get_routing_index_registers(struct ql_adapter *qdev, u32 *buf) buf++; } } - ql_sem_unlock(qdev, SEM_RT_IDX_MASK); + qlge_sem_unlock(qdev, SEM_RT_IDX_MASK); return status; } /* Read out the MAC protocol registers */ -static void ql_get_mac_protocol_registers(struct ql_adapter *qdev, u32 *buf) +static void qlge_get_mac_protocol_registers(struct qlge_adapter *qdev, u32 *buf) { u32 result_index, result_data; u32 type; @@ -657,13 +657,13 @@ static void ql_get_mac_protocol_registers(struct ql_adapter *qdev, u32 *buf) | (type << MAC_ADDR_TYPE_SHIFT) | (index << MAC_ADDR_IDX_SHIFT) | (offset); - ql_write32(qdev, MAC_ADDR_IDX, val); + qlge_write32(qdev, MAC_ADDR_IDX, val); result_index = 0; while ((result_index & MAC_ADDR_MR) == 0) { - result_index = ql_read32(qdev, - MAC_ADDR_IDX); + result_index = qlge_read32(qdev, + MAC_ADDR_IDX); } - result_data = ql_read32(qdev, MAC_ADDR_DATA); + result_data = qlge_read32(qdev, MAC_ADDR_DATA); *buf = result_index; buf++; *buf = result_data; @@ -673,7 +673,7 @@ static void ql_get_mac_protocol_registers(struct ql_adapter *qdev, u32 *buf) } } -static void ql_get_sem_registers(struct ql_adapter *qdev, u32 *buf) +static void qlge_get_sem_registers(struct qlge_adapter *qdev, u32 *buf) { u32 func_num, reg, reg_val; int status; @@ -682,7 +682,7 @@ static void ql_get_sem_registers(struct ql_adapter *qdev, u32 *buf) reg = MPI_NIC_REG_BLOCK | (func_num << MPI_NIC_FUNCTION_SHIFT) | (SEM / 4); - status = ql_read_mpi_reg(qdev, reg, ®_val); + status = qlge_read_mpi_reg(qdev, reg, ®_val); *buf = reg_val; /* if the read failed then dead fill the element. */ if (!status) @@ -692,9 +692,8 @@ static void ql_get_sem_registers(struct ql_adapter *qdev, u32 *buf) } /* Create a coredump segment header */ -static void ql_build_coredump_seg_header( - struct mpi_coredump_segment_header *seg_hdr, - u32 seg_number, u32 seg_size, u8 *desc) +static void qlge_build_coredump_seg_header(struct mpi_coredump_segment_header *seg_hdr, + u32 seg_number, u32 seg_size, u8 *desc) { memset(seg_hdr, 0, sizeof(struct mpi_coredump_segment_header)); seg_hdr->cookie = MPI_COREDUMP_COOKIE; @@ -710,7 +709,7 @@ static void ql_build_coredump_seg_header( * space for this function as well as a coredump structure that * will contain the dump. */ -int ql_core_dump(struct ql_adapter *qdev, struct ql_mpi_coredump *mpi_coredump) +int qlge_core_dump(struct qlge_adapter *qdev, struct qlge_mpi_coredump *mpi_coredump) { int status; int i; @@ -724,9 +723,9 @@ int ql_core_dump(struct ql_adapter *qdev, struct ql_mpi_coredump *mpi_coredump) * it isn't available. If the firmware died it * might be holding the sem. */ - ql_sem_spinlock(qdev, SEM_PROC_REG_MASK); + qlge_sem_spinlock(qdev, SEM_PROC_REG_MASK); - status = ql_pause_mpi_risc(qdev); + status = qlge_pause_mpi_risc(qdev); if (status) { netif_err(qdev, drv, qdev->ndev, "Failed RISC pause. Status = 0x%.08x\n", status); @@ -740,155 +739,155 @@ int ql_core_dump(struct ql_adapter *qdev, struct ql_mpi_coredump *mpi_coredump) mpi_coredump->mpi_global_header.header_size = sizeof(struct mpi_coredump_global_header); mpi_coredump->mpi_global_header.image_size = - sizeof(struct ql_mpi_coredump); + sizeof(struct qlge_mpi_coredump); strncpy(mpi_coredump->mpi_global_header.id_string, "MPI Coredump", sizeof(mpi_coredump->mpi_global_header.id_string)); /* Get generic NIC reg dump */ - ql_build_coredump_seg_header(&mpi_coredump->nic_regs_seg_hdr, - NIC1_CONTROL_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->nic_regs), "NIC1 Registers"); + qlge_build_coredump_seg_header(&mpi_coredump->nic_regs_seg_hdr, + NIC1_CONTROL_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->nic_regs), "NIC1 Registers"); - ql_build_coredump_seg_header(&mpi_coredump->nic2_regs_seg_hdr, - NIC2_CONTROL_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->nic2_regs), "NIC2 Registers"); + qlge_build_coredump_seg_header(&mpi_coredump->nic2_regs_seg_hdr, + NIC2_CONTROL_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->nic2_regs), "NIC2 Registers"); /* Get XGMac registers. (Segment 18, Rev C. step 21) */ - ql_build_coredump_seg_header(&mpi_coredump->xgmac1_seg_hdr, - NIC1_XGMAC_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->xgmac1), "NIC1 XGMac Registers"); + qlge_build_coredump_seg_header(&mpi_coredump->xgmac1_seg_hdr, + NIC1_XGMAC_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->xgmac1), "NIC1 XGMac Registers"); - ql_build_coredump_seg_header(&mpi_coredump->xgmac2_seg_hdr, - NIC2_XGMAC_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->xgmac2), "NIC2 XGMac Registers"); + qlge_build_coredump_seg_header(&mpi_coredump->xgmac2_seg_hdr, + NIC2_XGMAC_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->xgmac2), "NIC2 XGMac Registers"); if (qdev->func & 1) { /* Odd means our function is NIC 2 */ for (i = 0; i < NIC_REGS_DUMP_WORD_COUNT; i++) mpi_coredump->nic2_regs[i] = - ql_read32(qdev, i * sizeof(u32)); + qlge_read32(qdev, i * sizeof(u32)); for (i = 0; i < NIC_REGS_DUMP_WORD_COUNT; i++) mpi_coredump->nic_regs[i] = - ql_read_other_func_reg(qdev, (i * sizeof(u32)) / 4); + qlge_read_other_func_reg(qdev, (i * sizeof(u32)) / 4); - ql_get_xgmac_regs(qdev, &mpi_coredump->xgmac2[0], 0); - ql_get_xgmac_regs(qdev, &mpi_coredump->xgmac1[0], 1); + qlge_get_xgmac_regs(qdev, &mpi_coredump->xgmac2[0], 0); + qlge_get_xgmac_regs(qdev, &mpi_coredump->xgmac1[0], 1); } else { /* Even means our function is NIC 1 */ for (i = 0; i < NIC_REGS_DUMP_WORD_COUNT; i++) mpi_coredump->nic_regs[i] = - ql_read32(qdev, i * sizeof(u32)); + qlge_read32(qdev, i * sizeof(u32)); for (i = 0; i < NIC_REGS_DUMP_WORD_COUNT; i++) mpi_coredump->nic2_regs[i] = - ql_read_other_func_reg(qdev, (i * sizeof(u32)) / 4); + qlge_read_other_func_reg(qdev, (i * sizeof(u32)) / 4); - ql_get_xgmac_regs(qdev, &mpi_coredump->xgmac1[0], 0); - ql_get_xgmac_regs(qdev, &mpi_coredump->xgmac2[0], 1); + qlge_get_xgmac_regs(qdev, &mpi_coredump->xgmac1[0], 0); + qlge_get_xgmac_regs(qdev, &mpi_coredump->xgmac2[0], 1); } /* Rev C. Step 20a */ - ql_build_coredump_seg_header(&mpi_coredump->xaui_an_hdr, - XAUI_AN_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes_xaui_an), - "XAUI AN Registers"); + qlge_build_coredump_seg_header(&mpi_coredump->xaui_an_hdr, + XAUI_AN_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes_xaui_an), + "XAUI AN Registers"); /* Rev C. Step 20b */ - ql_build_coredump_seg_header(&mpi_coredump->xaui_hss_pcs_hdr, - XAUI_HSS_PCS_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes_xaui_hss_pcs), - "XAUI HSS PCS Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi_an_hdr, XFI_AN_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes_xfi_an), - "XFI AN Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi_train_hdr, - XFI_TRAIN_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes_xfi_train), - "XFI TRAIN Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi_hss_pcs_hdr, - XFI_HSS_PCS_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes_xfi_hss_pcs), - "XFI HSS PCS Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi_hss_tx_hdr, - XFI_HSS_TX_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes_xfi_hss_tx), - "XFI HSS TX Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi_hss_rx_hdr, - XFI_HSS_RX_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes_xfi_hss_rx), - "XFI HSS RX Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi_hss_pll_hdr, - XFI_HSS_PLL_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes_xfi_hss_pll), - "XFI HSS PLL Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xaui2_an_hdr, - XAUI2_AN_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes2_xaui_an), - "XAUI2 AN Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xaui2_hss_pcs_hdr, - XAUI2_HSS_PCS_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes2_xaui_hss_pcs), - "XAUI2 HSS PCS Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi2_an_hdr, - XFI2_AN_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes2_xfi_an), - "XFI2 AN Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi2_train_hdr, - XFI2_TRAIN_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes2_xfi_train), - "XFI2 TRAIN Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi2_hss_pcs_hdr, - XFI2_HSS_PCS_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes2_xfi_hss_pcs), - "XFI2 HSS PCS Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi2_hss_tx_hdr, - XFI2_HSS_TX_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes2_xfi_hss_tx), - "XFI2 HSS TX Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi2_hss_rx_hdr, - XFI2_HSS_RX_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes2_xfi_hss_rx), - "XFI2 HSS RX Registers"); - - ql_build_coredump_seg_header(&mpi_coredump->xfi2_hss_pll_hdr, - XFI2_HSS_PLL_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->serdes2_xfi_hss_pll), - "XFI2 HSS PLL Registers"); - - status = ql_get_serdes_regs(qdev, mpi_coredump); + qlge_build_coredump_seg_header(&mpi_coredump->xaui_hss_pcs_hdr, + XAUI_HSS_PCS_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes_xaui_hss_pcs), + "XAUI HSS PCS Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi_an_hdr, XFI_AN_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes_xfi_an), + "XFI AN Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi_train_hdr, + XFI_TRAIN_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes_xfi_train), + "XFI TRAIN Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi_hss_pcs_hdr, + XFI_HSS_PCS_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes_xfi_hss_pcs), + "XFI HSS PCS Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi_hss_tx_hdr, + XFI_HSS_TX_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes_xfi_hss_tx), + "XFI HSS TX Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi_hss_rx_hdr, + XFI_HSS_RX_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes_xfi_hss_rx), + "XFI HSS RX Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi_hss_pll_hdr, + XFI_HSS_PLL_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes_xfi_hss_pll), + "XFI HSS PLL Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xaui2_an_hdr, + XAUI2_AN_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes2_xaui_an), + "XAUI2 AN Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xaui2_hss_pcs_hdr, + XAUI2_HSS_PCS_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes2_xaui_hss_pcs), + "XAUI2 HSS PCS Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi2_an_hdr, + XFI2_AN_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes2_xfi_an), + "XFI2 AN Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi2_train_hdr, + XFI2_TRAIN_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes2_xfi_train), + "XFI2 TRAIN Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi2_hss_pcs_hdr, + XFI2_HSS_PCS_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes2_xfi_hss_pcs), + "XFI2 HSS PCS Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi2_hss_tx_hdr, + XFI2_HSS_TX_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes2_xfi_hss_tx), + "XFI2 HSS TX Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi2_hss_rx_hdr, + XFI2_HSS_RX_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes2_xfi_hss_rx), + "XFI2 HSS RX Registers"); + + qlge_build_coredump_seg_header(&mpi_coredump->xfi2_hss_pll_hdr, + XFI2_HSS_PLL_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->serdes2_xfi_hss_pll), + "XFI2 HSS PLL Registers"); + + status = qlge_get_serdes_regs(qdev, mpi_coredump); if (status) { netif_err(qdev, drv, qdev->ndev, "Failed Dump of Serdes Registers. Status = 0x%.08x\n", @@ -896,185 +895,185 @@ int ql_core_dump(struct ql_adapter *qdev, struct ql_mpi_coredump *mpi_coredump) goto err; } - ql_build_coredump_seg_header(&mpi_coredump->core_regs_seg_hdr, - CORE_SEG_NUM, - sizeof(mpi_coredump->core_regs_seg_hdr) + - sizeof(mpi_coredump->mpi_core_regs) + - sizeof(mpi_coredump->mpi_core_sh_regs), - "Core Registers"); + qlge_build_coredump_seg_header(&mpi_coredump->core_regs_seg_hdr, + CORE_SEG_NUM, + sizeof(mpi_coredump->core_regs_seg_hdr) + + sizeof(mpi_coredump->mpi_core_regs) + + sizeof(mpi_coredump->mpi_core_sh_regs), + "Core Registers"); /* Get the MPI Core Registers */ - status = ql_get_mpi_regs(qdev, &mpi_coredump->mpi_core_regs[0], - MPI_CORE_REGS_ADDR, MPI_CORE_REGS_CNT); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->mpi_core_regs[0], + MPI_CORE_REGS_ADDR, MPI_CORE_REGS_CNT); if (status) goto err; /* Get the 16 MPI shadow registers */ - status = ql_get_mpi_shadow_regs(qdev, - &mpi_coredump->mpi_core_sh_regs[0]); + status = qlge_get_mpi_shadow_regs(qdev, + &mpi_coredump->mpi_core_sh_regs[0]); if (status) goto err; /* Get the Test Logic Registers */ - ql_build_coredump_seg_header(&mpi_coredump->test_logic_regs_seg_hdr, - TEST_LOGIC_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->test_logic_regs), - "Test Logic Regs"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->test_logic_regs[0], - TEST_REGS_ADDR, TEST_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->test_logic_regs_seg_hdr, + TEST_LOGIC_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->test_logic_regs), + "Test Logic Regs"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->test_logic_regs[0], + TEST_REGS_ADDR, TEST_REGS_CNT); if (status) goto err; /* Get the RMII Registers */ - ql_build_coredump_seg_header(&mpi_coredump->rmii_regs_seg_hdr, - RMII_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->rmii_regs), - "RMII Registers"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->rmii_regs[0], - RMII_REGS_ADDR, RMII_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->rmii_regs_seg_hdr, + RMII_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->rmii_regs), + "RMII Registers"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->rmii_regs[0], + RMII_REGS_ADDR, RMII_REGS_CNT); if (status) goto err; /* Get the FCMAC1 Registers */ - ql_build_coredump_seg_header(&mpi_coredump->fcmac1_regs_seg_hdr, - FCMAC1_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->fcmac1_regs), - "FCMAC1 Registers"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->fcmac1_regs[0], - FCMAC1_REGS_ADDR, FCMAC_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->fcmac1_regs_seg_hdr, + FCMAC1_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->fcmac1_regs), + "FCMAC1 Registers"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->fcmac1_regs[0], + FCMAC1_REGS_ADDR, FCMAC_REGS_CNT); if (status) goto err; /* Get the FCMAC2 Registers */ - ql_build_coredump_seg_header(&mpi_coredump->fcmac2_regs_seg_hdr, - FCMAC2_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->fcmac2_regs), - "FCMAC2 Registers"); + qlge_build_coredump_seg_header(&mpi_coredump->fcmac2_regs_seg_hdr, + FCMAC2_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->fcmac2_regs), + "FCMAC2 Registers"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->fcmac2_regs[0], - FCMAC2_REGS_ADDR, FCMAC_REGS_CNT); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->fcmac2_regs[0], + FCMAC2_REGS_ADDR, FCMAC_REGS_CNT); if (status) goto err; /* Get the FC1 MBX Registers */ - ql_build_coredump_seg_header(&mpi_coredump->fc1_mbx_regs_seg_hdr, - FC1_MBOX_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->fc1_mbx_regs), - "FC1 MBox Regs"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->fc1_mbx_regs[0], - FC1_MBX_REGS_ADDR, FC_MBX_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->fc1_mbx_regs_seg_hdr, + FC1_MBOX_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->fc1_mbx_regs), + "FC1 MBox Regs"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->fc1_mbx_regs[0], + FC1_MBX_REGS_ADDR, FC_MBX_REGS_CNT); if (status) goto err; /* Get the IDE Registers */ - ql_build_coredump_seg_header(&mpi_coredump->ide_regs_seg_hdr, - IDE_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->ide_regs), - "IDE Registers"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->ide_regs[0], - IDE_REGS_ADDR, IDE_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->ide_regs_seg_hdr, + IDE_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->ide_regs), + "IDE Registers"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->ide_regs[0], + IDE_REGS_ADDR, IDE_REGS_CNT); if (status) goto err; /* Get the NIC1 MBX Registers */ - ql_build_coredump_seg_header(&mpi_coredump->nic1_mbx_regs_seg_hdr, - NIC1_MBOX_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->nic1_mbx_regs), - "NIC1 MBox Regs"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->nic1_mbx_regs[0], - NIC1_MBX_REGS_ADDR, NIC_MBX_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->nic1_mbx_regs_seg_hdr, + NIC1_MBOX_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->nic1_mbx_regs), + "NIC1 MBox Regs"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->nic1_mbx_regs[0], + NIC1_MBX_REGS_ADDR, NIC_MBX_REGS_CNT); if (status) goto err; /* Get the SMBus Registers */ - ql_build_coredump_seg_header(&mpi_coredump->smbus_regs_seg_hdr, - SMBUS_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->smbus_regs), - "SMBus Registers"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->smbus_regs[0], - SMBUS_REGS_ADDR, SMBUS_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->smbus_regs_seg_hdr, + SMBUS_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->smbus_regs), + "SMBus Registers"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->smbus_regs[0], + SMBUS_REGS_ADDR, SMBUS_REGS_CNT); if (status) goto err; /* Get the FC2 MBX Registers */ - ql_build_coredump_seg_header(&mpi_coredump->fc2_mbx_regs_seg_hdr, - FC2_MBOX_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->fc2_mbx_regs), - "FC2 MBox Regs"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->fc2_mbx_regs[0], - FC2_MBX_REGS_ADDR, FC_MBX_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->fc2_mbx_regs_seg_hdr, + FC2_MBOX_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->fc2_mbx_regs), + "FC2 MBox Regs"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->fc2_mbx_regs[0], + FC2_MBX_REGS_ADDR, FC_MBX_REGS_CNT); if (status) goto err; /* Get the NIC2 MBX Registers */ - ql_build_coredump_seg_header(&mpi_coredump->nic2_mbx_regs_seg_hdr, - NIC2_MBOX_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->nic2_mbx_regs), - "NIC2 MBox Regs"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->nic2_mbx_regs[0], - NIC2_MBX_REGS_ADDR, NIC_MBX_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->nic2_mbx_regs_seg_hdr, + NIC2_MBOX_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->nic2_mbx_regs), + "NIC2 MBox Regs"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->nic2_mbx_regs[0], + NIC2_MBX_REGS_ADDR, NIC_MBX_REGS_CNT); if (status) goto err; /* Get the I2C Registers */ - ql_build_coredump_seg_header(&mpi_coredump->i2c_regs_seg_hdr, - I2C_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->i2c_regs), - "I2C Registers"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->i2c_regs[0], - I2C_REGS_ADDR, I2C_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->i2c_regs_seg_hdr, + I2C_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->i2c_regs), + "I2C Registers"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->i2c_regs[0], + I2C_REGS_ADDR, I2C_REGS_CNT); if (status) goto err; /* Get the MEMC Registers */ - ql_build_coredump_seg_header(&mpi_coredump->memc_regs_seg_hdr, - MEMC_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->memc_regs), - "MEMC Registers"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->memc_regs[0], - MEMC_REGS_ADDR, MEMC_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->memc_regs_seg_hdr, + MEMC_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->memc_regs), + "MEMC Registers"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->memc_regs[0], + MEMC_REGS_ADDR, MEMC_REGS_CNT); if (status) goto err; /* Get the PBus Registers */ - ql_build_coredump_seg_header(&mpi_coredump->pbus_regs_seg_hdr, - PBUS_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->pbus_regs), - "PBUS Registers"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->pbus_regs[0], - PBUS_REGS_ADDR, PBUS_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->pbus_regs_seg_hdr, + PBUS_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->pbus_regs), + "PBUS Registers"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->pbus_regs[0], + PBUS_REGS_ADDR, PBUS_REGS_CNT); if (status) goto err; /* Get the MDE Registers */ - ql_build_coredump_seg_header(&mpi_coredump->mde_regs_seg_hdr, - MDE_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->mde_regs), - "MDE Registers"); - status = ql_get_mpi_regs(qdev, &mpi_coredump->mde_regs[0], - MDE_REGS_ADDR, MDE_REGS_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->mde_regs_seg_hdr, + MDE_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->mde_regs), + "MDE Registers"); + status = qlge_get_mpi_regs(qdev, &mpi_coredump->mde_regs[0], + MDE_REGS_ADDR, MDE_REGS_CNT); if (status) goto err; - ql_build_coredump_seg_header(&mpi_coredump->misc_nic_seg_hdr, - MISC_NIC_INFO_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->misc_nic_info), - "MISC NIC INFO"); + qlge_build_coredump_seg_header(&mpi_coredump->misc_nic_seg_hdr, + MISC_NIC_INFO_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->misc_nic_info), + "MISC NIC INFO"); mpi_coredump->misc_nic_info.rx_ring_count = qdev->rx_ring_count; mpi_coredump->misc_nic_info.tx_ring_count = qdev->tx_ring_count; mpi_coredump->misc_nic_info.intr_count = qdev->intr_count; @@ -1082,79 +1081,79 @@ int ql_core_dump(struct ql_adapter *qdev, struct ql_mpi_coredump *mpi_coredump) /* Segment 31 */ /* Get indexed register values. */ - ql_build_coredump_seg_header(&mpi_coredump->intr_states_seg_hdr, - INTR_STATES_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->intr_states), - "INTR States"); - ql_get_intr_states(qdev, &mpi_coredump->intr_states[0]); - - ql_build_coredump_seg_header(&mpi_coredump->cam_entries_seg_hdr, - CAM_ENTRIES_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->cam_entries), - "CAM Entries"); - status = ql_get_cam_entries(qdev, &mpi_coredump->cam_entries[0]); + qlge_build_coredump_seg_header(&mpi_coredump->intr_states_seg_hdr, + INTR_STATES_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->intr_states), + "INTR States"); + qlge_get_intr_states(qdev, &mpi_coredump->intr_states[0]); + + qlge_build_coredump_seg_header(&mpi_coredump->cam_entries_seg_hdr, + CAM_ENTRIES_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->cam_entries), + "CAM Entries"); + status = qlge_get_cam_entries(qdev, &mpi_coredump->cam_entries[0]); if (status) goto err; - ql_build_coredump_seg_header(&mpi_coredump->nic_routing_words_seg_hdr, - ROUTING_WORDS_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->nic_routing_words), - "Routing Words"); - status = ql_get_routing_entries(qdev, - &mpi_coredump->nic_routing_words[0]); + qlge_build_coredump_seg_header(&mpi_coredump->nic_routing_words_seg_hdr, + ROUTING_WORDS_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->nic_routing_words), + "Routing Words"); + status = qlge_get_routing_entries(qdev, + &mpi_coredump->nic_routing_words[0]); if (status) goto err; /* Segment 34 (Rev C. step 23) */ - ql_build_coredump_seg_header(&mpi_coredump->ets_seg_hdr, - ETS_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->ets), - "ETS Registers"); - status = ql_get_ets_regs(qdev, &mpi_coredump->ets[0]); + qlge_build_coredump_seg_header(&mpi_coredump->ets_seg_hdr, + ETS_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->ets), + "ETS Registers"); + status = qlge_get_ets_regs(qdev, &mpi_coredump->ets[0]); if (status) goto err; - ql_build_coredump_seg_header(&mpi_coredump->probe_dump_seg_hdr, - PROBE_DUMP_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->probe_dump), - "Probe Dump"); - ql_get_probe_dump(qdev, &mpi_coredump->probe_dump[0]); - - ql_build_coredump_seg_header(&mpi_coredump->routing_reg_seg_hdr, - ROUTING_INDEX_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->routing_regs), - "Routing Regs"); - status = ql_get_routing_index_registers(qdev, - &mpi_coredump->routing_regs[0]); + qlge_build_coredump_seg_header(&mpi_coredump->probe_dump_seg_hdr, + PROBE_DUMP_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->probe_dump), + "Probe Dump"); + qlge_get_probe_dump(qdev, &mpi_coredump->probe_dump[0]); + + qlge_build_coredump_seg_header(&mpi_coredump->routing_reg_seg_hdr, + ROUTING_INDEX_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->routing_regs), + "Routing Regs"); + status = qlge_get_routing_index_registers(qdev, + &mpi_coredump->routing_regs[0]); if (status) goto err; - ql_build_coredump_seg_header(&mpi_coredump->mac_prot_reg_seg_hdr, - MAC_PROTOCOL_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->mac_prot_regs), - "MAC Prot Regs"); - ql_get_mac_protocol_registers(qdev, &mpi_coredump->mac_prot_regs[0]); + qlge_build_coredump_seg_header(&mpi_coredump->mac_prot_reg_seg_hdr, + MAC_PROTOCOL_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->mac_prot_regs), + "MAC Prot Regs"); + qlge_get_mac_protocol_registers(qdev, &mpi_coredump->mac_prot_regs[0]); /* Get the semaphore registers for all 5 functions */ - ql_build_coredump_seg_header(&mpi_coredump->sem_regs_seg_hdr, - SEM_REGS_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) + - sizeof(mpi_coredump->sem_regs), "Sem Registers"); + qlge_build_coredump_seg_header(&mpi_coredump->sem_regs_seg_hdr, + SEM_REGS_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->sem_regs), "Sem Registers"); - ql_get_sem_registers(qdev, &mpi_coredump->sem_regs[0]); + qlge_get_sem_registers(qdev, &mpi_coredump->sem_regs[0]); /* Prevent the mpi restarting while we dump the memory.*/ - ql_write_mpi_reg(qdev, MPI_TEST_FUNC_RST_STS, MPI_TEST_FUNC_RST_FRC); + qlge_write_mpi_reg(qdev, MPI_TEST_FUNC_RST_STS, MPI_TEST_FUNC_RST_FRC); /* clear the pause */ - status = ql_unpause_mpi_risc(qdev); + status = qlge_unpause_mpi_risc(qdev); if (status) { netif_err(qdev, drv, qdev->ndev, "Failed RISC unpause. Status = 0x%.08x\n", status); @@ -1162,20 +1161,20 @@ int ql_core_dump(struct ql_adapter *qdev, struct ql_mpi_coredump *mpi_coredump) } /* Reset the RISC so we can dump RAM */ - status = ql_hard_reset_mpi_risc(qdev); + status = qlge_hard_reset_mpi_risc(qdev); if (status) { netif_err(qdev, drv, qdev->ndev, "Failed RISC reset. Status = 0x%.08x\n", status); goto err; } - ql_build_coredump_seg_header(&mpi_coredump->code_ram_seg_hdr, - WCS_RAM_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->code_ram), - "WCS RAM"); - status = ql_dump_risc_ram_area(qdev, &mpi_coredump->code_ram[0], - CODE_RAM_ADDR, CODE_RAM_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->code_ram_seg_hdr, + WCS_RAM_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->code_ram), + "WCS RAM"); + status = qlge_dump_risc_ram_area(qdev, &mpi_coredump->code_ram[0], + CODE_RAM_ADDR, CODE_RAM_CNT); if (status) { netif_err(qdev, drv, qdev->ndev, "Failed Dump of CODE RAM. Status = 0x%.08x\n", @@ -1184,13 +1183,13 @@ int ql_core_dump(struct ql_adapter *qdev, struct ql_mpi_coredump *mpi_coredump) } /* Insert the segment header */ - ql_build_coredump_seg_header(&mpi_coredump->memc_ram_seg_hdr, - MEMC_RAM_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->memc_ram), - "MEMC RAM"); - status = ql_dump_risc_ram_area(qdev, &mpi_coredump->memc_ram[0], - MEMC_RAM_ADDR, MEMC_RAM_CNT); + qlge_build_coredump_seg_header(&mpi_coredump->memc_ram_seg_hdr, + MEMC_RAM_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->memc_ram), + "MEMC RAM"); + status = qlge_dump_risc_ram_area(qdev, &mpi_coredump->memc_ram[0], + MEMC_RAM_ADDR, MEMC_RAM_CNT); if (status) { netif_err(qdev, drv, qdev->ndev, "Failed Dump of MEMC RAM. Status = 0x%.08x\n", @@ -1198,13 +1197,13 @@ int ql_core_dump(struct ql_adapter *qdev, struct ql_mpi_coredump *mpi_coredump) goto err; } err: - ql_sem_unlock(qdev, SEM_PROC_REG_MASK); /* does flush too */ + qlge_sem_unlock(qdev, SEM_PROC_REG_MASK); /* does flush too */ return status; } -static void ql_get_core_dump(struct ql_adapter *qdev) +static void qlge_get_core_dump(struct qlge_adapter *qdev) { - if (!ql_own_firmware(qdev)) { + if (!qlge_own_firmware(qdev)) { netif_err(qdev, drv, qdev->ndev, "Don't own firmware!\n"); return; } @@ -1214,11 +1213,11 @@ static void ql_get_core_dump(struct ql_adapter *qdev) "Force Coredump can only be done from interface that is up\n"); return; } - ql_queue_fw_error(qdev); + qlge_queue_fw_error(qdev); } -static void ql_gen_reg_dump(struct ql_adapter *qdev, - struct ql_reg_dump *mpi_coredump) +static void qlge_gen_reg_dump(struct qlge_adapter *qdev, + struct qlge_reg_dump *mpi_coredump) { int i, status; @@ -1228,71 +1227,71 @@ static void ql_gen_reg_dump(struct ql_adapter *qdev, mpi_coredump->mpi_global_header.header_size = sizeof(struct mpi_coredump_global_header); mpi_coredump->mpi_global_header.image_size = - sizeof(struct ql_reg_dump); + sizeof(struct qlge_reg_dump); strncpy(mpi_coredump->mpi_global_header.id_string, "MPI Coredump", sizeof(mpi_coredump->mpi_global_header.id_string)); /* segment 16 */ - ql_build_coredump_seg_header(&mpi_coredump->misc_nic_seg_hdr, - MISC_NIC_INFO_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->misc_nic_info), - "MISC NIC INFO"); + qlge_build_coredump_seg_header(&mpi_coredump->misc_nic_seg_hdr, + MISC_NIC_INFO_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->misc_nic_info), + "MISC NIC INFO"); mpi_coredump->misc_nic_info.rx_ring_count = qdev->rx_ring_count; mpi_coredump->misc_nic_info.tx_ring_count = qdev->tx_ring_count; mpi_coredump->misc_nic_info.intr_count = qdev->intr_count; mpi_coredump->misc_nic_info.function = qdev->func; /* Segment 16, Rev C. Step 18 */ - ql_build_coredump_seg_header(&mpi_coredump->nic_regs_seg_hdr, - NIC1_CONTROL_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->nic_regs), - "NIC Registers"); + qlge_build_coredump_seg_header(&mpi_coredump->nic_regs_seg_hdr, + NIC1_CONTROL_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->nic_regs), + "NIC Registers"); /* Get generic reg dump */ for (i = 0; i < 64; i++) - mpi_coredump->nic_regs[i] = ql_read32(qdev, i * sizeof(u32)); + mpi_coredump->nic_regs[i] = qlge_read32(qdev, i * sizeof(u32)); /* Segment 31 */ /* Get indexed register values. */ - ql_build_coredump_seg_header(&mpi_coredump->intr_states_seg_hdr, - INTR_STATES_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->intr_states), - "INTR States"); - ql_get_intr_states(qdev, &mpi_coredump->intr_states[0]); - - ql_build_coredump_seg_header(&mpi_coredump->cam_entries_seg_hdr, - CAM_ENTRIES_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->cam_entries), - "CAM Entries"); - status = ql_get_cam_entries(qdev, &mpi_coredump->cam_entries[0]); + qlge_build_coredump_seg_header(&mpi_coredump->intr_states_seg_hdr, + INTR_STATES_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->intr_states), + "INTR States"); + qlge_get_intr_states(qdev, &mpi_coredump->intr_states[0]); + + qlge_build_coredump_seg_header(&mpi_coredump->cam_entries_seg_hdr, + CAM_ENTRIES_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->cam_entries), + "CAM Entries"); + status = qlge_get_cam_entries(qdev, &mpi_coredump->cam_entries[0]); if (status) return; - ql_build_coredump_seg_header(&mpi_coredump->nic_routing_words_seg_hdr, - ROUTING_WORDS_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->nic_routing_words), - "Routing Words"); - status = ql_get_routing_entries(qdev, - &mpi_coredump->nic_routing_words[0]); + qlge_build_coredump_seg_header(&mpi_coredump->nic_routing_words_seg_hdr, + ROUTING_WORDS_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->nic_routing_words), + "Routing Words"); + status = qlge_get_routing_entries(qdev, + &mpi_coredump->nic_routing_words[0]); if (status) return; /* Segment 34 (Rev C. step 23) */ - ql_build_coredump_seg_header(&mpi_coredump->ets_seg_hdr, - ETS_SEG_NUM, - sizeof(struct mpi_coredump_segment_header) - + sizeof(mpi_coredump->ets), - "ETS Registers"); - status = ql_get_ets_regs(qdev, &mpi_coredump->ets[0]); + qlge_build_coredump_seg_header(&mpi_coredump->ets_seg_hdr, + ETS_SEG_NUM, + sizeof(struct mpi_coredump_segment_header) + + sizeof(mpi_coredump->ets), + "ETS Registers"); + status = qlge_get_ets_regs(qdev, &mpi_coredump->ets[0]); if (status) return; } -void ql_get_dump(struct ql_adapter *qdev, void *buff) +void qlge_get_dump(struct qlge_adapter *qdev, void *buff) { /* * If the dump has already been taken and is stored @@ -1304,711 +1303,12 @@ void ql_get_dump(struct ql_adapter *qdev, void *buff) */ if (!test_bit(QL_FRC_COREDUMP, &qdev->flags)) { - if (!ql_core_dump(qdev, buff)) - ql_soft_reset_mpi_risc(qdev); + if (!qlge_core_dump(qdev, buff)) + qlge_soft_reset_mpi_risc(qdev); else netif_err(qdev, drv, qdev->ndev, "coredump failed!\n"); } else { - ql_gen_reg_dump(qdev, buff); - ql_get_core_dump(qdev); + qlge_gen_reg_dump(qdev, buff); + qlge_get_core_dump(qdev); } } - -/* Coredump to messages log file using separate worker thread */ -void ql_mpi_core_to_log(struct work_struct *work) -{ - struct ql_adapter *qdev = - container_of(work, struct ql_adapter, mpi_core_to_log.work); - - print_hex_dump(KERN_DEBUG, "Core is dumping to log file!\n", - DUMP_PREFIX_OFFSET, 32, 4, qdev->mpi_coredump, - sizeof(*qdev->mpi_coredump), false); -} - -#ifdef QL_REG_DUMP -static void ql_dump_intr_states(struct ql_adapter *qdev) -{ - int i; - u32 value; - - for (i = 0; i < qdev->intr_count; i++) { - ql_write32(qdev, INTR_EN, qdev->intr_context[i].intr_read_mask); - value = ql_read32(qdev, INTR_EN); - netdev_err(qdev->ndev, "Interrupt %d is %s\n", i, - (value & INTR_EN_EN ? "enabled" : "disabled")); - } -} - -#define DUMP_XGMAC(qdev, reg) \ -do { \ - u32 data; \ - ql_read_xgmac_reg(qdev, reg, &data); \ - netdev_err(qdev->ndev, "%s = 0x%.08x\n", #reg, data); \ -} while (0) - -void ql_dump_xgmac_control_regs(struct ql_adapter *qdev) -{ - if (ql_sem_spinlock(qdev, qdev->xg_sem_mask)) { - netdev_err(qdev->ndev, "%s: Couldn't get xgmac sem\n", - __func__); - return; - } - DUMP_XGMAC(qdev, PAUSE_SRC_LO); - DUMP_XGMAC(qdev, PAUSE_SRC_HI); - DUMP_XGMAC(qdev, GLOBAL_CFG); - DUMP_XGMAC(qdev, TX_CFG); - DUMP_XGMAC(qdev, RX_CFG); - DUMP_XGMAC(qdev, FLOW_CTL); - DUMP_XGMAC(qdev, PAUSE_OPCODE); - DUMP_XGMAC(qdev, PAUSE_TIMER); - DUMP_XGMAC(qdev, PAUSE_FRM_DEST_LO); - DUMP_XGMAC(qdev, PAUSE_FRM_DEST_HI); - DUMP_XGMAC(qdev, MAC_TX_PARAMS); - DUMP_XGMAC(qdev, MAC_RX_PARAMS); - DUMP_XGMAC(qdev, MAC_SYS_INT); - DUMP_XGMAC(qdev, MAC_SYS_INT_MASK); - DUMP_XGMAC(qdev, MAC_MGMT_INT); - DUMP_XGMAC(qdev, MAC_MGMT_IN_MASK); - DUMP_XGMAC(qdev, EXT_ARB_MODE); - ql_sem_unlock(qdev, qdev->xg_sem_mask); -} - -static void ql_dump_ets_regs(struct ql_adapter *qdev) -{ -} - -static void ql_dump_cam_entries(struct ql_adapter *qdev) -{ - int i; - u32 value[3]; - - i = ql_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); - if (i) - return; - for (i = 0; i < 4; i++) { - if (ql_get_mac_addr_reg(qdev, MAC_ADDR_TYPE_CAM_MAC, i, value)) { - netdev_err(qdev->ndev, - "%s: Failed read of mac index register\n", - __func__); - break; - } - if (value[0]) - netdev_err(qdev->ndev, - "CAM index %d CAM Lookup Lower = 0x%.08x:%.08x, Output = 0x%.08x\n", - i, value[1], value[0], value[2]); - } - for (i = 0; i < 32; i++) { - if (ql_get_mac_addr_reg - (qdev, MAC_ADDR_TYPE_MULTI_MAC, i, value)) { - netdev_err(qdev->ndev, - "%s: Failed read of mac index register\n", - __func__); - break; - } - if (value[0]) - netdev_err(qdev->ndev, - "MCAST index %d CAM Lookup Lower = 0x%.08x:%.08x\n", - i, value[1], value[0]); - } - ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK); -} - -void ql_dump_routing_entries(struct ql_adapter *qdev) -{ - int i; - u32 value; - - i = ql_sem_spinlock(qdev, SEM_RT_IDX_MASK); - if (i) - return; - for (i = 0; i < 16; i++) { - value = 0; - if (ql_get_routing_reg(qdev, i, &value)) { - netdev_err(qdev->ndev, - "%s: Failed read of routing index register\n", - __func__); - break; - } - if (value) - netdev_err(qdev->ndev, - "Routing Mask %d = 0x%.08x\n", - i, value); - } - ql_sem_unlock(qdev, SEM_RT_IDX_MASK); -} - -#define DUMP_REG(qdev, reg) \ - netdev_err(qdev->ndev, "%-32s= 0x%x\n", #reg, ql_read32(qdev, reg)) - -void ql_dump_regs(struct ql_adapter *qdev) -{ - netdev_err(qdev->ndev, "reg dump for function #%d\n", qdev->func); - DUMP_REG(qdev, SYS); - DUMP_REG(qdev, RST_FO); - DUMP_REG(qdev, FSC); - DUMP_REG(qdev, CSR); - DUMP_REG(qdev, ICB_RID); - DUMP_REG(qdev, ICB_L); - DUMP_REG(qdev, ICB_H); - DUMP_REG(qdev, CFG); - DUMP_REG(qdev, BIOS_ADDR); - DUMP_REG(qdev, STS); - DUMP_REG(qdev, INTR_EN); - DUMP_REG(qdev, INTR_MASK); - DUMP_REG(qdev, ISR1); - DUMP_REG(qdev, ISR2); - DUMP_REG(qdev, ISR3); - DUMP_REG(qdev, ISR4); - DUMP_REG(qdev, REV_ID); - DUMP_REG(qdev, FRC_ECC_ERR); - DUMP_REG(qdev, ERR_STS); - DUMP_REG(qdev, RAM_DBG_ADDR); - DUMP_REG(qdev, RAM_DBG_DATA); - DUMP_REG(qdev, ECC_ERR_CNT); - DUMP_REG(qdev, SEM); - DUMP_REG(qdev, GPIO_1); - DUMP_REG(qdev, GPIO_2); - DUMP_REG(qdev, GPIO_3); - DUMP_REG(qdev, XGMAC_ADDR); - DUMP_REG(qdev, XGMAC_DATA); - DUMP_REG(qdev, NIC_ETS); - DUMP_REG(qdev, CNA_ETS); - DUMP_REG(qdev, FLASH_ADDR); - DUMP_REG(qdev, FLASH_DATA); - DUMP_REG(qdev, CQ_STOP); - DUMP_REG(qdev, PAGE_TBL_RID); - DUMP_REG(qdev, WQ_PAGE_TBL_LO); - DUMP_REG(qdev, WQ_PAGE_TBL_HI); - DUMP_REG(qdev, CQ_PAGE_TBL_LO); - DUMP_REG(qdev, CQ_PAGE_TBL_HI); - DUMP_REG(qdev, COS_DFLT_CQ1); - DUMP_REG(qdev, COS_DFLT_CQ2); - DUMP_REG(qdev, SPLT_HDR); - DUMP_REG(qdev, FC_PAUSE_THRES); - DUMP_REG(qdev, NIC_PAUSE_THRES); - DUMP_REG(qdev, FC_ETHERTYPE); - DUMP_REG(qdev, FC_RCV_CFG); - DUMP_REG(qdev, NIC_RCV_CFG); - DUMP_REG(qdev, FC_COS_TAGS); - DUMP_REG(qdev, NIC_COS_TAGS); - DUMP_REG(qdev, MGMT_RCV_CFG); - DUMP_REG(qdev, XG_SERDES_ADDR); - DUMP_REG(qdev, XG_SERDES_DATA); - DUMP_REG(qdev, PRB_MX_ADDR); - DUMP_REG(qdev, PRB_MX_DATA); - ql_dump_intr_states(qdev); - ql_dump_xgmac_control_regs(qdev); - ql_dump_ets_regs(qdev); - ql_dump_cam_entries(qdev); - ql_dump_routing_entries(qdev); -} -#endif - -#ifdef QL_STAT_DUMP - -#define DUMP_STAT(qdev, stat) \ - netdev_err(qdev->ndev, "%s = %ld\n", #stat, \ - (unsigned long)(qdev)->nic_stats.stat) - -void ql_dump_stat(struct ql_adapter *qdev) -{ - netdev_err(qdev->ndev, "%s: Enter\n", __func__); - DUMP_STAT(qdev, tx_pkts); - DUMP_STAT(qdev, tx_bytes); - DUMP_STAT(qdev, tx_mcast_pkts); - DUMP_STAT(qdev, tx_bcast_pkts); - DUMP_STAT(qdev, tx_ucast_pkts); - DUMP_STAT(qdev, tx_ctl_pkts); - DUMP_STAT(qdev, tx_pause_pkts); - DUMP_STAT(qdev, tx_64_pkt); - DUMP_STAT(qdev, tx_65_to_127_pkt); - DUMP_STAT(qdev, tx_128_to_255_pkt); - DUMP_STAT(qdev, tx_256_511_pkt); - DUMP_STAT(qdev, tx_512_to_1023_pkt); - DUMP_STAT(qdev, tx_1024_to_1518_pkt); - DUMP_STAT(qdev, tx_1519_to_max_pkt); - DUMP_STAT(qdev, tx_undersize_pkt); - DUMP_STAT(qdev, tx_oversize_pkt); - DUMP_STAT(qdev, rx_bytes); - DUMP_STAT(qdev, rx_bytes_ok); - DUMP_STAT(qdev, rx_pkts); - DUMP_STAT(qdev, rx_pkts_ok); - DUMP_STAT(qdev, rx_bcast_pkts); - DUMP_STAT(qdev, rx_mcast_pkts); - DUMP_STAT(qdev, rx_ucast_pkts); - DUMP_STAT(qdev, rx_undersize_pkts); - DUMP_STAT(qdev, rx_oversize_pkts); - DUMP_STAT(qdev, rx_jabber_pkts); - DUMP_STAT(qdev, rx_undersize_fcerr_pkts); - DUMP_STAT(qdev, rx_drop_events); - DUMP_STAT(qdev, rx_fcerr_pkts); - DUMP_STAT(qdev, rx_align_err); - DUMP_STAT(qdev, rx_symbol_err); - DUMP_STAT(qdev, rx_mac_err); - DUMP_STAT(qdev, rx_ctl_pkts); - DUMP_STAT(qdev, rx_pause_pkts); - DUMP_STAT(qdev, rx_64_pkts); - DUMP_STAT(qdev, rx_65_to_127_pkts); - DUMP_STAT(qdev, rx_128_255_pkts); - DUMP_STAT(qdev, rx_256_511_pkts); - DUMP_STAT(qdev, rx_512_to_1023_pkts); - DUMP_STAT(qdev, rx_1024_to_1518_pkts); - DUMP_STAT(qdev, rx_1519_to_max_pkts); - DUMP_STAT(qdev, rx_len_err_pkts); -}; -#endif - -#ifdef QL_DEV_DUMP - -#define DUMP_QDEV_FIELD(qdev, type, field) \ - netdev_err(qdev->ndev, "qdev->%-24s = " type "\n", #field, (qdev)->field) -#define DUMP_QDEV_DMA_FIELD(qdev, field) \ - netdev_err(qdev->ndev, "qdev->%-24s = %llx\n", #field, \ - (unsigned long long)qdev->field) -#define DUMP_QDEV_ARRAY(qdev, type, array, index, field) \ - netdev_err(qdev->ndev, "%s[%d].%s = " type "\n", \ - #array, index, #field, (qdev)->array[index].field) -void ql_dump_qdev(struct ql_adapter *qdev) -{ - int i; - - DUMP_QDEV_FIELD(qdev, "%lx", flags); - DUMP_QDEV_FIELD(qdev, "%p", pdev); - DUMP_QDEV_FIELD(qdev, "%p", ndev); - DUMP_QDEV_FIELD(qdev, "%d", chip_rev_id); - DUMP_QDEV_FIELD(qdev, "%p", reg_base); - DUMP_QDEV_FIELD(qdev, "%p", doorbell_area); - DUMP_QDEV_FIELD(qdev, "%d", doorbell_area_size); - DUMP_QDEV_FIELD(qdev, "%x", msg_enable); - DUMP_QDEV_FIELD(qdev, "%p", rx_ring_shadow_reg_area); - DUMP_QDEV_DMA_FIELD(qdev, rx_ring_shadow_reg_dma); - DUMP_QDEV_FIELD(qdev, "%p", tx_ring_shadow_reg_area); - DUMP_QDEV_DMA_FIELD(qdev, tx_ring_shadow_reg_dma); - DUMP_QDEV_FIELD(qdev, "%d", intr_count); - if (qdev->msi_x_entry) - for (i = 0; i < qdev->intr_count; i++) { - DUMP_QDEV_ARRAY(qdev, "%d", msi_x_entry, i, vector); - DUMP_QDEV_ARRAY(qdev, "%d", msi_x_entry, i, entry); - } - for (i = 0; i < qdev->intr_count; i++) { - DUMP_QDEV_ARRAY(qdev, "%p", intr_context, i, qdev); - DUMP_QDEV_ARRAY(qdev, "%d", intr_context, i, intr); - DUMP_QDEV_ARRAY(qdev, "%d", intr_context, i, hooked); - DUMP_QDEV_ARRAY(qdev, "0x%08x", intr_context, i, intr_en_mask); - DUMP_QDEV_ARRAY(qdev, "0x%08x", intr_context, i, intr_dis_mask); - DUMP_QDEV_ARRAY(qdev, "0x%08x", intr_context, i, intr_read_mask); - } - DUMP_QDEV_FIELD(qdev, "%d", tx_ring_count); - DUMP_QDEV_FIELD(qdev, "%d", rx_ring_count); - DUMP_QDEV_FIELD(qdev, "%d", ring_mem_size); - DUMP_QDEV_FIELD(qdev, "%p", ring_mem); - DUMP_QDEV_FIELD(qdev, "%d", intr_count); - DUMP_QDEV_FIELD(qdev, "%p", tx_ring); - DUMP_QDEV_FIELD(qdev, "%d", rss_ring_count); - DUMP_QDEV_FIELD(qdev, "%p", rx_ring); - DUMP_QDEV_FIELD(qdev, "%d", default_rx_queue); - DUMP_QDEV_FIELD(qdev, "0x%08x", xg_sem_mask); - DUMP_QDEV_FIELD(qdev, "0x%08x", port_link_up); - DUMP_QDEV_FIELD(qdev, "0x%08x", port_init); - DUMP_QDEV_FIELD(qdev, "%u", lbq_buf_size); -} -#endif - -#ifdef QL_CB_DUMP -void ql_dump_wqicb(struct wqicb *wqicb) -{ - struct tx_ring *tx_ring = container_of(wqicb, struct tx_ring, wqicb); - struct ql_adapter *qdev = tx_ring->qdev; - - netdev_err(qdev->ndev, "Dumping wqicb stuff...\n"); - netdev_err(qdev->ndev, "wqicb->len = 0x%x\n", le16_to_cpu(wqicb->len)); - netdev_err(qdev->ndev, "wqicb->flags = %x\n", - le16_to_cpu(wqicb->flags)); - netdev_err(qdev->ndev, "wqicb->cq_id_rss = %d\n", - le16_to_cpu(wqicb->cq_id_rss)); - netdev_err(qdev->ndev, "wqicb->rid = 0x%x\n", le16_to_cpu(wqicb->rid)); - netdev_err(qdev->ndev, "wqicb->wq_addr = 0x%llx\n", - (unsigned long long)le64_to_cpu(wqicb->addr)); - netdev_err(qdev->ndev, "wqicb->wq_cnsmr_idx_addr = 0x%llx\n", - (unsigned long long)le64_to_cpu(wqicb->cnsmr_idx_addr)); -} - -void ql_dump_tx_ring(struct tx_ring *tx_ring) -{ - struct ql_adapter *qdev = tx_ring->qdev; - - netdev_err(qdev->ndev, "===================== Dumping tx_ring %d ===============\n", - tx_ring->wq_id); - netdev_err(qdev->ndev, "tx_ring->base = %p\n", tx_ring->wq_base); - netdev_err(qdev->ndev, "tx_ring->base_dma = 0x%llx\n", - (unsigned long long)tx_ring->wq_base_dma); - netdev_err(qdev->ndev, "tx_ring->cnsmr_idx_sh_reg, addr = 0x%p, value = %d\n", - tx_ring->cnsmr_idx_sh_reg, - tx_ring->cnsmr_idx_sh_reg - ? ql_read_sh_reg(tx_ring->cnsmr_idx_sh_reg) : 0); - netdev_err(qdev->ndev, "tx_ring->size = %d\n", tx_ring->wq_size); - netdev_err(qdev->ndev, "tx_ring->len = %d\n", tx_ring->wq_len); - netdev_err(qdev->ndev, "tx_ring->prod_idx_db_reg = %p\n", tx_ring->prod_idx_db_reg); - netdev_err(qdev->ndev, "tx_ring->valid_db_reg = %p\n", tx_ring->valid_db_reg); - netdev_err(qdev->ndev, "tx_ring->prod_idx = %d\n", tx_ring->prod_idx); - netdev_err(qdev->ndev, "tx_ring->cq_id = %d\n", tx_ring->cq_id); - netdev_err(qdev->ndev, "tx_ring->wq_id = %d\n", tx_ring->wq_id); - netdev_err(qdev->ndev, "tx_ring->q = %p\n", tx_ring->q); - netdev_err(qdev->ndev, "tx_ring->tx_count = %d\n", atomic_read(&tx_ring->tx_count)); -} - -void ql_dump_ricb(struct ricb *ricb) -{ - int i; - struct ql_adapter *qdev = - container_of(ricb, struct ql_adapter, ricb); - - netdev_err(qdev->ndev, "===================== Dumping ricb ===============\n"); - netdev_err(qdev->ndev, "Dumping ricb stuff...\n"); - - netdev_err(qdev->ndev, "ricb->base_cq = %d\n", ricb->base_cq & 0x1f); - netdev_err(qdev->ndev, "ricb->flags = %s%s%s%s%s%s%s%s%s\n", - ricb->base_cq & RSS_L4K ? "RSS_L4K " : "", - ricb->flags & RSS_L6K ? "RSS_L6K " : "", - ricb->flags & RSS_LI ? "RSS_LI " : "", - ricb->flags & RSS_LB ? "RSS_LB " : "", - ricb->flags & RSS_LM ? "RSS_LM " : "", - ricb->flags & RSS_RI4 ? "RSS_RI4 " : "", - ricb->flags & RSS_RT4 ? "RSS_RT4 " : "", - ricb->flags & RSS_RI6 ? "RSS_RI6 " : "", - ricb->flags & RSS_RT6 ? "RSS_RT6 " : ""); - netdev_err(qdev->ndev, "ricb->mask = 0x%.04x\n", le16_to_cpu(ricb->mask)); - for (i = 0; i < 16; i++) - netdev_err(qdev->ndev, "ricb->hash_cq_id[%d] = 0x%.08x\n", i, - le32_to_cpu(ricb->hash_cq_id[i])); - for (i = 0; i < 10; i++) - netdev_err(qdev->ndev, "ricb->ipv6_hash_key[%d] = 0x%.08x\n", i, - le32_to_cpu(ricb->ipv6_hash_key[i])); - for (i = 0; i < 4; i++) - netdev_err(qdev->ndev, "ricb->ipv4_hash_key[%d] = 0x%.08x\n", i, - le32_to_cpu(ricb->ipv4_hash_key[i])); -} - -void ql_dump_cqicb(struct cqicb *cqicb) -{ - struct rx_ring *rx_ring = container_of(cqicb, struct rx_ring, cqicb); - struct ql_adapter *qdev = rx_ring->qdev; - - netdev_err(qdev->ndev, "Dumping cqicb stuff...\n"); - - netdev_err(qdev->ndev, "cqicb->msix_vect = %d\n", cqicb->msix_vect); - netdev_err(qdev->ndev, "cqicb->flags = %x\n", cqicb->flags); - netdev_err(qdev->ndev, "cqicb->len = %d\n", le16_to_cpu(cqicb->len)); - netdev_err(qdev->ndev, "cqicb->addr = 0x%llx\n", - (unsigned long long)le64_to_cpu(cqicb->addr)); - netdev_err(qdev->ndev, "cqicb->prod_idx_addr = 0x%llx\n", - (unsigned long long)le64_to_cpu(cqicb->prod_idx_addr)); - netdev_err(qdev->ndev, "cqicb->pkt_delay = 0x%.04x\n", - le16_to_cpu(cqicb->pkt_delay)); - netdev_err(qdev->ndev, "cqicb->irq_delay = 0x%.04x\n", - le16_to_cpu(cqicb->irq_delay)); - netdev_err(qdev->ndev, "cqicb->lbq_addr = 0x%llx\n", - (unsigned long long)le64_to_cpu(cqicb->lbq_addr)); - netdev_err(qdev->ndev, "cqicb->lbq_buf_size = 0x%.04x\n", - le16_to_cpu(cqicb->lbq_buf_size)); - netdev_err(qdev->ndev, "cqicb->lbq_len = 0x%.04x\n", - le16_to_cpu(cqicb->lbq_len)); - netdev_err(qdev->ndev, "cqicb->sbq_addr = 0x%llx\n", - (unsigned long long)le64_to_cpu(cqicb->sbq_addr)); - netdev_err(qdev->ndev, "cqicb->sbq_buf_size = 0x%.04x\n", - le16_to_cpu(cqicb->sbq_buf_size)); - netdev_err(qdev->ndev, "cqicb->sbq_len = 0x%.04x\n", - le16_to_cpu(cqicb->sbq_len)); -} - -static const char *qlge_rx_ring_type_name(struct rx_ring *rx_ring) -{ - struct ql_adapter *qdev = rx_ring->qdev; - - if (rx_ring->cq_id < qdev->rss_ring_count) - return "RX COMPLETION"; - else - return "TX COMPLETION"; -}; - -void ql_dump_rx_ring(struct rx_ring *rx_ring) -{ - struct ql_adapter *qdev = rx_ring->qdev; - - netdev_err(qdev->ndev, - "===================== Dumping rx_ring %d ===============\n", - rx_ring->cq_id); - netdev_err(qdev->ndev, - "Dumping rx_ring %d, type = %s\n", rx_ring->cq_id, - qlge_rx_ring_type_name(rx_ring)); - netdev_err(qdev->ndev, "rx_ring->cqicb = %p\n", &rx_ring->cqicb); - netdev_err(qdev->ndev, "rx_ring->cq_base = %p\n", rx_ring->cq_base); - netdev_err(qdev->ndev, "rx_ring->cq_base_dma = %llx\n", - (unsigned long long)rx_ring->cq_base_dma); - netdev_err(qdev->ndev, "rx_ring->cq_size = %d\n", rx_ring->cq_size); - netdev_err(qdev->ndev, "rx_ring->cq_len = %d\n", rx_ring->cq_len); - netdev_err(qdev->ndev, - "rx_ring->prod_idx_sh_reg, addr = 0x%p, value = %d\n", - rx_ring->prod_idx_sh_reg, - rx_ring->prod_idx_sh_reg ? ql_read_sh_reg(rx_ring->prod_idx_sh_reg) : 0); - netdev_err(qdev->ndev, "rx_ring->prod_idx_sh_reg_dma = %llx\n", - (unsigned long long)rx_ring->prod_idx_sh_reg_dma); - netdev_err(qdev->ndev, "rx_ring->cnsmr_idx_db_reg = %p\n", - rx_ring->cnsmr_idx_db_reg); - netdev_err(qdev->ndev, "rx_ring->cnsmr_idx = %d\n", rx_ring->cnsmr_idx); - netdev_err(qdev->ndev, "rx_ring->curr_entry = %p\n", rx_ring->curr_entry); - netdev_err(qdev->ndev, "rx_ring->valid_db_reg = %p\n", rx_ring->valid_db_reg); - - netdev_err(qdev->ndev, "rx_ring->lbq.base = %p\n", rx_ring->lbq.base); - netdev_err(qdev->ndev, "rx_ring->lbq.base_dma = %llx\n", - (unsigned long long)rx_ring->lbq.base_dma); - netdev_err(qdev->ndev, "rx_ring->lbq.base_indirect = %p\n", - rx_ring->lbq.base_indirect); - netdev_err(qdev->ndev, "rx_ring->lbq.base_indirect_dma = %llx\n", - (unsigned long long)rx_ring->lbq.base_indirect_dma); - netdev_err(qdev->ndev, "rx_ring->lbq = %p\n", rx_ring->lbq.queue); - netdev_err(qdev->ndev, "rx_ring->lbq.prod_idx_db_reg = %p\n", - rx_ring->lbq.prod_idx_db_reg); - netdev_err(qdev->ndev, "rx_ring->lbq.next_to_use = %d\n", rx_ring->lbq.next_to_use); - netdev_err(qdev->ndev, "rx_ring->lbq.next_to_clean = %d\n", rx_ring->lbq.next_to_clean); - - netdev_err(qdev->ndev, "rx_ring->sbq.base = %p\n", rx_ring->sbq.base); - netdev_err(qdev->ndev, "rx_ring->sbq.base_dma = %llx\n", - (unsigned long long)rx_ring->sbq.base_dma); - netdev_err(qdev->ndev, "rx_ring->sbq.base_indirect = %p\n", - rx_ring->sbq.base_indirect); - netdev_err(qdev->ndev, "rx_ring->sbq.base_indirect_dma = %llx\n", - (unsigned long long)rx_ring->sbq.base_indirect_dma); - netdev_err(qdev->ndev, "rx_ring->sbq = %p\n", rx_ring->sbq.queue); - netdev_err(qdev->ndev, "rx_ring->sbq.prod_idx_db_reg addr = %p\n", - rx_ring->sbq.prod_idx_db_reg); - netdev_err(qdev->ndev, "rx_ring->sbq.next_to_use = %d\n", rx_ring->sbq.next_to_use); - netdev_err(qdev->ndev, "rx_ring->sbq.next_to_clean = %d\n", rx_ring->sbq.next_to_clean); - netdev_err(qdev->ndev, "rx_ring->cq_id = %d\n", rx_ring->cq_id); - netdev_err(qdev->ndev, "rx_ring->irq = %d\n", rx_ring->irq); - netdev_err(qdev->ndev, "rx_ring->cpu = %d\n", rx_ring->cpu); - netdev_err(qdev->ndev, "rx_ring->qdev = %p\n", rx_ring->qdev); -} - -void ql_dump_hw_cb(struct ql_adapter *qdev, int size, u32 bit, u16 q_id) -{ - void *ptr; - - netdev_err(qdev->ndev, "%s: Enter\n", __func__); - - ptr = kmalloc(size, GFP_ATOMIC); - if (!ptr) - return; - - if (ql_write_cfg(qdev, ptr, size, bit, q_id)) { - netdev_err(qdev->ndev, "%s: Failed to upload control block!\n", __func__); - goto fail_it; - } - switch (bit) { - case CFG_DRQ: - ql_dump_wqicb((struct wqicb *)ptr); - break; - case CFG_DCQ: - ql_dump_cqicb((struct cqicb *)ptr); - break; - case CFG_DR: - ql_dump_ricb((struct ricb *)ptr); - break; - default: - netdev_err(qdev->ndev, "%s: Invalid bit value = %x\n", __func__, bit); - break; - } -fail_it: - kfree(ptr); -} -#endif - -#ifdef QL_OB_DUMP -void ql_dump_tx_desc(struct ql_adapter *qdev, struct tx_buf_desc *tbd) -{ - netdev_err(qdev->ndev, "tbd->addr = 0x%llx\n", - le64_to_cpu((u64)tbd->addr)); - netdev_err(qdev->ndev, "tbd->len = %d\n", - le32_to_cpu(tbd->len & TX_DESC_LEN_MASK)); - netdev_err(qdev->ndev, "tbd->flags = %s %s\n", - tbd->len & TX_DESC_C ? "C" : ".", - tbd->len & TX_DESC_E ? "E" : "."); - tbd++; - netdev_err(qdev->ndev, "tbd->addr = 0x%llx\n", - le64_to_cpu((u64)tbd->addr)); - netdev_err(qdev->ndev, "tbd->len = %d\n", - le32_to_cpu(tbd->len & TX_DESC_LEN_MASK)); - netdev_err(qdev->ndev, "tbd->flags = %s %s\n", - tbd->len & TX_DESC_C ? "C" : ".", - tbd->len & TX_DESC_E ? "E" : "."); - tbd++; - netdev_err(qdev->ndev, "tbd->addr = 0x%llx\n", - le64_to_cpu((u64)tbd->addr)); - netdev_err(qdev->ndev, "tbd->len = %d\n", - le32_to_cpu(tbd->len & TX_DESC_LEN_MASK)); - netdev_err(qdev->ndev, "tbd->flags = %s %s\n", - tbd->len & TX_DESC_C ? "C" : ".", - tbd->len & TX_DESC_E ? "E" : "."); -} - -void ql_dump_ob_mac_iocb(struct ql_adapter *qdev, struct ob_mac_iocb_req *ob_mac_iocb) -{ - struct ob_mac_tso_iocb_req *ob_mac_tso_iocb = - (struct ob_mac_tso_iocb_req *)ob_mac_iocb; - struct tx_buf_desc *tbd; - u16 frame_len; - - netdev_err(qdev->ndev, "%s\n", __func__); - netdev_err(qdev->ndev, "opcode = %s\n", - (ob_mac_iocb->opcode == OPCODE_OB_MAC_IOCB) ? "MAC" : "TSO"); - netdev_err(qdev->ndev, "flags1 = %s %s %s %s %s\n", - ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_OI ? "OI" : "", - ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_I ? "I" : "", - ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_D ? "D" : "", - ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_IP4 ? "IP4" : "", - ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_IP6 ? "IP6" : ""); - netdev_err(qdev->ndev, "flags2 = %s %s %s\n", - ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_LSO ? "LSO" : "", - ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_UC ? "UC" : "", - ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_TC ? "TC" : ""); - netdev_err(qdev->ndev, "flags3 = %s %s %s\n", - ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_IC ? "IC" : "", - ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_DFP ? "DFP" : "", - ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_V ? "V" : ""); - netdev_err(qdev->ndev, "tid = %x\n", ob_mac_iocb->tid); - netdev_err(qdev->ndev, "txq_idx = %d\n", ob_mac_iocb->txq_idx); - netdev_err(qdev->ndev, "vlan_tci = %x\n", ob_mac_tso_iocb->vlan_tci); - if (ob_mac_iocb->opcode == OPCODE_OB_MAC_TSO_IOCB) { - netdev_err(qdev->ndev, "frame_len = %d\n", - le32_to_cpu(ob_mac_tso_iocb->frame_len)); - netdev_err(qdev->ndev, "mss = %d\n", - le16_to_cpu(ob_mac_tso_iocb->mss)); - netdev_err(qdev->ndev, "prot_hdr_len = %d\n", - le16_to_cpu(ob_mac_tso_iocb->total_hdrs_len)); - netdev_err(qdev->ndev, "hdr_offset = 0x%.04x\n", - le16_to_cpu(ob_mac_tso_iocb->net_trans_offset)); - frame_len = le32_to_cpu(ob_mac_tso_iocb->frame_len); - } else { - netdev_err(qdev->ndev, "frame_len = %d\n", - le16_to_cpu(ob_mac_iocb->frame_len)); - frame_len = le16_to_cpu(ob_mac_iocb->frame_len); - } - tbd = &ob_mac_iocb->tbd[0]; - ql_dump_tx_desc(qdev, tbd); -} - -void ql_dump_ob_mac_rsp(struct ql_adapter *qdev, struct ob_mac_iocb_rsp *ob_mac_rsp) -{ - netdev_err(qdev->ndev, "%s\n", __func__); - netdev_err(qdev->ndev, "opcode = %d\n", ob_mac_rsp->opcode); - netdev_err(qdev->ndev, "flags = %s %s %s %s %s %s %s\n", - ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_OI ? - "OI" : ".", ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_I ? "I" : ".", - ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_E ? "E" : ".", - ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_S ? "S" : ".", - ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_L ? "L" : ".", - ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_P ? "P" : ".", - ob_mac_rsp->flags2 & OB_MAC_IOCB_RSP_B ? "B" : "."); - netdev_err(qdev->ndev, "tid = %x\n", ob_mac_rsp->tid); -} -#endif - -#ifdef QL_IB_DUMP -void ql_dump_ib_mac_rsp(struct ql_adapter *qdev, struct ib_mac_iocb_rsp *ib_mac_rsp) -{ - netdev_err(qdev->ndev, "%s\n", __func__); - netdev_err(qdev->ndev, "opcode = 0x%x\n", ib_mac_rsp->opcode); - netdev_err(qdev->ndev, "flags1 = %s%s%s%s%s%s\n", - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_OI ? "OI " : "", - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_I ? "I " : "", - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_TE ? "TE " : "", - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_NU ? "NU " : "", - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_IE ? "IE " : "", - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_B ? "B " : ""); - - if (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) - netdev_err(qdev->ndev, "%s%s%s Multicast\n", - (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) == - IB_MAC_IOCB_RSP_M_HASH ? "Hash" : "", - (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) == - IB_MAC_IOCB_RSP_M_REG ? "Registered" : "", - (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) == - IB_MAC_IOCB_RSP_M_PROM ? "Promiscuous" : ""); - - netdev_err(qdev->ndev, "flags2 = %s%s%s%s%s\n", - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_P) ? "P " : "", - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V) ? "V " : "", - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) ? "U " : "", - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) ? "T " : "", - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_FO) ? "FO " : ""); - - if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) - netdev_err(qdev->ndev, "%s%s%s%s%s error\n", - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) == - IB_MAC_IOCB_RSP_ERR_OVERSIZE ? "oversize" : "", - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) == - IB_MAC_IOCB_RSP_ERR_UNDERSIZE ? "undersize" : "", - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) == - IB_MAC_IOCB_RSP_ERR_PREAMBLE ? "preamble" : "", - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) == - IB_MAC_IOCB_RSP_ERR_FRAME_LEN ? "frame length" : "", - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) == - IB_MAC_IOCB_RSP_ERR_CRC ? "CRC" : ""); - - netdev_err(qdev->ndev, "flags3 = %s%s\n", - ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_DS ? "DS " : "", - ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_DL ? "DL " : ""); - - if (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) - netdev_err(qdev->ndev, "RSS flags = %s%s%s%s\n", - ((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) == - IB_MAC_IOCB_RSP_M_IPV4) ? "IPv4 RSS" : "", - ((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) == - IB_MAC_IOCB_RSP_M_IPV6) ? "IPv6 RSS " : "", - ((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) == - IB_MAC_IOCB_RSP_M_TCP_V4) ? "TCP/IPv4 RSS" : "", - ((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) == - IB_MAC_IOCB_RSP_M_TCP_V6) ? "TCP/IPv6 RSS" : ""); - - netdev_err(qdev->ndev, "data_len = %d\n", - le32_to_cpu(ib_mac_rsp->data_len)); - netdev_err(qdev->ndev, "data_addr = 0x%llx\n", - (unsigned long long)le64_to_cpu(ib_mac_rsp->data_addr)); - if (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) - netdev_err(qdev->ndev, "rss = %x\n", - le32_to_cpu(ib_mac_rsp->rss)); - if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V) - netdev_err(qdev->ndev, "vlan_id = %x\n", - le16_to_cpu(ib_mac_rsp->vlan_id)); - - netdev_err(qdev->ndev, "flags4 = %s%s%s\n", - ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV ? "HV " : "", - ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HS ? "HS " : "", - ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HL ? "HL " : ""); - - if (ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV) { - netdev_err(qdev->ndev, "hdr length = %d\n", - le32_to_cpu(ib_mac_rsp->hdr_len)); - netdev_err(qdev->ndev, "hdr addr = 0x%llx\n", - (unsigned long long)le64_to_cpu(ib_mac_rsp->hdr_addr)); - } -} -#endif - -#ifdef QL_ALL_DUMP -void ql_dump_all(struct ql_adapter *qdev) -{ - int i; - - QL_DUMP_REGS(qdev); - QL_DUMP_QDEV(qdev); - for (i = 0; i < qdev->tx_ring_count; i++) { - QL_DUMP_TX_RING(&qdev->tx_ring[i]); - QL_DUMP_WQICB((struct wqicb *)&qdev->tx_ring[i]); - } - for (i = 0; i < qdev->rx_ring_count; i++) { - QL_DUMP_RX_RING(&qdev->rx_ring[i]); - QL_DUMP_CQICB((struct cqicb *)&qdev->rx_ring[i]); - } -} -#endif diff --git a/drivers/staging/qlge/qlge_devlink.c b/drivers/staging/qlge/qlge_devlink.c new file mode 100644 index 000000000000..86834d96cebf --- /dev/null +++ b/drivers/staging/qlge/qlge_devlink.c @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +#include "qlge.h" +#include "qlge_devlink.h" + +static int qlge_fill_seg_(struct devlink_fmsg *fmsg, + struct mpi_coredump_segment_header *seg_header, + u32 *reg_data) +{ + int regs_num = (seg_header->seg_size + - sizeof(struct mpi_coredump_segment_header)) / sizeof(u32); + int err; + int i; + + err = devlink_fmsg_pair_nest_start(fmsg, seg_header->description); + if (err) + return err; + err = devlink_fmsg_obj_nest_start(fmsg); + if (err) + return err; + err = devlink_fmsg_u32_pair_put(fmsg, "segment", seg_header->seg_num); + if (err) + return err; + err = devlink_fmsg_arr_pair_nest_start(fmsg, "values"); + if (err) + return err; + for (i = 0; i < regs_num; i++) { + err = devlink_fmsg_u32_put(fmsg, *reg_data); + if (err) + return err; + reg_data++; + } + err = devlink_fmsg_obj_nest_end(fmsg); + if (err) + return err; + err = devlink_fmsg_arr_pair_nest_end(fmsg); + if (err) + return err; + err = devlink_fmsg_pair_nest_end(fmsg); + return err; +} + +#define FILL_SEG(seg_hdr, seg_regs) \ + do { \ + err = qlge_fill_seg_(fmsg, &dump->seg_hdr, dump->seg_regs); \ + if (err) { \ + kvfree(dump); \ + return err; \ + } \ + } while (0) + +static int qlge_reporter_coredump(struct devlink_health_reporter *reporter, + struct devlink_fmsg *fmsg, void *priv_ctx, + struct netlink_ext_ack *extack) +{ + int err = 0; + + struct qlge_adapter *qdev = devlink_health_reporter_priv(reporter); + struct qlge_mpi_coredump *dump; + wait_queue_head_t wait; + + if (!netif_running(qdev->ndev)) + return 0; + + if (test_bit(QL_FRC_COREDUMP, &qdev->flags)) { + if (qlge_own_firmware(qdev)) { + qlge_queue_fw_error(qdev); + init_waitqueue_head(&wait); + wait_event_timeout(wait, 0, 5 * HZ); + } else { + netif_err(qdev, ifup, qdev->ndev, + "Force Coredump failed because this NIC function doesn't own the firmware\n"); + return -EPERM; + } + } + + dump = kvmalloc(sizeof(*dump), GFP_KERNEL); + if (!dump) + return -ENOMEM; + + err = qlge_core_dump(qdev, dump); + if (err) { + kvfree(dump); + return err; + } + + qlge_soft_reset_mpi_risc(qdev); + + FILL_SEG(core_regs_seg_hdr, mpi_core_regs); + FILL_SEG(test_logic_regs_seg_hdr, test_logic_regs); + FILL_SEG(rmii_regs_seg_hdr, rmii_regs); + FILL_SEG(fcmac1_regs_seg_hdr, fcmac1_regs); + FILL_SEG(fcmac2_regs_seg_hdr, fcmac2_regs); + FILL_SEG(fc1_mbx_regs_seg_hdr, fc1_mbx_regs); + FILL_SEG(ide_regs_seg_hdr, ide_regs); + FILL_SEG(nic1_mbx_regs_seg_hdr, nic1_mbx_regs); + FILL_SEG(smbus_regs_seg_hdr, smbus_regs); + FILL_SEG(fc2_mbx_regs_seg_hdr, fc2_mbx_regs); + FILL_SEG(nic2_mbx_regs_seg_hdr, nic2_mbx_regs); + FILL_SEG(i2c_regs_seg_hdr, i2c_regs); + FILL_SEG(memc_regs_seg_hdr, memc_regs); + FILL_SEG(pbus_regs_seg_hdr, pbus_regs); + FILL_SEG(mde_regs_seg_hdr, mde_regs); + FILL_SEG(nic_regs_seg_hdr, nic_regs); + FILL_SEG(nic2_regs_seg_hdr, nic2_regs); + FILL_SEG(xgmac1_seg_hdr, xgmac1); + FILL_SEG(xgmac2_seg_hdr, xgmac2); + FILL_SEG(code_ram_seg_hdr, code_ram); + FILL_SEG(memc_ram_seg_hdr, memc_ram); + FILL_SEG(xaui_an_hdr, serdes_xaui_an); + FILL_SEG(xaui_hss_pcs_hdr, serdes_xaui_hss_pcs); + FILL_SEG(xfi_an_hdr, serdes_xfi_an); + FILL_SEG(xfi_train_hdr, serdes_xfi_train); + FILL_SEG(xfi_hss_pcs_hdr, serdes_xfi_hss_pcs); + FILL_SEG(xfi_hss_tx_hdr, serdes_xfi_hss_tx); + FILL_SEG(xfi_hss_rx_hdr, serdes_xfi_hss_rx); + FILL_SEG(xfi_hss_pll_hdr, serdes_xfi_hss_pll); + + err = qlge_fill_seg_(fmsg, &dump->misc_nic_seg_hdr, + (u32 *)&dump->misc_nic_info); + if (err) { + kvfree(dump); + return err; + } + + FILL_SEG(intr_states_seg_hdr, intr_states); + FILL_SEG(cam_entries_seg_hdr, cam_entries); + FILL_SEG(nic_routing_words_seg_hdr, nic_routing_words); + FILL_SEG(ets_seg_hdr, ets); + FILL_SEG(probe_dump_seg_hdr, probe_dump); + FILL_SEG(routing_reg_seg_hdr, routing_regs); + FILL_SEG(mac_prot_reg_seg_hdr, mac_prot_regs); + FILL_SEG(xaui2_an_hdr, serdes2_xaui_an); + FILL_SEG(xaui2_hss_pcs_hdr, serdes2_xaui_hss_pcs); + FILL_SEG(xfi2_an_hdr, serdes2_xfi_an); + FILL_SEG(xfi2_train_hdr, serdes2_xfi_train); + FILL_SEG(xfi2_hss_pcs_hdr, serdes2_xfi_hss_pcs); + FILL_SEG(xfi2_hss_tx_hdr, serdes2_xfi_hss_tx); + FILL_SEG(xfi2_hss_rx_hdr, serdes2_xfi_hss_rx); + FILL_SEG(xfi2_hss_pll_hdr, serdes2_xfi_hss_pll); + FILL_SEG(sem_regs_seg_hdr, sem_regs); + + kvfree(dump); + return err; +} + +static const struct devlink_health_reporter_ops qlge_reporter_ops = { + .name = "coredump", + .dump = qlge_reporter_coredump, +}; + +void qlge_health_create_reporters(struct qlge_adapter *priv) +{ + struct devlink *devlink; + + devlink = priv_to_devlink(priv); + priv->reporter = + devlink_health_reporter_create(devlink, &qlge_reporter_ops, + 0, priv); + if (IS_ERR(priv->reporter)) + netdev_warn(priv->ndev, + "Failed to create reporter, err = %ld\n", + PTR_ERR(priv->reporter)); +} diff --git a/drivers/staging/qlge/qlge_devlink.h b/drivers/staging/qlge/qlge_devlink.h new file mode 100644 index 000000000000..19078e1ac694 --- /dev/null +++ b/drivers/staging/qlge/qlge_devlink.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef QLGE_DEVLINK_H +#define QLGE_DEVLINK_H + +#include <net/devlink.h> + +void qlge_health_create_reporters(struct qlge_adapter *priv); + +#endif /* QLGE_DEVLINK_H */ diff --git a/drivers/staging/qlge/qlge_ethtool.c b/drivers/staging/qlge/qlge_ethtool.c index a28f0254cf60..b70570b7b467 100644 --- a/drivers/staging/qlge/qlge_ethtool.c +++ b/drivers/staging/qlge/qlge_ethtool.c @@ -34,16 +34,16 @@ #include "qlge.h" -struct ql_stats { +struct qlge_stats { char stat_string[ETH_GSTRING_LEN]; int sizeof_stat; int stat_offset; }; -#define QL_SIZEOF(m) sizeof_field(struct ql_adapter, m) -#define QL_OFF(m) offsetof(struct ql_adapter, m) +#define QL_SIZEOF(m) sizeof_field(struct qlge_adapter, m) +#define QL_OFF(m) offsetof(struct qlge_adapter, m) -static const struct ql_stats ql_gstrings_stats[] = { +static const struct qlge_stats qlge_gstrings_stats[] = { {"tx_pkts", QL_SIZEOF(nic_stats.tx_pkts), QL_OFF(nic_stats.tx_pkts)}, {"tx_bytes", QL_SIZEOF(nic_stats.tx_bytes), QL_OFF(nic_stats.tx_bytes)}, {"tx_mcast_pkts", QL_SIZEOF(nic_stats.tx_mcast_pkts), @@ -175,15 +175,15 @@ static const struct ql_stats ql_gstrings_stats[] = { QL_OFF(nic_stats.rx_nic_fifo_drop)}, }; -static const char ql_gstrings_test[][ETH_GSTRING_LEN] = { +static const char qlge_gstrings_test[][ETH_GSTRING_LEN] = { "Loopback test (offline)" }; -#define QLGE_TEST_LEN (sizeof(ql_gstrings_test) / ETH_GSTRING_LEN) -#define QLGE_STATS_LEN ARRAY_SIZE(ql_gstrings_stats) +#define QLGE_TEST_LEN (sizeof(qlge_gstrings_test) / ETH_GSTRING_LEN) +#define QLGE_STATS_LEN ARRAY_SIZE(qlge_gstrings_stats) #define QLGE_RCV_MAC_ERR_STATS 7 -static int ql_update_ring_coalescing(struct ql_adapter *qdev) +static int qlge_update_ring_coalescing(struct qlge_adapter *qdev) { int i, status = 0; struct rx_ring *rx_ring; @@ -203,10 +203,10 @@ static int ql_update_ring_coalescing(struct ql_adapter *qdev) cqicb = (struct cqicb *)rx_ring; cqicb->irq_delay = cpu_to_le16(qdev->tx_coalesce_usecs); cqicb->pkt_delay = - cpu_to_le16(qdev->tx_max_coalesced_frames); + cpu_to_le16(qdev->tx_max_coalesced_frames); cqicb->flags = FLAGS_LI; - status = ql_write_cfg(qdev, cqicb, sizeof(*cqicb), - CFG_LCQ, rx_ring->cq_id); + status = qlge_write_cfg(qdev, cqicb, sizeof(*cqicb), + CFG_LCQ, rx_ring->cq_id); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to load CQICB.\n"); @@ -224,10 +224,10 @@ static int ql_update_ring_coalescing(struct ql_adapter *qdev) cqicb = (struct cqicb *)rx_ring; cqicb->irq_delay = cpu_to_le16(qdev->rx_coalesce_usecs); cqicb->pkt_delay = - cpu_to_le16(qdev->rx_max_coalesced_frames); + cpu_to_le16(qdev->rx_max_coalesced_frames); cqicb->flags = FLAGS_LI; - status = ql_write_cfg(qdev, cqicb, sizeof(*cqicb), - CFG_LCQ, rx_ring->cq_id); + status = qlge_write_cfg(qdev, cqicb, sizeof(*cqicb), + CFG_LCQ, rx_ring->cq_id); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to load CQICB.\n"); @@ -239,14 +239,14 @@ exit: return status; } -static void ql_update_stats(struct ql_adapter *qdev) +static void qlge_update_stats(struct qlge_adapter *qdev) { u32 i; u64 data; u64 *iter = &qdev->nic_stats.tx_pkts; spin_lock(&qdev->stats_lock); - if (ql_sem_spinlock(qdev, qdev->xg_sem_mask)) { + if (qlge_sem_spinlock(qdev, qdev->xg_sem_mask)) { netif_err(qdev, drv, qdev->ndev, "Couldn't get xgmac sem.\n"); goto quit; @@ -255,7 +255,7 @@ static void ql_update_stats(struct ql_adapter *qdev) * Get TX statistics. */ for (i = 0x200; i < 0x280; i += 8) { - if (ql_read_xgmac_reg64(qdev, i, &data)) { + if (qlge_read_xgmac_reg64(qdev, i, &data)) { netif_err(qdev, drv, qdev->ndev, "Error reading status register 0x%.04x.\n", i); @@ -270,7 +270,7 @@ static void ql_update_stats(struct ql_adapter *qdev) * Get RX statistics. */ for (i = 0x300; i < 0x3d0; i += 8) { - if (ql_read_xgmac_reg64(qdev, i, &data)) { + if (qlge_read_xgmac_reg64(qdev, i, &data)) { netif_err(qdev, drv, qdev->ndev, "Error reading status register 0x%.04x.\n", i); @@ -288,7 +288,7 @@ static void ql_update_stats(struct ql_adapter *qdev) * Get Per-priority TX pause frame counter statistics. */ for (i = 0x500; i < 0x540; i += 8) { - if (ql_read_xgmac_reg64(qdev, i, &data)) { + if (qlge_read_xgmac_reg64(qdev, i, &data)) { netif_err(qdev, drv, qdev->ndev, "Error reading status register 0x%.04x.\n", i); @@ -303,7 +303,7 @@ static void ql_update_stats(struct ql_adapter *qdev) * Get Per-priority RX pause frame counter statistics. */ for (i = 0x568; i < 0x5a8; i += 8) { - if (ql_read_xgmac_reg64(qdev, i, &data)) { + if (qlge_read_xgmac_reg64(qdev, i, &data)) { netif_err(qdev, drv, qdev->ndev, "Error reading status register 0x%.04x.\n", i); @@ -317,7 +317,7 @@ static void ql_update_stats(struct ql_adapter *qdev) /* * Get RX NIC FIFO DROP statistics. */ - if (ql_read_xgmac_reg64(qdev, 0x5b8, &data)) { + if (qlge_read_xgmac_reg64(qdev, 0x5b8, &data)) { netif_err(qdev, drv, qdev->ndev, "Error reading status register 0x%.04x.\n", i); goto end; @@ -325,32 +325,30 @@ static void ql_update_stats(struct ql_adapter *qdev) *iter = data; } end: - ql_sem_unlock(qdev, qdev->xg_sem_mask); + qlge_sem_unlock(qdev, qdev->xg_sem_mask); quit: spin_unlock(&qdev->stats_lock); - - QL_DUMP_STAT(qdev); } -static void ql_get_strings(struct net_device *dev, u32 stringset, u8 *buf) +static void qlge_get_strings(struct net_device *dev, u32 stringset, u8 *buf) { int index; switch (stringset) { case ETH_SS_TEST: - memcpy(buf, *ql_gstrings_test, QLGE_TEST_LEN * ETH_GSTRING_LEN); + memcpy(buf, *qlge_gstrings_test, QLGE_TEST_LEN * ETH_GSTRING_LEN); break; case ETH_SS_STATS: for (index = 0; index < QLGE_STATS_LEN; index++) { memcpy(buf + index * ETH_GSTRING_LEN, - ql_gstrings_stats[index].stat_string, + qlge_gstrings_stats[index].stat_string, ETH_GSTRING_LEN); } break; } } -static int ql_get_sset_count(struct net_device *dev, int sset) +static int qlge_get_sset_count(struct net_device *dev, int sset) { switch (sset) { case ETH_SS_TEST: @@ -363,34 +361,34 @@ static int ql_get_sset_count(struct net_device *dev, int sset) } static void -ql_get_ethtool_stats(struct net_device *ndev, - struct ethtool_stats *stats, u64 *data) +qlge_get_ethtool_stats(struct net_device *ndev, + struct ethtool_stats *stats, u64 *data) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); int index, length; length = QLGE_STATS_LEN; - ql_update_stats(qdev); + qlge_update_stats(qdev); for (index = 0; index < length; index++) { char *p = (char *)qdev + - ql_gstrings_stats[index].stat_offset; - *data++ = (ql_gstrings_stats[index].sizeof_stat == - sizeof(u64)) ? *(u64 *)p : (*(u32 *)p); + qlge_gstrings_stats[index].stat_offset; + *data++ = (qlge_gstrings_stats[index].sizeof_stat == + sizeof(u64)) ? *(u64 *)p : (*(u32 *)p); } } -static int ql_get_link_ksettings(struct net_device *ndev, - struct ethtool_link_ksettings *ecmd) +static int qlge_get_link_ksettings(struct net_device *ndev, + struct ethtool_link_ksettings *ecmd) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); u32 supported, advertising; supported = SUPPORTED_10000baseT_Full; advertising = ADVERTISED_10000baseT_Full; if ((qdev->link_status & STS_LINK_TYPE_MASK) == - STS_LINK_TYPE_10GBASET) { + STS_LINK_TYPE_10GBASET) { supported |= (SUPPORTED_TP | SUPPORTED_Autoneg); advertising |= (ADVERTISED_TP | ADVERTISED_Autoneg); ecmd->base.port = PORT_TP; @@ -412,26 +410,26 @@ static int ql_get_link_ksettings(struct net_device *ndev, return 0; } -static void ql_get_drvinfo(struct net_device *ndev, - struct ethtool_drvinfo *drvinfo) +static void qlge_get_drvinfo(struct net_device *ndev, + struct ethtool_drvinfo *drvinfo) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); - strlcpy(drvinfo->driver, qlge_driver_name, sizeof(drvinfo->driver)); - strlcpy(drvinfo->version, qlge_driver_version, + strscpy(drvinfo->driver, qlge_driver_name, sizeof(drvinfo->driver)); + strscpy(drvinfo->version, qlge_driver_version, sizeof(drvinfo->version)); snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "v%d.%d.%d", (qdev->fw_rev_id & 0x00ff0000) >> 16, (qdev->fw_rev_id & 0x0000ff00) >> 8, (qdev->fw_rev_id & 0x000000ff)); - strlcpy(drvinfo->bus_info, pci_name(qdev->pdev), + strscpy(drvinfo->bus_info, pci_name(qdev->pdev), sizeof(drvinfo->bus_info)); } -static void ql_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) +static void qlge_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); unsigned short ssys_dev = qdev->pdev->subsystem_device; /* WOL is only supported for mezz card. */ @@ -442,9 +440,9 @@ static void ql_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) } } -static int ql_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) +static int qlge_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); unsigned short ssys_dev = qdev->pdev->subsystem_device; /* WOL is only supported for mezz card. */ @@ -462,25 +460,25 @@ static int ql_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) return 0; } -static int ql_set_phys_id(struct net_device *ndev, - enum ethtool_phys_id_state state) +static int qlge_set_phys_id(struct net_device *ndev, + enum ethtool_phys_id_state state) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); switch (state) { case ETHTOOL_ID_ACTIVE: /* Save the current LED settings */ - if (ql_mb_get_led_cfg(qdev)) + if (qlge_mb_get_led_cfg(qdev)) return -EIO; /* Start blinking */ - ql_mb_set_led_cfg(qdev, QL_LED_BLINK); + qlge_mb_set_led_cfg(qdev, QL_LED_BLINK); return 0; case ETHTOOL_ID_INACTIVE: /* Restore LED settings */ - if (ql_mb_set_led_cfg(qdev, qdev->led_config)) + if (qlge_mb_set_led_cfg(qdev, qdev->led_config)) return -EIO; return 0; @@ -489,7 +487,7 @@ static int ql_set_phys_id(struct net_device *ndev, } } -static int ql_start_loopback(struct ql_adapter *qdev) +static int qlge_start_loopback(struct qlge_adapter *qdev) { if (netif_carrier_ok(qdev->ndev)) { set_bit(QL_LB_LINK_UP, &qdev->flags); @@ -498,21 +496,21 @@ static int ql_start_loopback(struct ql_adapter *qdev) clear_bit(QL_LB_LINK_UP, &qdev->flags); } qdev->link_config |= CFG_LOOPBACK_PCS; - return ql_mb_set_port_cfg(qdev); + return qlge_mb_set_port_cfg(qdev); } -static void ql_stop_loopback(struct ql_adapter *qdev) +static void qlge_stop_loopback(struct qlge_adapter *qdev) { qdev->link_config &= ~CFG_LOOPBACK_PCS; - ql_mb_set_port_cfg(qdev); + qlge_mb_set_port_cfg(qdev); if (test_bit(QL_LB_LINK_UP, &qdev->flags)) { netif_carrier_on(qdev->ndev); clear_bit(QL_LB_LINK_UP, &qdev->flags); } } -static void ql_create_lb_frame(struct sk_buff *skb, - unsigned int frame_size) +static void qlge_create_lb_frame(struct sk_buff *skb, + unsigned int frame_size) { memset(skb->data, 0xFF, frame_size); frame_size &= ~1; @@ -521,8 +519,8 @@ static void ql_create_lb_frame(struct sk_buff *skb, skb->data[frame_size / 2 + 12] = (unsigned char)0xAF; } -void ql_check_lb_frame(struct ql_adapter *qdev, - struct sk_buff *skb) +void qlge_check_lb_frame(struct qlge_adapter *qdev, + struct sk_buff *skb) { unsigned int frame_size = skb->len; @@ -534,7 +532,7 @@ void ql_check_lb_frame(struct ql_adapter *qdev, } } -static int ql_run_loopback_test(struct ql_adapter *qdev) +static int qlge_run_loopback_test(struct qlge_adapter *qdev) { int i; netdev_tx_t rc; @@ -548,33 +546,33 @@ static int ql_run_loopback_test(struct ql_adapter *qdev) skb->queue_mapping = 0; skb_put(skb, size); - ql_create_lb_frame(skb, size); - rc = ql_lb_send(skb, qdev->ndev); + qlge_create_lb_frame(skb, size); + rc = qlge_lb_send(skb, qdev->ndev); if (rc != NETDEV_TX_OK) return -EPIPE; atomic_inc(&qdev->lb_count); } /* Give queue time to settle before testing results. */ msleep(2); - ql_clean_lb_rx_ring(&qdev->rx_ring[0], 128); + qlge_clean_lb_rx_ring(&qdev->rx_ring[0], 128); return atomic_read(&qdev->lb_count) ? -EIO : 0; } -static int ql_loopback_test(struct ql_adapter *qdev, u64 *data) +static int qlge_loopback_test(struct qlge_adapter *qdev, u64 *data) { - *data = ql_start_loopback(qdev); + *data = qlge_start_loopback(qdev); if (*data) goto out; - *data = ql_run_loopback_test(qdev); + *data = qlge_run_loopback_test(qdev); out: - ql_stop_loopback(qdev); + qlge_stop_loopback(qdev); return *data; } -static void ql_self_test(struct net_device *ndev, - struct ethtool_test *eth_test, u64 *data) +static void qlge_self_test(struct net_device *ndev, + struct ethtool_test *eth_test, u64 *data) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); memset(data, 0, sizeof(u64) * QLGE_TEST_LEN); @@ -582,7 +580,7 @@ static void ql_self_test(struct net_device *ndev, set_bit(QL_SELFTEST, &qdev->flags); if (eth_test->flags == ETH_TEST_FL_OFFLINE) { /* Offline tests */ - if (ql_loopback_test(qdev, &data[0])) + if (qlge_loopback_test(qdev, &data[0])) eth_test->flags |= ETH_TEST_FL_FAILED; } else { @@ -601,32 +599,31 @@ static void ql_self_test(struct net_device *ndev, } } -static int ql_get_regs_len(struct net_device *ndev) +static int qlge_get_regs_len(struct net_device *ndev) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); if (!test_bit(QL_FRC_COREDUMP, &qdev->flags)) - return sizeof(struct ql_mpi_coredump); + return sizeof(struct qlge_mpi_coredump); else - return sizeof(struct ql_reg_dump); + return sizeof(struct qlge_reg_dump); } -static void ql_get_regs(struct net_device *ndev, - struct ethtool_regs *regs, void *p) +static void qlge_get_regs(struct net_device *ndev, + struct ethtool_regs *regs, void *p) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); - ql_get_dump(qdev, p); - qdev->core_is_dumped = 0; + qlge_get_dump(qdev, p); if (!test_bit(QL_FRC_COREDUMP, &qdev->flags)) - regs->len = sizeof(struct ql_mpi_coredump); + regs->len = sizeof(struct qlge_mpi_coredump); else - regs->len = sizeof(struct ql_reg_dump); + regs->len = sizeof(struct qlge_reg_dump); } -static int ql_get_coalesce(struct net_device *dev, struct ethtool_coalesce *c) +static int qlge_get_coalesce(struct net_device *ndev, struct ethtool_coalesce *c) { - struct ql_adapter *qdev = netdev_priv(dev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); c->rx_coalesce_usecs = qdev->rx_coalesce_usecs; c->tx_coalesce_usecs = qdev->tx_coalesce_usecs; @@ -647,14 +644,14 @@ static int ql_get_coalesce(struct net_device *dev, struct ethtool_coalesce *c) return 0; } -static int ql_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *c) +static int qlge_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *c) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); /* Validate user parameters. */ if (c->rx_coalesce_usecs > qdev->rx_ring_size / 2) return -EINVAL; - /* Don't wait more than 10 usec. */ + /* Don't wait more than 10 usec. */ if (c->rx_max_coalesced_frames > MAX_INTER_FRAME_WAIT) return -EINVAL; if (c->tx_coalesce_usecs > qdev->tx_ring_size / 2) @@ -674,25 +671,25 @@ static int ql_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *c) qdev->rx_max_coalesced_frames = c->rx_max_coalesced_frames; qdev->tx_max_coalesced_frames = c->tx_max_coalesced_frames; - return ql_update_ring_coalescing(qdev); + return qlge_update_ring_coalescing(qdev); } -static void ql_get_pauseparam(struct net_device *netdev, - struct ethtool_pauseparam *pause) +static void qlge_get_pauseparam(struct net_device *ndev, + struct ethtool_pauseparam *pause) { - struct ql_adapter *qdev = netdev_priv(netdev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); - ql_mb_get_port_cfg(qdev); + qlge_mb_get_port_cfg(qdev); if (qdev->link_config & CFG_PAUSE_STD) { pause->rx_pause = 1; pause->tx_pause = 1; } } -static int ql_set_pauseparam(struct net_device *netdev, - struct ethtool_pauseparam *pause) +static int qlge_set_pauseparam(struct net_device *ndev, + struct ethtool_pauseparam *pause) { - struct ql_adapter *qdev = netdev_priv(netdev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); if ((pause->rx_pause) && (pause->tx_pause)) qdev->link_config |= CFG_PAUSE_STD; @@ -701,19 +698,19 @@ static int ql_set_pauseparam(struct net_device *netdev, else return -EINVAL; - return ql_mb_set_port_cfg(qdev); + return qlge_mb_set_port_cfg(qdev); } -static u32 ql_get_msglevel(struct net_device *ndev) +static u32 qlge_get_msglevel(struct net_device *ndev) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); return qdev->msg_enable; } -static void ql_set_msglevel(struct net_device *ndev, u32 value) +static void qlge_set_msglevel(struct net_device *ndev, u32 value) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); qdev->msg_enable = value; } @@ -721,23 +718,23 @@ static void ql_set_msglevel(struct net_device *ndev, u32 value) const struct ethtool_ops qlge_ethtool_ops = { .supported_coalesce_params = ETHTOOL_COALESCE_USECS | ETHTOOL_COALESCE_MAX_FRAMES, - .get_drvinfo = ql_get_drvinfo, - .get_wol = ql_get_wol, - .set_wol = ql_set_wol, - .get_regs_len = ql_get_regs_len, - .get_regs = ql_get_regs, - .get_msglevel = ql_get_msglevel, - .set_msglevel = ql_set_msglevel, + .get_drvinfo = qlge_get_drvinfo, + .get_wol = qlge_get_wol, + .set_wol = qlge_set_wol, + .get_regs_len = qlge_get_regs_len, + .get_regs = qlge_get_regs, + .get_msglevel = qlge_get_msglevel, + .set_msglevel = qlge_set_msglevel, .get_link = ethtool_op_get_link, - .set_phys_id = ql_set_phys_id, - .self_test = ql_self_test, - .get_pauseparam = ql_get_pauseparam, - .set_pauseparam = ql_set_pauseparam, - .get_coalesce = ql_get_coalesce, - .set_coalesce = ql_set_coalesce, - .get_sset_count = ql_get_sset_count, - .get_strings = ql_get_strings, - .get_ethtool_stats = ql_get_ethtool_stats, - .get_link_ksettings = ql_get_link_ksettings, + .set_phys_id = qlge_set_phys_id, + .self_test = qlge_self_test, + .get_pauseparam = qlge_get_pauseparam, + .set_pauseparam = qlge_set_pauseparam, + .get_coalesce = qlge_get_coalesce, + .set_coalesce = qlge_set_coalesce, + .get_sset_count = qlge_get_sset_count, + .get_strings = qlge_get_strings, + .get_ethtool_stats = qlge_get_ethtool_stats, + .get_link_ksettings = qlge_get_link_ksettings, }; diff --git a/drivers/staging/qlge/qlge_main.c b/drivers/staging/qlge/qlge_main.c index e6b7baa12cd6..5516be3af898 100644 --- a/drivers/staging/qlge/qlge_main.c +++ b/drivers/staging/qlge/qlge_main.c @@ -42,6 +42,7 @@ #include <net/ip6_checksum.h> #include "qlge.h" +#include "qlge_devlink.h" char qlge_driver_name[] = DRV_NAME; const char qlge_driver_version[] = DRV_VERSION; @@ -89,16 +90,16 @@ static const struct pci_device_id qlge_pci_tbl[] = { MODULE_DEVICE_TABLE(pci, qlge_pci_tbl); -static int ql_wol(struct ql_adapter *); +static int qlge_wol(struct qlge_adapter *); static void qlge_set_multicast_list(struct net_device *); -static int ql_adapter_down(struct ql_adapter *); -static int ql_adapter_up(struct ql_adapter *); +static int qlge_adapter_down(struct qlge_adapter *); +static int qlge_adapter_up(struct qlge_adapter *); /* This hardware semaphore causes exclusive access to * resources shared between the NIC driver, MPI firmware, * FCOE firmware and the FC driver. */ -static int ql_sem_trylock(struct ql_adapter *qdev, u32 sem_mask) +static int qlge_sem_trylock(struct qlge_adapter *qdev, u32 sem_mask) { u32 sem_bits = 0; @@ -132,26 +133,26 @@ static int ql_sem_trylock(struct ql_adapter *qdev, u32 sem_mask) return -EINVAL; } - ql_write32(qdev, SEM, sem_bits | sem_mask); - return !(ql_read32(qdev, SEM) & sem_bits); + qlge_write32(qdev, SEM, sem_bits | sem_mask); + return !(qlge_read32(qdev, SEM) & sem_bits); } -int ql_sem_spinlock(struct ql_adapter *qdev, u32 sem_mask) +int qlge_sem_spinlock(struct qlge_adapter *qdev, u32 sem_mask) { unsigned int wait_count = 30; do { - if (!ql_sem_trylock(qdev, sem_mask)) + if (!qlge_sem_trylock(qdev, sem_mask)) return 0; udelay(100); } while (--wait_count); return -ETIMEDOUT; } -void ql_sem_unlock(struct ql_adapter *qdev, u32 sem_mask) +void qlge_sem_unlock(struct qlge_adapter *qdev, u32 sem_mask) { - ql_write32(qdev, SEM, sem_mask); - ql_read32(qdev, SEM); /* flush */ + qlge_write32(qdev, SEM, sem_mask); + qlge_read32(qdev, SEM); /* flush */ } /* This function waits for a specific bit to come ready @@ -159,13 +160,13 @@ void ql_sem_unlock(struct ql_adapter *qdev, u32 sem_mask) * process, but is also used in kernel thread API such as * netdev->set_multi, netdev->set_mac_address, netdev->vlan_rx_add_vid. */ -int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 err_bit) +int qlge_wait_reg_rdy(struct qlge_adapter *qdev, u32 reg, u32 bit, u32 err_bit) { u32 temp; int count; for (count = 0; count < UDELAY_COUNT; count++) { - temp = ql_read32(qdev, reg); + temp = qlge_read32(qdev, reg); /* check for errors */ if (temp & err_bit) { @@ -186,13 +187,13 @@ int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 err_bit) /* The CFG register is used to download TX and RX control blocks * to the chip. This function waits for an operation to complete. */ -static int ql_wait_cfg(struct ql_adapter *qdev, u32 bit) +static int qlge_wait_cfg(struct qlge_adapter *qdev, u32 bit) { int count; u32 temp; for (count = 0; count < UDELAY_COUNT; count++) { - temp = ql_read32(qdev, CFG); + temp = qlge_read32(qdev, CFG); if (temp & CFG_LE) return -EIO; if (!(temp & bit)) @@ -205,8 +206,8 @@ static int ql_wait_cfg(struct ql_adapter *qdev, u32 bit) /* Used to issue init control blocks to hw. Maps control block, * sets address, triggers download, waits for completion. */ -int ql_write_cfg(struct ql_adapter *qdev, void *ptr, int size, u32 bit, - u16 q_id) +int qlge_write_cfg(struct qlge_adapter *qdev, void *ptr, int size, u32 bit, + u16 q_id) { u64 map; int status = 0; @@ -225,38 +226,38 @@ int ql_write_cfg(struct ql_adapter *qdev, void *ptr, int size, u32 bit, return -ENOMEM; } - status = ql_sem_spinlock(qdev, SEM_ICB_MASK); + status = qlge_sem_spinlock(qdev, SEM_ICB_MASK); if (status) goto lock_failed; - status = ql_wait_cfg(qdev, bit); + status = qlge_wait_cfg(qdev, bit); if (status) { netif_err(qdev, ifup, qdev->ndev, "Timed out waiting for CFG to come ready.\n"); goto exit; } - ql_write32(qdev, ICB_L, (u32)map); - ql_write32(qdev, ICB_H, (u32)(map >> 32)); + qlge_write32(qdev, ICB_L, (u32)map); + qlge_write32(qdev, ICB_H, (u32)(map >> 32)); mask = CFG_Q_MASK | (bit << 16); value = bit | (q_id << CFG_Q_SHIFT); - ql_write32(qdev, CFG, (mask | value)); + qlge_write32(qdev, CFG, (mask | value)); /* * Wait for the bit to clear after signaling hw. */ - status = ql_wait_cfg(qdev, bit); + status = qlge_wait_cfg(qdev, bit); exit: - ql_sem_unlock(qdev, SEM_ICB_MASK); /* does flush too */ + qlge_sem_unlock(qdev, SEM_ICB_MASK); /* does flush too */ lock_failed: dma_unmap_single(&qdev->pdev->dev, map, size, direction); return status; } /* Get a specific MAC address from the CAM. Used for debug and reg dump. */ -int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index, - u32 *value) +int qlge_get_mac_addr_reg(struct qlge_adapter *qdev, u32 type, u16 index, + u32 *value) { u32 offset = 0; int status; @@ -264,46 +265,46 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index, switch (type) { case MAC_ADDR_TYPE_MULTI_MAC: case MAC_ADDR_TYPE_CAM_MAC: { - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); if (status) break; - ql_write32(qdev, MAC_ADDR_IDX, - (offset++) | /* offset */ + qlge_write32(qdev, MAC_ADDR_IDX, + (offset++) | /* offset */ (index << MAC_ADDR_IDX_SHIFT) | /* index */ MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */ - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MR, 0); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MR, 0); if (status) break; - *value++ = ql_read32(qdev, MAC_ADDR_DATA); - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); + *value++ = qlge_read32(qdev, MAC_ADDR_DATA); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); if (status) break; - ql_write32(qdev, MAC_ADDR_IDX, - (offset++) | /* offset */ + qlge_write32(qdev, MAC_ADDR_IDX, + (offset++) | /* offset */ (index << MAC_ADDR_IDX_SHIFT) | /* index */ MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */ - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MR, 0); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MR, 0); if (status) break; - *value++ = ql_read32(qdev, MAC_ADDR_DATA); + *value++ = qlge_read32(qdev, MAC_ADDR_DATA); if (type == MAC_ADDR_TYPE_CAM_MAC) { - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, - MAC_ADDR_MW, 0); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, + MAC_ADDR_MW, 0); if (status) break; - ql_write32(qdev, MAC_ADDR_IDX, - (offset++) | /* offset */ + qlge_write32(qdev, MAC_ADDR_IDX, + (offset++) | /* offset */ (index << MAC_ADDR_IDX_SHIFT) | /* index */ MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */ - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, - MAC_ADDR_MR, 0); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, + MAC_ADDR_MR, 0); if (status) break; - *value++ = ql_read32(qdev, MAC_ADDR_DATA); + *value++ = qlge_read32(qdev, MAC_ADDR_DATA); } break; } @@ -320,8 +321,8 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index, /* Set up a MAC, multicast or VLAN address for the * inbound frame matching. */ -static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type, - u16 index) +static int qlge_set_mac_addr_reg(struct qlge_adapter *qdev, u8 *addr, u32 type, + u16 index) { u32 offset = 0; int status = 0; @@ -332,22 +333,22 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type, u32 lower = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | (addr[5]); - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); if (status) break; - ql_write32(qdev, MAC_ADDR_IDX, - (offset++) | (index << MAC_ADDR_IDX_SHIFT) | type | + qlge_write32(qdev, MAC_ADDR_IDX, + (offset++) | (index << MAC_ADDR_IDX_SHIFT) | type | MAC_ADDR_E); - ql_write32(qdev, MAC_ADDR_DATA, lower); - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); + qlge_write32(qdev, MAC_ADDR_DATA, lower); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); if (status) break; - ql_write32(qdev, MAC_ADDR_IDX, - (offset++) | (index << MAC_ADDR_IDX_SHIFT) | type | + qlge_write32(qdev, MAC_ADDR_IDX, + (offset++) | (index << MAC_ADDR_IDX_SHIFT) | type | MAC_ADDR_E); - ql_write32(qdev, MAC_ADDR_DATA, upper); - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); + qlge_write32(qdev, MAC_ADDR_DATA, upper); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); break; } case MAC_ADDR_TYPE_CAM_MAC: { @@ -355,27 +356,27 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type, u32 upper = (addr[0] << 8) | addr[1]; u32 lower = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | (addr[5]); - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); if (status) break; - ql_write32(qdev, MAC_ADDR_IDX, - (offset++) | /* offset */ + qlge_write32(qdev, MAC_ADDR_IDX, + (offset++) | /* offset */ (index << MAC_ADDR_IDX_SHIFT) | /* index */ type); /* type */ - ql_write32(qdev, MAC_ADDR_DATA, lower); - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); + qlge_write32(qdev, MAC_ADDR_DATA, lower); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); if (status) break; - ql_write32(qdev, MAC_ADDR_IDX, - (offset++) | /* offset */ + qlge_write32(qdev, MAC_ADDR_IDX, + (offset++) | /* offset */ (index << MAC_ADDR_IDX_SHIFT) | /* index */ type); /* type */ - ql_write32(qdev, MAC_ADDR_DATA, upper); - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); + qlge_write32(qdev, MAC_ADDR_DATA, upper); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); if (status) break; - ql_write32(qdev, MAC_ADDR_IDX, - (offset) | /* offset */ + qlge_write32(qdev, MAC_ADDR_IDX, + (offset) | /* offset */ (index << MAC_ADDR_IDX_SHIFT) | /* index */ type); /* type */ /* This field should also include the queue id @@ -388,7 +389,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type, if (qdev->ndev->features & NETIF_F_HW_VLAN_CTAG_RX) cam_output |= CAM_OUT_RV; /* route to NIC core */ - ql_write32(qdev, MAC_ADDR_DATA, cam_output); + qlge_write32(qdev, MAC_ADDR_DATA, cam_output); break; } case MAC_ADDR_TYPE_VLAN: { @@ -398,11 +399,11 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type, * addressing. It's either MAC_ADDR_E on or off. * That's bit-27 we're talking about. */ - status = ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); + status = qlge_wait_reg_rdy(qdev, MAC_ADDR_IDX, MAC_ADDR_MW, 0); if (status) break; - ql_write32(qdev, MAC_ADDR_IDX, - offset | /* offset */ + qlge_write32(qdev, MAC_ADDR_IDX, + offset | /* offset */ (index << MAC_ADDR_IDX_SHIFT) | /* index */ type | /* type */ enable_bit); /* enable/disable */ @@ -421,7 +422,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type, * have to clear it to prevent wrong frame routing * especially in a bonding environment. */ -static int ql_set_mac_addr(struct ql_adapter *qdev, int set) +static int qlge_set_mac_addr(struct qlge_adapter *qdev, int set) { int status; char zero_mac_addr[ETH_ALEN]; @@ -437,50 +438,50 @@ static int ql_set_mac_addr(struct ql_adapter *qdev, int set) netif_printk(qdev, ifup, KERN_DEBUG, qdev->ndev, "Clearing MAC address\n"); } - status = ql_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); + status = qlge_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); if (status) return status; - status = ql_set_mac_addr_reg(qdev, (u8 *)addr, - MAC_ADDR_TYPE_CAM_MAC, - qdev->func * MAX_CQ); - ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK); + status = qlge_set_mac_addr_reg(qdev, (u8 *)addr, + MAC_ADDR_TYPE_CAM_MAC, + qdev->func * MAX_CQ); + qlge_sem_unlock(qdev, SEM_MAC_ADDR_MASK); if (status) netif_err(qdev, ifup, qdev->ndev, "Failed to init mac address.\n"); return status; } -void ql_link_on(struct ql_adapter *qdev) +void qlge_link_on(struct qlge_adapter *qdev) { netif_err(qdev, link, qdev->ndev, "Link is up.\n"); netif_carrier_on(qdev->ndev); - ql_set_mac_addr(qdev, 1); + qlge_set_mac_addr(qdev, 1); } -void ql_link_off(struct ql_adapter *qdev) +void qlge_link_off(struct qlge_adapter *qdev) { netif_err(qdev, link, qdev->ndev, "Link is down.\n"); netif_carrier_off(qdev->ndev); - ql_set_mac_addr(qdev, 0); + qlge_set_mac_addr(qdev, 0); } /* Get a specific frame routing value from the CAM. * Used for debug and reg dump. */ -int ql_get_routing_reg(struct ql_adapter *qdev, u32 index, u32 *value) +int qlge_get_routing_reg(struct qlge_adapter *qdev, u32 index, u32 *value) { int status = 0; - status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, 0); + status = qlge_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, 0); if (status) goto exit; - ql_write32(qdev, RT_IDX, - RT_IDX_TYPE_NICQ | RT_IDX_RS | (index << RT_IDX_IDX_SHIFT)); - status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MR, 0); + qlge_write32(qdev, RT_IDX, + RT_IDX_TYPE_NICQ | RT_IDX_RS | (index << RT_IDX_IDX_SHIFT)); + status = qlge_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MR, 0); if (status) goto exit; - *value = ql_read32(qdev, RT_DATA); + *value = qlge_read32(qdev, RT_DATA); exit: return status; } @@ -490,8 +491,8 @@ exit: * multicast/error frames to the default queue for slow handling, * and CAM hit/RSS frames to the fast handling queues. */ -static int ql_set_routing_reg(struct ql_adapter *qdev, u32 index, u32 mask, - int enable) +static int qlge_set_routing_reg(struct qlge_adapter *qdev, u32 index, u32 mask, + int enable) { int status = -EINVAL; /* Return error if no mask match. */ u32 value = 0; @@ -577,50 +578,50 @@ static int ql_set_routing_reg(struct ql_adapter *qdev, u32 index, u32 mask, } if (value) { - status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, 0); + status = qlge_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, 0); if (status) goto exit; value |= (enable ? RT_IDX_E : 0); - ql_write32(qdev, RT_IDX, value); - ql_write32(qdev, RT_DATA, enable ? mask : 0); + qlge_write32(qdev, RT_IDX, value); + qlge_write32(qdev, RT_DATA, enable ? mask : 0); } exit: return status; } -static void ql_enable_interrupts(struct ql_adapter *qdev) +static void qlge_enable_interrupts(struct qlge_adapter *qdev) { - ql_write32(qdev, INTR_EN, (INTR_EN_EI << 16) | INTR_EN_EI); + qlge_write32(qdev, INTR_EN, (INTR_EN_EI << 16) | INTR_EN_EI); } -static void ql_disable_interrupts(struct ql_adapter *qdev) +static void qlge_disable_interrupts(struct qlge_adapter *qdev) { - ql_write32(qdev, INTR_EN, (INTR_EN_EI << 16)); + qlge_write32(qdev, INTR_EN, (INTR_EN_EI << 16)); } -static void ql_enable_completion_interrupt(struct ql_adapter *qdev, u32 intr) +static void qlge_enable_completion_interrupt(struct qlge_adapter *qdev, u32 intr) { struct intr_context *ctx = &qdev->intr_context[intr]; - ql_write32(qdev, INTR_EN, ctx->intr_en_mask); + qlge_write32(qdev, INTR_EN, ctx->intr_en_mask); } -static void ql_disable_completion_interrupt(struct ql_adapter *qdev, u32 intr) +static void qlge_disable_completion_interrupt(struct qlge_adapter *qdev, u32 intr) { struct intr_context *ctx = &qdev->intr_context[intr]; - ql_write32(qdev, INTR_EN, ctx->intr_dis_mask); + qlge_write32(qdev, INTR_EN, ctx->intr_dis_mask); } -static void ql_enable_all_completion_interrupts(struct ql_adapter *qdev) +static void qlge_enable_all_completion_interrupts(struct qlge_adapter *qdev) { int i; for (i = 0; i < qdev->intr_count; i++) - ql_enable_completion_interrupt(qdev, i); + qlge_enable_completion_interrupt(qdev, i); } -static int ql_validate_flash(struct ql_adapter *qdev, u32 size, const char *str) +static int qlge_validate_flash(struct qlge_adapter *qdev, u32 size, const char *str) { int status, i; u16 csum = 0; @@ -642,31 +643,31 @@ static int ql_validate_flash(struct ql_adapter *qdev, u32 size, const char *str) return csum; } -static int ql_read_flash_word(struct ql_adapter *qdev, int offset, __le32 *data) +static int qlge_read_flash_word(struct qlge_adapter *qdev, int offset, __le32 *data) { int status = 0; /* wait for reg to come ready */ - status = ql_wait_reg_rdy(qdev, - FLASH_ADDR, FLASH_ADDR_RDY, FLASH_ADDR_ERR); + status = qlge_wait_reg_rdy(qdev, + FLASH_ADDR, FLASH_ADDR_RDY, FLASH_ADDR_ERR); if (status) goto exit; /* set up for reg read */ - ql_write32(qdev, FLASH_ADDR, FLASH_ADDR_R | offset); + qlge_write32(qdev, FLASH_ADDR, FLASH_ADDR_R | offset); /* wait for reg to come ready */ - status = ql_wait_reg_rdy(qdev, - FLASH_ADDR, FLASH_ADDR_RDY, FLASH_ADDR_ERR); + status = qlge_wait_reg_rdy(qdev, + FLASH_ADDR, FLASH_ADDR_RDY, FLASH_ADDR_ERR); if (status) goto exit; /* This data is stored on flash as an array of - * __le32. Since ql_read32() returns cpu endian + * __le32. Since qlge_read32() returns cpu endian * we need to swap it back. */ - *data = cpu_to_le32(ql_read32(qdev, FLASH_DATA)); + *data = cpu_to_le32(qlge_read32(qdev, FLASH_DATA)); exit: return status; } -static int ql_get_8000_flash_params(struct ql_adapter *qdev) +static int qlge_get_8000_flash_params(struct qlge_adapter *qdev) { u32 i, size; int status; @@ -682,12 +683,12 @@ static int ql_get_8000_flash_params(struct ql_adapter *qdev) else offset = FUNC1_FLASH_OFFSET / sizeof(u32); - if (ql_sem_spinlock(qdev, SEM_FLASH_MASK)) + if (qlge_sem_spinlock(qdev, SEM_FLASH_MASK)) return -ETIMEDOUT; size = sizeof(struct flash_params_8000) / sizeof(u32); for (i = 0; i < size; i++, p++) { - status = ql_read_flash_word(qdev, i + offset, p); + status = qlge_read_flash_word(qdev, i + offset, p); if (status) { netif_err(qdev, ifup, qdev->ndev, "Error reading flash.\n"); @@ -695,8 +696,8 @@ static int ql_get_8000_flash_params(struct ql_adapter *qdev) } } - status = ql_validate_flash(qdev, - sizeof(struct flash_params_8000) / + status = qlge_validate_flash(qdev, + sizeof(struct flash_params_8000) / sizeof(u16), "8000"); if (status) { @@ -728,11 +729,11 @@ static int ql_get_8000_flash_params(struct ql_adapter *qdev) qdev->ndev->addr_len); exit: - ql_sem_unlock(qdev, SEM_FLASH_MASK); + qlge_sem_unlock(qdev, SEM_FLASH_MASK); return status; } -static int ql_get_8012_flash_params(struct ql_adapter *qdev) +static int qlge_get_8012_flash_params(struct qlge_adapter *qdev) { int i; int status; @@ -746,11 +747,11 @@ static int ql_get_8012_flash_params(struct ql_adapter *qdev) if (qdev->port) offset = size; - if (ql_sem_spinlock(qdev, SEM_FLASH_MASK)) + if (qlge_sem_spinlock(qdev, SEM_FLASH_MASK)) return -ETIMEDOUT; for (i = 0; i < size; i++, p++) { - status = ql_read_flash_word(qdev, i + offset, p); + status = qlge_read_flash_word(qdev, i + offset, p); if (status) { netif_err(qdev, ifup, qdev->ndev, "Error reading flash.\n"); @@ -758,10 +759,10 @@ static int ql_get_8012_flash_params(struct ql_adapter *qdev) } } - status = ql_validate_flash(qdev, - sizeof(struct flash_params_8012) / - sizeof(u16), - "8012"); + status = qlge_validate_flash(qdev, + sizeof(struct flash_params_8012) / + sizeof(u16), + "8012"); if (status) { netif_err(qdev, ifup, qdev->ndev, "Invalid flash.\n"); status = -EINVAL; @@ -778,7 +779,7 @@ static int ql_get_8012_flash_params(struct ql_adapter *qdev) qdev->ndev->addr_len); exit: - ql_sem_unlock(qdev, SEM_FLASH_MASK); + qlge_sem_unlock(qdev, SEM_FLASH_MASK); return status; } @@ -786,18 +787,18 @@ exit: * register pair. Each read/write requires us to wait for the ready * bit before reading/writing the data. */ -static int ql_write_xgmac_reg(struct ql_adapter *qdev, u32 reg, u32 data) +static int qlge_write_xgmac_reg(struct qlge_adapter *qdev, u32 reg, u32 data) { int status; /* wait for reg to come ready */ - status = ql_wait_reg_rdy(qdev, - XGMAC_ADDR, XGMAC_ADDR_RDY, XGMAC_ADDR_XME); + status = qlge_wait_reg_rdy(qdev, + XGMAC_ADDR, XGMAC_ADDR_RDY, XGMAC_ADDR_XME); if (status) return status; /* write the data to the data reg */ - ql_write32(qdev, XGMAC_DATA, data); + qlge_write32(qdev, XGMAC_DATA, data); /* trigger the write */ - ql_write32(qdev, XGMAC_ADDR, reg); + qlge_write32(qdev, XGMAC_ADDR, reg); return status; } @@ -805,39 +806,39 @@ static int ql_write_xgmac_reg(struct ql_adapter *qdev, u32 reg, u32 data) * register pair. Each read/write requires us to wait for the ready * bit before reading/writing the data. */ -int ql_read_xgmac_reg(struct ql_adapter *qdev, u32 reg, u32 *data) +int qlge_read_xgmac_reg(struct qlge_adapter *qdev, u32 reg, u32 *data) { int status = 0; /* wait for reg to come ready */ - status = ql_wait_reg_rdy(qdev, - XGMAC_ADDR, XGMAC_ADDR_RDY, XGMAC_ADDR_XME); + status = qlge_wait_reg_rdy(qdev, + XGMAC_ADDR, XGMAC_ADDR_RDY, XGMAC_ADDR_XME); if (status) goto exit; /* set up for reg read */ - ql_write32(qdev, XGMAC_ADDR, reg | XGMAC_ADDR_R); + qlge_write32(qdev, XGMAC_ADDR, reg | XGMAC_ADDR_R); /* wait for reg to come ready */ - status = ql_wait_reg_rdy(qdev, - XGMAC_ADDR, XGMAC_ADDR_RDY, XGMAC_ADDR_XME); + status = qlge_wait_reg_rdy(qdev, + XGMAC_ADDR, XGMAC_ADDR_RDY, XGMAC_ADDR_XME); if (status) goto exit; /* get the data */ - *data = ql_read32(qdev, XGMAC_DATA); + *data = qlge_read32(qdev, XGMAC_DATA); exit: return status; } /* This is used for reading the 64-bit statistics regs. */ -int ql_read_xgmac_reg64(struct ql_adapter *qdev, u32 reg, u64 *data) +int qlge_read_xgmac_reg64(struct qlge_adapter *qdev, u32 reg, u64 *data) { int status = 0; u32 hi = 0; u32 lo = 0; - status = ql_read_xgmac_reg(qdev, reg, &lo); + status = qlge_read_xgmac_reg(qdev, reg, &lo); if (status) goto exit; - status = ql_read_xgmac_reg(qdev, reg + 4, &hi); + status = qlge_read_xgmac_reg(qdev, reg + 4, &hi); if (status) goto exit; @@ -847,17 +848,17 @@ exit: return status; } -static int ql_8000_port_initialize(struct ql_adapter *qdev) +static int qlge_8000_port_initialize(struct qlge_adapter *qdev) { int status; /* * Get MPI firmware version for driver banner * and ethool info. */ - status = ql_mb_about_fw(qdev); + status = qlge_mb_about_fw(qdev); if (status) goto exit; - status = ql_mb_get_fw_state(qdev); + status = qlge_mb_get_fw_state(qdev); if (status) goto exit; /* Wake up a worker to get/set the TX/RX frame sizes. */ @@ -872,18 +873,18 @@ exit: * This functionality may be done in the MPI firmware at a * later date. */ -static int ql_8012_port_initialize(struct ql_adapter *qdev) +static int qlge_8012_port_initialize(struct qlge_adapter *qdev) { int status = 0; u32 data; - if (ql_sem_trylock(qdev, qdev->xg_sem_mask)) { + if (qlge_sem_trylock(qdev, qdev->xg_sem_mask)) { /* Another function has the semaphore, so * wait for the port init bit to come ready. */ netif_info(qdev, link, qdev->ndev, "Another function has the semaphore, so wait for the port init bit to come ready.\n"); - status = ql_wait_reg_rdy(qdev, STS, qdev->port_init, 0); + status = qlge_wait_reg_rdy(qdev, STS, qdev->port_init, 0); if (status) { netif_crit(qdev, link, qdev->ndev, "Port initialize timed out.\n"); @@ -893,11 +894,11 @@ static int ql_8012_port_initialize(struct ql_adapter *qdev) netif_info(qdev, link, qdev->ndev, "Got xgmac semaphore!.\n"); /* Set the core reset. */ - status = ql_read_xgmac_reg(qdev, GLOBAL_CFG, &data); + status = qlge_read_xgmac_reg(qdev, GLOBAL_CFG, &data); if (status) goto end; data |= GLOBAL_CFG_RESET; - status = ql_write_xgmac_reg(qdev, GLOBAL_CFG, data); + status = qlge_write_xgmac_reg(qdev, GLOBAL_CFG, data); if (status) goto end; @@ -906,48 +907,48 @@ static int ql_8012_port_initialize(struct ql_adapter *qdev) data |= GLOBAL_CFG_JUMBO; /* Turn on jumbo. */ data |= GLOBAL_CFG_TX_STAT_EN; data |= GLOBAL_CFG_RX_STAT_EN; - status = ql_write_xgmac_reg(qdev, GLOBAL_CFG, data); + status = qlge_write_xgmac_reg(qdev, GLOBAL_CFG, data); if (status) goto end; /* Enable transmitter, and clear it's reset. */ - status = ql_read_xgmac_reg(qdev, TX_CFG, &data); + status = qlge_read_xgmac_reg(qdev, TX_CFG, &data); if (status) goto end; data &= ~TX_CFG_RESET; /* Clear the TX MAC reset. */ data |= TX_CFG_EN; /* Enable the transmitter. */ - status = ql_write_xgmac_reg(qdev, TX_CFG, data); + status = qlge_write_xgmac_reg(qdev, TX_CFG, data); if (status) goto end; /* Enable receiver and clear it's reset. */ - status = ql_read_xgmac_reg(qdev, RX_CFG, &data); + status = qlge_read_xgmac_reg(qdev, RX_CFG, &data); if (status) goto end; data &= ~RX_CFG_RESET; /* Clear the RX MAC reset. */ data |= RX_CFG_EN; /* Enable the receiver. */ - status = ql_write_xgmac_reg(qdev, RX_CFG, data); + status = qlge_write_xgmac_reg(qdev, RX_CFG, data); if (status) goto end; /* Turn on jumbo. */ status = - ql_write_xgmac_reg(qdev, MAC_TX_PARAMS, MAC_TX_PARAMS_JUMBO | (0x2580 << 16)); + qlge_write_xgmac_reg(qdev, MAC_TX_PARAMS, MAC_TX_PARAMS_JUMBO | (0x2580 << 16)); if (status) goto end; status = - ql_write_xgmac_reg(qdev, MAC_RX_PARAMS, 0x2580); + qlge_write_xgmac_reg(qdev, MAC_RX_PARAMS, 0x2580); if (status) goto end; /* Signal to the world that the port is enabled. */ - ql_write32(qdev, STS, ((qdev->port_init << 16) | qdev->port_init)); + qlge_write32(qdev, STS, ((qdev->port_init << 16) | qdev->port_init)); end: - ql_sem_unlock(qdev, qdev->xg_sem_mask); + qlge_sem_unlock(qdev, qdev->xg_sem_mask); return status; } -static inline unsigned int ql_lbq_block_size(struct ql_adapter *qdev) +static inline unsigned int qlge_lbq_block_size(struct qlge_adapter *qdev) { return PAGE_SIZE << qdev->lbq_buf_order; } @@ -962,8 +963,8 @@ static struct qlge_bq_desc *qlge_get_curr_buf(struct qlge_bq *bq) return bq_desc; } -static struct qlge_bq_desc *ql_get_curr_lchunk(struct ql_adapter *qdev, - struct rx_ring *rx_ring) +static struct qlge_bq_desc *qlge_get_curr_lchunk(struct qlge_adapter *qdev, + struct rx_ring *rx_ring) { struct qlge_bq_desc *lbq_desc = qlge_get_curr_buf(&rx_ring->lbq); @@ -971,17 +972,17 @@ static struct qlge_bq_desc *ql_get_curr_lchunk(struct ql_adapter *qdev, qdev->lbq_buf_size, DMA_FROM_DEVICE); if ((lbq_desc->p.pg_chunk.offset + qdev->lbq_buf_size) == - ql_lbq_block_size(qdev)) { + qlge_lbq_block_size(qdev)) { /* last chunk of the master page */ dma_unmap_page(&qdev->pdev->dev, lbq_desc->dma_addr, - ql_lbq_block_size(qdev), DMA_FROM_DEVICE); + qlge_lbq_block_size(qdev), DMA_FROM_DEVICE); } return lbq_desc; } /* Update an rx ring index. */ -static void ql_update_cq(struct rx_ring *rx_ring) +static void qlge_update_cq(struct rx_ring *rx_ring) { rx_ring->cnsmr_idx++; rx_ring->curr_entry++; @@ -991,9 +992,9 @@ static void ql_update_cq(struct rx_ring *rx_ring) } } -static void ql_write_cq_idx(struct rx_ring *rx_ring) +static void qlge_write_cq_idx(struct rx_ring *rx_ring) { - ql_write_db_reg(rx_ring->cnsmr_idx, rx_ring->cnsmr_idx_db_reg); + qlge_write_db_reg(rx_ring->cnsmr_idx, rx_ring->cnsmr_idx_db_reg); } static const char * const bq_type_name[] = { @@ -1005,7 +1006,7 @@ static const char * const bq_type_name[] = { static int qlge_refill_sb(struct rx_ring *rx_ring, struct qlge_bq_desc *sbq_desc, gfp_t gfp) { - struct ql_adapter *qdev = rx_ring->qdev; + struct qlge_adapter *qdev = rx_ring->qdev; struct sk_buff *skb; if (sbq_desc->p.skb) @@ -1038,7 +1039,7 @@ static int qlge_refill_sb(struct rx_ring *rx_ring, static int qlge_refill_lb(struct rx_ring *rx_ring, struct qlge_bq_desc *lbq_desc, gfp_t gfp) { - struct ql_adapter *qdev = rx_ring->qdev; + struct qlge_adapter *qdev = rx_ring->qdev; struct qlge_page_chunk *master_chunk = &rx_ring->master_chunk; if (!master_chunk->page) { @@ -1049,7 +1050,7 @@ static int qlge_refill_lb(struct rx_ring *rx_ring, if (unlikely(!page)) return -ENOMEM; dma_addr = dma_map_page(&qdev->pdev->dev, page, 0, - ql_lbq_block_size(qdev), + qlge_lbq_block_size(qdev), DMA_FROM_DEVICE); if (dma_mapping_error(&qdev->pdev->dev, dma_addr)) { __free_pages(page, qdev->lbq_buf_order); @@ -1072,7 +1073,7 @@ static int qlge_refill_lb(struct rx_ring *rx_ring, * buffer get. */ master_chunk->offset += qdev->lbq_buf_size; - if (master_chunk->offset == ql_lbq_block_size(qdev)) { + if (master_chunk->offset == qlge_lbq_block_size(qdev)) { master_chunk->page = NULL; } else { master_chunk->va += qdev->lbq_buf_size; @@ -1086,7 +1087,7 @@ static int qlge_refill_lb(struct rx_ring *rx_ring, static int qlge_refill_bq(struct qlge_bq *bq, gfp_t gfp) { struct rx_ring *rx_ring = QLGE_BQ_CONTAINER(bq); - struct ql_adapter *qdev = rx_ring->qdev; + struct qlge_adapter *qdev = rx_ring->qdev; struct qlge_bq_desc *bq_desc; int refill_count; int retval; @@ -1132,7 +1133,7 @@ static int qlge_refill_bq(struct qlge_bq *bq, gfp_t gfp) "ring %u %s: updating prod idx = %d.\n", rx_ring->cq_id, bq_type_name[bq->type], i); - ql_write_db_reg(i, bq->prod_idx_db_reg); + qlge_write_db_reg(i, bq->prod_idx_db_reg); } bq->next_to_use = i; } @@ -1140,8 +1141,8 @@ static int qlge_refill_bq(struct qlge_bq *bq, gfp_t gfp) return retval; } -static void ql_update_buffer_queues(struct rx_ring *rx_ring, gfp_t gfp, - unsigned long delay) +static void qlge_update_buffer_queues(struct rx_ring *rx_ring, gfp_t gfp, + unsigned long delay) { bool sbq_fail, lbq_fail; @@ -1172,7 +1173,7 @@ static void qlge_slow_refill(struct work_struct *work) struct napi_struct *napi = &rx_ring->napi; napi_disable(napi); - ql_update_buffer_queues(rx_ring, GFP_KERNEL, HZ / 2); + qlge_update_buffer_queues(rx_ring, GFP_KERNEL, HZ / 2); napi_enable(napi); local_bh_disable(); @@ -1187,8 +1188,8 @@ static void qlge_slow_refill(struct work_struct *work) /* Unmaps tx buffers. Can be called from send() if a pci mapping * fails at some stage, or from the interrupt when a tx completes. */ -static void ql_unmap_send(struct ql_adapter *qdev, - struct tx_ring_desc *tx_ring_desc, int mapped) +static void qlge_unmap_send(struct qlge_adapter *qdev, + struct tx_ring_desc *tx_ring_desc, int mapped) { int i; @@ -1229,9 +1230,9 @@ static void ql_unmap_send(struct ql_adapter *qdev, /* Map the buffers for this transmit. This will return * NETDEV_TX_BUSY or NETDEV_TX_OK based on success. */ -static int ql_map_send(struct ql_adapter *qdev, - struct ob_mac_iocb_req *mac_iocb_ptr, - struct sk_buff *skb, struct tx_ring_desc *tx_ring_desc) +static int qlge_map_send(struct qlge_adapter *qdev, + struct qlge_ob_mac_iocb_req *mac_iocb_ptr, + struct sk_buff *skb, struct tx_ring_desc *tx_ring_desc) { int len = skb_headlen(skb); dma_addr_t map; @@ -1294,7 +1295,7 @@ static int ql_map_send(struct ql_adapter *qdev, */ /* Tack on the OAL in the eighth segment of IOCB. */ map = dma_map_single(&qdev->pdev->dev, &tx_ring_desc->oal, - sizeof(struct oal), + sizeof(struct qlge_oal), DMA_TO_DEVICE); err = dma_mapping_error(&qdev->pdev->dev, map); if (err) { @@ -1316,7 +1317,7 @@ static int ql_map_send(struct ql_adapter *qdev, dma_unmap_addr_set(&tx_ring_desc->map[map_idx], mapaddr, map); dma_unmap_len_set(&tx_ring_desc->map[map_idx], maplen, - sizeof(struct oal)); + sizeof(struct qlge_oal)); tbd = (struct tx_buf_desc *)&tx_ring_desc->oal; map_idx++; } @@ -1351,13 +1352,13 @@ map_error: * we pass in the number of frags that mapped successfully * so they can be umapped. */ - ql_unmap_send(qdev, tx_ring_desc, map_idx); + qlge_unmap_send(qdev, tx_ring_desc, map_idx); return NETDEV_TX_BUSY; } /* Categorizing receive firmware frame errors */ -static void ql_categorize_rx_err(struct ql_adapter *qdev, u8 rx_err, - struct rx_ring *rx_ring) +static void qlge_categorize_rx_err(struct qlge_adapter *qdev, u8 rx_err, + struct rx_ring *rx_ring) { struct nic_stats *stats = &qdev->nic_stats; @@ -1389,12 +1390,12 @@ static void ql_categorize_rx_err(struct ql_adapter *qdev, u8 rx_err, } /** - * ql_update_mac_hdr_len - helper routine to update the mac header length + * qlge_update_mac_hdr_len - helper routine to update the mac header length * based on vlan tags if present */ -static void ql_update_mac_hdr_len(struct ql_adapter *qdev, - struct ib_mac_iocb_rsp *ib_mac_rsp, - void *page, size_t *len) +static void qlge_update_mac_hdr_len(struct qlge_adapter *qdev, + struct qlge_ib_mac_iocb_rsp *ib_mac_rsp, + void *page, size_t *len) { u16 *tags; @@ -1412,18 +1413,18 @@ static void ql_update_mac_hdr_len(struct ql_adapter *qdev, } /* Process an inbound completion from an rx ring. */ -static void ql_process_mac_rx_gro_page(struct ql_adapter *qdev, - struct rx_ring *rx_ring, - struct ib_mac_iocb_rsp *ib_mac_rsp, - u32 length, u16 vlan_id) +static void qlge_process_mac_rx_gro_page(struct qlge_adapter *qdev, + struct rx_ring *rx_ring, + struct qlge_ib_mac_iocb_rsp *ib_mac_rsp, + u32 length, u16 vlan_id) { struct sk_buff *skb; - struct qlge_bq_desc *lbq_desc = ql_get_curr_lchunk(qdev, rx_ring); + struct qlge_bq_desc *lbq_desc = qlge_get_curr_lchunk(qdev, rx_ring); struct napi_struct *napi = &rx_ring->napi; /* Frame error, so drop the packet. */ if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) { - ql_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring); + qlge_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring); put_page(lbq_desc->p.pg_chunk.page); return; } @@ -1458,15 +1459,15 @@ static void ql_process_mac_rx_gro_page(struct ql_adapter *qdev, } /* Process an inbound completion from an rx ring. */ -static void ql_process_mac_rx_page(struct ql_adapter *qdev, - struct rx_ring *rx_ring, - struct ib_mac_iocb_rsp *ib_mac_rsp, - u32 length, u16 vlan_id) +static void qlge_process_mac_rx_page(struct qlge_adapter *qdev, + struct rx_ring *rx_ring, + struct qlge_ib_mac_iocb_rsp *ib_mac_rsp, + u32 length, u16 vlan_id) { struct net_device *ndev = qdev->ndev; struct sk_buff *skb = NULL; void *addr; - struct qlge_bq_desc *lbq_desc = ql_get_curr_lchunk(qdev, rx_ring); + struct qlge_bq_desc *lbq_desc = qlge_get_curr_lchunk(qdev, rx_ring); struct napi_struct *napi = &rx_ring->napi; size_t hlen = ETH_HLEN; @@ -1482,12 +1483,12 @@ static void ql_process_mac_rx_page(struct ql_adapter *qdev, /* Frame error, so drop the packet. */ if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) { - ql_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring); + qlge_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring); goto err_out; } /* Update the MAC header length*/ - ql_update_mac_hdr_len(qdev, ib_mac_rsp, addr, &hlen); + qlge_update_mac_hdr_len(qdev, ib_mac_rsp, addr, &hlen); /* The max framesize filter on this chip is set higher than * MTU since FCoE uses 2k frames. @@ -1521,12 +1522,12 @@ static void ql_process_mac_rx_page(struct ql_adapter *qdev, "TCP checksum done!\n"); skb->ip_summed = CHECKSUM_UNNECESSARY; } else if ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) && - (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_V4)) { + (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_V4)) { /* Unfragmented ipv4 UDP frame. */ struct iphdr *iph = (struct iphdr *)((u8 *)addr + hlen); if (!(iph->frag_off & - htons(IP_MF | IP_OFFSET))) { + htons(IP_MF | IP_OFFSET))) { skb->ip_summed = CHECKSUM_UNNECESSARY; netif_printk(qdev, rx_status, KERN_DEBUG, qdev->ndev, @@ -1549,10 +1550,10 @@ err_out: } /* Process an inbound completion from an rx ring. */ -static void ql_process_mac_rx_skb(struct ql_adapter *qdev, - struct rx_ring *rx_ring, - struct ib_mac_iocb_rsp *ib_mac_rsp, - u32 length, u16 vlan_id) +static void qlge_process_mac_rx_skb(struct qlge_adapter *qdev, + struct rx_ring *rx_ring, + struct qlge_ib_mac_iocb_rsp *ib_mac_rsp, + u32 length, u16 vlan_id) { struct qlge_bq_desc *sbq_desc = qlge_get_curr_buf(&rx_ring->sbq); struct net_device *ndev = qdev->ndev; @@ -1576,14 +1577,14 @@ static void ql_process_mac_rx_skb(struct ql_adapter *qdev, /* Frame error, so drop the packet. */ if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) { - ql_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring); + qlge_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring); dev_kfree_skb_any(skb); return; } /* loopback self test for ethtool */ if (test_bit(QL_SELFTEST, &qdev->flags)) { - ql_check_lb_frame(qdev, skb); + qlge_check_lb_frame(qdev, skb); dev_kfree_skb_any(skb); return; } @@ -1628,12 +1629,12 @@ static void ql_process_mac_rx_skb(struct ql_adapter *qdev, "TCP checksum done!\n"); skb->ip_summed = CHECKSUM_UNNECESSARY; } else if ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) && - (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_V4)) { + (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_V4)) { /* Unfragmented ipv4 UDP frame. */ struct iphdr *iph = (struct iphdr *)skb->data; if (!(iph->frag_off & - htons(IP_MF | IP_OFFSET))) { + htons(IP_MF | IP_OFFSET))) { skb->ip_summed = CHECKSUM_UNNECESSARY; netif_printk(qdev, rx_status, KERN_DEBUG, qdev->ndev, @@ -1651,7 +1652,7 @@ static void ql_process_mac_rx_skb(struct ql_adapter *qdev, netif_receive_skb(skb); } -static void ql_realign_skb(struct sk_buff *skb, int len) +static void qlge_realign_skb(struct sk_buff *skb, int len) { void *temp_addr = skb->data; @@ -1669,9 +1670,9 @@ static void ql_realign_skb(struct sk_buff *skb, int len) * completion. It will be rewritten for readability in the near * future, but for not it works well. */ -static struct sk_buff *ql_build_rx_skb(struct ql_adapter *qdev, - struct rx_ring *rx_ring, - struct ib_mac_iocb_rsp *ib_mac_rsp) +static struct sk_buff *qlge_build_rx_skb(struct qlge_adapter *qdev, + struct rx_ring *rx_ring, + struct qlge_ib_mac_iocb_rsp *ib_mac_rsp) { u32 length = le32_to_cpu(ib_mac_rsp->data_len); u32 hdr_len = le32_to_cpu(ib_mac_rsp->hdr_len); @@ -1693,7 +1694,7 @@ static struct sk_buff *ql_build_rx_skb(struct ql_adapter *qdev, dma_unmap_single(&qdev->pdev->dev, sbq_desc->dma_addr, SMALL_BUF_MAP_SIZE, DMA_FROM_DEVICE); skb = sbq_desc->p.skb; - ql_realign_skb(skb, hdr_len); + qlge_realign_skb(skb, hdr_len); skb_put(skb, hdr_len); sbq_desc->p.skb = NULL; } @@ -1731,7 +1732,7 @@ static struct sk_buff *ql_build_rx_skb(struct ql_adapter *qdev, length); sbq_desc = qlge_get_curr_buf(&rx_ring->sbq); skb = sbq_desc->p.skb; - ql_realign_skb(skb, length); + qlge_realign_skb(skb, length); skb_put(skb, length); dma_unmap_single(&qdev->pdev->dev, sbq_desc->dma_addr, SMALL_BUF_MAP_SIZE, @@ -1748,7 +1749,7 @@ static struct sk_buff *ql_build_rx_skb(struct ql_adapter *qdev, * chain it to the header buffer's skb and let * it rip. */ - lbq_desc = ql_get_curr_lchunk(qdev, rx_ring); + lbq_desc = qlge_get_curr_lchunk(qdev, rx_ring); netif_printk(qdev, rx_status, KERN_DEBUG, qdev->ndev, "Chaining page at offset = %d, for %d bytes to skb.\n", lbq_desc->p.pg_chunk.offset, length); @@ -1763,7 +1764,7 @@ static struct sk_buff *ql_build_rx_skb(struct ql_adapter *qdev, * copy it to a new skb and let it go. This can happen with * jumbo mtu on a non-TCP/UDP frame. */ - lbq_desc = ql_get_curr_lchunk(qdev, rx_ring); + lbq_desc = qlge_get_curr_lchunk(qdev, rx_ring); skb = netdev_alloc_skb(qdev->ndev, length); if (!skb) { netif_printk(qdev, probe, KERN_DEBUG, qdev->ndev, @@ -1783,9 +1784,9 @@ static struct sk_buff *ql_build_rx_skb(struct ql_adapter *qdev, skb->len += length; skb->data_len += length; skb->truesize += length; - ql_update_mac_hdr_len(qdev, ib_mac_rsp, - lbq_desc->p.pg_chunk.va, - &hlen); + qlge_update_mac_hdr_len(qdev, ib_mac_rsp, + lbq_desc->p.pg_chunk.va, + &hlen); __pskb_pull_tail(skb, hlen); } } else { @@ -1823,7 +1824,7 @@ static struct sk_buff *ql_build_rx_skb(struct ql_adapter *qdev, skb_reserve(skb, NET_IP_ALIGN); } do { - lbq_desc = ql_get_curr_lchunk(qdev, rx_ring); + lbq_desc = qlge_get_curr_lchunk(qdev, rx_ring); size = min(length, qdev->lbq_buf_size); netif_printk(qdev, rx_status, KERN_DEBUG, qdev->ndev, @@ -1838,25 +1839,23 @@ static struct sk_buff *ql_build_rx_skb(struct ql_adapter *qdev, length -= size; i++; } while (length > 0); - ql_update_mac_hdr_len(qdev, ib_mac_rsp, lbq_desc->p.pg_chunk.va, - &hlen); + qlge_update_mac_hdr_len(qdev, ib_mac_rsp, lbq_desc->p.pg_chunk.va, + &hlen); __pskb_pull_tail(skb, hlen); } return skb; } /* Process an inbound completion from an rx ring. */ -static void ql_process_mac_split_rx_intr(struct ql_adapter *qdev, - struct rx_ring *rx_ring, - struct ib_mac_iocb_rsp *ib_mac_rsp, - u16 vlan_id) +static void qlge_process_mac_split_rx_intr(struct qlge_adapter *qdev, + struct rx_ring *rx_ring, + struct qlge_ib_mac_iocb_rsp *ib_mac_rsp, + u16 vlan_id) { struct net_device *ndev = qdev->ndev; struct sk_buff *skb = NULL; - QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp); - - skb = ql_build_rx_skb(qdev, rx_ring, ib_mac_rsp); + skb = qlge_build_rx_skb(qdev, rx_ring, ib_mac_rsp); if (unlikely(!skb)) { netif_printk(qdev, rx_status, KERN_DEBUG, qdev->ndev, "No skb available, drop packet.\n"); @@ -1866,7 +1865,7 @@ static void ql_process_mac_split_rx_intr(struct ql_adapter *qdev, /* Frame error, so drop the packet. */ if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) { - ql_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring); + qlge_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring); dev_kfree_skb_any(skb); return; } @@ -1882,7 +1881,7 @@ static void ql_process_mac_split_rx_intr(struct ql_adapter *qdev, /* loopback self test for ethtool */ if (test_bit(QL_SELFTEST, &qdev->flags)) { - ql_check_lb_frame(qdev, skb); + qlge_check_lb_frame(qdev, skb); dev_kfree_skb_any(skb); return; } @@ -1917,12 +1916,12 @@ static void ql_process_mac_split_rx_intr(struct ql_adapter *qdev, "TCP checksum done!\n"); skb->ip_summed = CHECKSUM_UNNECESSARY; } else if ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) && - (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_V4)) { - /* Unfragmented ipv4 UDP frame. */ + (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_V4)) { + /* Unfragmented ipv4 UDP frame. */ struct iphdr *iph = (struct iphdr *)skb->data; if (!(iph->frag_off & - htons(IP_MF | IP_OFFSET))) { + htons(IP_MF | IP_OFFSET))) { skb->ip_summed = CHECKSUM_UNNECESSARY; netif_printk(qdev, rx_status, KERN_DEBUG, qdev->ndev, "TCP checksum done!\n"); @@ -1942,67 +1941,64 @@ static void ql_process_mac_split_rx_intr(struct ql_adapter *qdev, } /* Process an inbound completion from an rx ring. */ -static unsigned long ql_process_mac_rx_intr(struct ql_adapter *qdev, - struct rx_ring *rx_ring, - struct ib_mac_iocb_rsp *ib_mac_rsp) +static unsigned long qlge_process_mac_rx_intr(struct qlge_adapter *qdev, + struct rx_ring *rx_ring, + struct qlge_ib_mac_iocb_rsp *ib_mac_rsp) { u32 length = le32_to_cpu(ib_mac_rsp->data_len); u16 vlan_id = ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V) && - (qdev->ndev->features & NETIF_F_HW_VLAN_CTAG_RX)) ? - ((le16_to_cpu(ib_mac_rsp->vlan_id) & - IB_MAC_IOCB_RSP_VLAN_MASK)) : 0xffff; - - QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp); + (qdev->ndev->features & NETIF_F_HW_VLAN_CTAG_RX)) ? + ((le16_to_cpu(ib_mac_rsp->vlan_id) & + IB_MAC_IOCB_RSP_VLAN_MASK)) : 0xffff; if (ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV) { /* The data and headers are split into * separate buffers. */ - ql_process_mac_split_rx_intr(qdev, rx_ring, ib_mac_rsp, - vlan_id); + qlge_process_mac_split_rx_intr(qdev, rx_ring, ib_mac_rsp, + vlan_id); } else if (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_DS) { /* The data fit in a single small buffer. * Allocate a new skb, copy the data and * return the buffer to the free pool. */ - ql_process_mac_rx_skb(qdev, rx_ring, ib_mac_rsp, length, - vlan_id); + qlge_process_mac_rx_skb(qdev, rx_ring, ib_mac_rsp, length, + vlan_id); } else if ((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_DL) && - !(ib_mac_rsp->flags1 & IB_MAC_CSUM_ERR_MASK) && - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T)) { + !(ib_mac_rsp->flags1 & IB_MAC_CSUM_ERR_MASK) && + (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T)) { /* TCP packet in a page chunk that's been checksummed. * Tack it on to our GRO skb and let it go. */ - ql_process_mac_rx_gro_page(qdev, rx_ring, ib_mac_rsp, length, - vlan_id); + qlge_process_mac_rx_gro_page(qdev, rx_ring, ib_mac_rsp, length, + vlan_id); } else if (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_DL) { /* Non-TCP packet in a page chunk. Allocate an * skb, tack it on frags, and send it up. */ - ql_process_mac_rx_page(qdev, rx_ring, ib_mac_rsp, length, - vlan_id); + qlge_process_mac_rx_page(qdev, rx_ring, ib_mac_rsp, length, + vlan_id); } else { /* Non-TCP/UDP large frames that span multiple buffers * can be processed corrrectly by the split frame logic. */ - ql_process_mac_split_rx_intr(qdev, rx_ring, ib_mac_rsp, - vlan_id); + qlge_process_mac_split_rx_intr(qdev, rx_ring, ib_mac_rsp, + vlan_id); } return (unsigned long)length; } /* Process an outbound completion from an rx ring. */ -static void ql_process_mac_tx_intr(struct ql_adapter *qdev, - struct ob_mac_iocb_rsp *mac_rsp) +static void qlge_process_mac_tx_intr(struct qlge_adapter *qdev, + struct qlge_ob_mac_iocb_rsp *mac_rsp) { struct tx_ring *tx_ring; struct tx_ring_desc *tx_ring_desc; - QL_DUMP_OB_MAC_RSP(qdev, mac_rsp); tx_ring = &qdev->tx_ring[mac_rsp->txq_idx]; tx_ring_desc = &tx_ring->q[mac_rsp->tid]; - ql_unmap_send(qdev, tx_ring_desc, tx_ring_desc->map_cnt); + qlge_unmap_send(qdev, tx_ring_desc, tx_ring_desc->map_cnt); tx_ring->tx_bytes += (tx_ring_desc->skb)->len; tx_ring->tx_packets++; dev_kfree_skb(tx_ring_desc->skb); @@ -2033,16 +2029,16 @@ static void ql_process_mac_tx_intr(struct ql_adapter *qdev, } /* Fire up a handler to reset the MPI processor. */ -void ql_queue_fw_error(struct ql_adapter *qdev) +void qlge_queue_fw_error(struct qlge_adapter *qdev) { - ql_link_off(qdev); + qlge_link_off(qdev); queue_delayed_work(qdev->workqueue, &qdev->mpi_reset_work, 0); } -void ql_queue_asic_error(struct ql_adapter *qdev) +void qlge_queue_asic_error(struct qlge_adapter *qdev) { - ql_link_off(qdev); - ql_disable_interrupts(qdev); + qlge_link_off(qdev); + qlge_disable_interrupts(qdev); /* Clear adapter up bit to signal the recovery * process that it shouldn't kill the reset worker * thread @@ -2055,47 +2051,47 @@ void ql_queue_asic_error(struct ql_adapter *qdev) queue_delayed_work(qdev->workqueue, &qdev->asic_reset_work, 0); } -static void ql_process_chip_ae_intr(struct ql_adapter *qdev, - struct ib_ae_iocb_rsp *ib_ae_rsp) +static void qlge_process_chip_ae_intr(struct qlge_adapter *qdev, + struct qlge_ib_ae_iocb_rsp *ib_ae_rsp) { switch (ib_ae_rsp->event) { case MGMT_ERR_EVENT: netif_err(qdev, rx_err, qdev->ndev, "Management Processor Fatal Error.\n"); - ql_queue_fw_error(qdev); + qlge_queue_fw_error(qdev); return; case CAM_LOOKUP_ERR_EVENT: netdev_err(qdev->ndev, "Multiple CAM hits lookup occurred.\n"); netdev_err(qdev->ndev, "This event shouldn't occur.\n"); - ql_queue_asic_error(qdev); + qlge_queue_asic_error(qdev); return; case SOFT_ECC_ERROR_EVENT: netdev_err(qdev->ndev, "Soft ECC error detected.\n"); - ql_queue_asic_error(qdev); + qlge_queue_asic_error(qdev); break; case PCI_ERR_ANON_BUF_RD: netdev_err(qdev->ndev, "PCI error occurred when reading anonymous buffers from rx_ring %d.\n", ib_ae_rsp->q_id); - ql_queue_asic_error(qdev); + qlge_queue_asic_error(qdev); break; default: netif_err(qdev, drv, qdev->ndev, "Unexpected event %d.\n", ib_ae_rsp->event); - ql_queue_asic_error(qdev); + qlge_queue_asic_error(qdev); break; } } -static int ql_clean_outbound_rx_ring(struct rx_ring *rx_ring) +static int qlge_clean_outbound_rx_ring(struct rx_ring *rx_ring) { - struct ql_adapter *qdev = rx_ring->qdev; - u32 prod = ql_read_sh_reg(rx_ring->prod_idx_sh_reg); - struct ob_mac_iocb_rsp *net_rsp = NULL; + struct qlge_adapter *qdev = rx_ring->qdev; + u32 prod = qlge_read_sh_reg(rx_ring->prod_idx_sh_reg); + struct qlge_ob_mac_iocb_rsp *net_rsp = NULL; int count = 0; struct tx_ring *tx_ring; @@ -2105,12 +2101,12 @@ static int ql_clean_outbound_rx_ring(struct rx_ring *rx_ring) "cq_id = %d, prod = %d, cnsmr = %d\n", rx_ring->cq_id, prod, rx_ring->cnsmr_idx); - net_rsp = (struct ob_mac_iocb_rsp *)rx_ring->curr_entry; + net_rsp = (struct qlge_ob_mac_iocb_rsp *)rx_ring->curr_entry; rmb(); switch (net_rsp->opcode) { case OPCODE_OB_MAC_TSO_IOCB: case OPCODE_OB_MAC_IOCB: - ql_process_mac_tx_intr(qdev, net_rsp); + qlge_process_mac_tx_intr(qdev, net_rsp); break; default: netif_printk(qdev, rx_status, KERN_DEBUG, qdev->ndev, @@ -2118,12 +2114,12 @@ static int ql_clean_outbound_rx_ring(struct rx_ring *rx_ring) net_rsp->opcode); } count++; - ql_update_cq(rx_ring); - prod = ql_read_sh_reg(rx_ring->prod_idx_sh_reg); + qlge_update_cq(rx_ring); + prod = qlge_read_sh_reg(rx_ring->prod_idx_sh_reg); } if (!net_rsp) return 0; - ql_write_cq_idx(rx_ring); + qlge_write_cq_idx(rx_ring); tx_ring = &qdev->tx_ring[net_rsp->txq_idx]; if (__netif_subqueue_stopped(qdev->ndev, tx_ring->wq_id)) { if ((atomic_read(&tx_ring->tx_count) > (tx_ring->wq_len / 4))) @@ -2137,11 +2133,11 @@ static int ql_clean_outbound_rx_ring(struct rx_ring *rx_ring) return count; } -static int ql_clean_inbound_rx_ring(struct rx_ring *rx_ring, int budget) +static int qlge_clean_inbound_rx_ring(struct rx_ring *rx_ring, int budget) { - struct ql_adapter *qdev = rx_ring->qdev; - u32 prod = ql_read_sh_reg(rx_ring->prod_idx_sh_reg); - struct ql_net_rsp_iocb *net_rsp; + struct qlge_adapter *qdev = rx_ring->qdev; + u32 prod = qlge_read_sh_reg(rx_ring->prod_idx_sh_reg); + struct qlge_net_rsp_iocb *net_rsp; int count = 0; /* While there are entries in the completion queue. */ @@ -2154,14 +2150,14 @@ static int ql_clean_inbound_rx_ring(struct rx_ring *rx_ring, int budget) rmb(); switch (net_rsp->opcode) { case OPCODE_IB_MAC_IOCB: - ql_process_mac_rx_intr(qdev, rx_ring, - (struct ib_mac_iocb_rsp *) - net_rsp); + qlge_process_mac_rx_intr(qdev, rx_ring, + (struct qlge_ib_mac_iocb_rsp *) + net_rsp); break; case OPCODE_IB_AE_IOCB: - ql_process_chip_ae_intr(qdev, (struct ib_ae_iocb_rsp *) - net_rsp); + qlge_process_chip_ae_intr(qdev, (struct qlge_ib_ae_iocb_rsp *) + net_rsp); break; default: netif_printk(qdev, rx_status, KERN_DEBUG, qdev->ndev, @@ -2170,20 +2166,20 @@ static int ql_clean_inbound_rx_ring(struct rx_ring *rx_ring, int budget) break; } count++; - ql_update_cq(rx_ring); - prod = ql_read_sh_reg(rx_ring->prod_idx_sh_reg); + qlge_update_cq(rx_ring); + prod = qlge_read_sh_reg(rx_ring->prod_idx_sh_reg); if (count == budget) break; } - ql_update_buffer_queues(rx_ring, GFP_ATOMIC, 0); - ql_write_cq_idx(rx_ring); + qlge_update_buffer_queues(rx_ring, GFP_ATOMIC, 0); + qlge_write_cq_idx(rx_ring); return count; } -static int ql_napi_poll_msix(struct napi_struct *napi, int budget) +static int qlge_napi_poll_msix(struct napi_struct *napi, int budget) { struct rx_ring *rx_ring = container_of(napi, struct rx_ring, napi); - struct ql_adapter *qdev = rx_ring->qdev; + struct qlge_adapter *qdev = rx_ring->qdev; struct rx_ring *trx_ring; int i, work_done = 0; struct intr_context *ctx = &qdev->intr_context[rx_ring->cq_id]; @@ -2200,42 +2196,42 @@ static int ql_napi_poll_msix(struct napi_struct *napi, int budget) * it's not empty then service it. */ if ((ctx->irq_mask & (1 << trx_ring->cq_id)) && - (ql_read_sh_reg(trx_ring->prod_idx_sh_reg) != + (qlge_read_sh_reg(trx_ring->prod_idx_sh_reg) != trx_ring->cnsmr_idx)) { netif_printk(qdev, intr, KERN_DEBUG, qdev->ndev, "%s: Servicing TX completion ring %d.\n", __func__, trx_ring->cq_id); - ql_clean_outbound_rx_ring(trx_ring); + qlge_clean_outbound_rx_ring(trx_ring); } } /* * Now service the RSS ring if it's active. */ - if (ql_read_sh_reg(rx_ring->prod_idx_sh_reg) != - rx_ring->cnsmr_idx) { + if (qlge_read_sh_reg(rx_ring->prod_idx_sh_reg) != + rx_ring->cnsmr_idx) { netif_printk(qdev, intr, KERN_DEBUG, qdev->ndev, "%s: Servicing RX completion ring %d.\n", __func__, rx_ring->cq_id); - work_done = ql_clean_inbound_rx_ring(rx_ring, budget); + work_done = qlge_clean_inbound_rx_ring(rx_ring, budget); } if (work_done < budget) { napi_complete_done(napi, work_done); - ql_enable_completion_interrupt(qdev, rx_ring->irq); + qlge_enable_completion_interrupt(qdev, rx_ring->irq); } return work_done; } static void qlge_vlan_mode(struct net_device *ndev, netdev_features_t features) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); if (features & NETIF_F_HW_VLAN_CTAG_RX) { - ql_write32(qdev, NIC_RCV_CFG, NIC_RCV_CFG_VLAN_MASK | - NIC_RCV_CFG_VLAN_MATCH_AND_NON); + qlge_write32(qdev, NIC_RCV_CFG, NIC_RCV_CFG_VLAN_MASK | + NIC_RCV_CFG_VLAN_MATCH_AND_NON); } else { - ql_write32(qdev, NIC_RCV_CFG, NIC_RCV_CFG_VLAN_MASK); + qlge_write32(qdev, NIC_RCV_CFG, NIC_RCV_CFG_VLAN_MASK); } } @@ -2246,12 +2242,12 @@ static void qlge_vlan_mode(struct net_device *ndev, netdev_features_t features) static int qlge_update_hw_vlan_features(struct net_device *ndev, netdev_features_t features) { - struct ql_adapter *qdev = netdev_priv(ndev); - int status = 0; + struct qlge_adapter *qdev = netdev_to_qdev(ndev); bool need_restart = netif_running(ndev); + int status = 0; if (need_restart) { - status = ql_adapter_down(qdev); + status = qlge_adapter_down(qdev); if (status) { netif_err(qdev, link, qdev->ndev, "Failed to bring down the adapter\n"); @@ -2263,7 +2259,7 @@ static int qlge_update_hw_vlan_features(struct net_device *ndev, ndev->features = features; if (need_restart) { - status = ql_adapter_up(qdev); + status = qlge_adapter_up(qdev); if (status) { netif_err(qdev, link, qdev->ndev, "Failed to bring up the adapter\n"); @@ -2292,13 +2288,13 @@ static int qlge_set_features(struct net_device *ndev, return 0; } -static int __qlge_vlan_rx_add_vid(struct ql_adapter *qdev, u16 vid) +static int __qlge_vlan_rx_add_vid(struct qlge_adapter *qdev, u16 vid) { u32 enable_bit = MAC_ADDR_E; int err; - err = ql_set_mac_addr_reg(qdev, (u8 *)&enable_bit, - MAC_ADDR_TYPE_VLAN, vid); + err = qlge_set_mac_addr_reg(qdev, (u8 *)&enable_bit, + MAC_ADDR_TYPE_VLAN, vid); if (err) netif_err(qdev, ifup, qdev->ndev, "Failed to init vlan address.\n"); @@ -2307,29 +2303,29 @@ static int __qlge_vlan_rx_add_vid(struct ql_adapter *qdev, u16 vid) static int qlge_vlan_rx_add_vid(struct net_device *ndev, __be16 proto, u16 vid) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); int status; int err; - status = ql_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); + status = qlge_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); if (status) return status; err = __qlge_vlan_rx_add_vid(qdev, vid); set_bit(vid, qdev->active_vlans); - ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK); + qlge_sem_unlock(qdev, SEM_MAC_ADDR_MASK); return err; } -static int __qlge_vlan_rx_kill_vid(struct ql_adapter *qdev, u16 vid) +static int __qlge_vlan_rx_kill_vid(struct qlge_adapter *qdev, u16 vid) { u32 enable_bit = 0; int err; - err = ql_set_mac_addr_reg(qdev, (u8 *)&enable_bit, - MAC_ADDR_TYPE_VLAN, vid); + err = qlge_set_mac_addr_reg(qdev, (u8 *)&enable_bit, + MAC_ADDR_TYPE_VLAN, vid); if (err) netif_err(qdev, ifup, qdev->ndev, "Failed to clear vlan address.\n"); @@ -2338,35 +2334,35 @@ static int __qlge_vlan_rx_kill_vid(struct ql_adapter *qdev, u16 vid) static int qlge_vlan_rx_kill_vid(struct net_device *ndev, __be16 proto, u16 vid) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); int status; int err; - status = ql_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); + status = qlge_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); if (status) return status; err = __qlge_vlan_rx_kill_vid(qdev, vid); clear_bit(vid, qdev->active_vlans); - ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK); + qlge_sem_unlock(qdev, SEM_MAC_ADDR_MASK); return err; } -static void qlge_restore_vlan(struct ql_adapter *qdev) +static void qlge_restore_vlan(struct qlge_adapter *qdev) { int status; u16 vid; - status = ql_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); + status = qlge_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); if (status) return; for_each_set_bit(vid, qdev->active_vlans, VLAN_N_VID) __qlge_vlan_rx_add_vid(qdev, vid); - ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK); + qlge_sem_unlock(qdev, SEM_MAC_ADDR_MASK); } /* MSI-X Multiple Vector Interrupt Handler for inbound completions. */ @@ -2386,7 +2382,7 @@ static irqreturn_t qlge_msix_rx_isr(int irq, void *dev_id) static irqreturn_t qlge_isr(int irq, void *dev_id) { struct rx_ring *rx_ring = dev_id; - struct ql_adapter *qdev = rx_ring->qdev; + struct qlge_adapter *qdev = rx_ring->qdev; struct intr_context *intr_context = &qdev->intr_context[0]; u32 var; int work_done = 0; @@ -2398,18 +2394,18 @@ static irqreturn_t qlge_isr(int irq, void *dev_id) * enable it is not effective. */ if (!test_bit(QL_MSIX_ENABLED, &qdev->flags)) - ql_disable_completion_interrupt(qdev, 0); + qlge_disable_completion_interrupt(qdev, 0); - var = ql_read32(qdev, STS); + var = qlge_read32(qdev, STS); /* * Check for fatal error. */ if (var & STS_FE) { - ql_disable_completion_interrupt(qdev, 0); - ql_queue_asic_error(qdev); + qlge_disable_completion_interrupt(qdev, 0); + qlge_queue_asic_error(qdev); netdev_err(qdev->ndev, "Got fatal error, STS = %x.\n", var); - var = ql_read32(qdev, ERR_STS); + var = qlge_read32(qdev, ERR_STS); netdev_err(qdev->ndev, "Resetting chip. Error Status Register = 0x%x\n", var); return IRQ_HANDLED; } @@ -2418,14 +2414,14 @@ static irqreturn_t qlge_isr(int irq, void *dev_id) * Check MPI processor activity. */ if ((var & STS_PI) && - (ql_read32(qdev, INTR_MASK) & INTR_MASK_PI)) { + (qlge_read32(qdev, INTR_MASK) & INTR_MASK_PI)) { /* * We've got an async event or mailbox completion. * Handle it and clear the source of the interrupt. */ netif_err(qdev, intr, qdev->ndev, "Got MPI processor interrupt.\n"); - ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); + qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); queue_delayed_work_on(smp_processor_id(), qdev->workqueue, &qdev->mpi_work, 0); work_done++; @@ -2436,7 +2432,7 @@ static irqreturn_t qlge_isr(int irq, void *dev_id) * pass. Compare it to the queues that this irq services * and call napi if there's a match. */ - var = ql_read32(qdev, ISR1); + var = qlge_read32(qdev, ISR1); if (var & intr_context->irq_mask) { netif_info(qdev, intr, qdev->ndev, "Waking handler for rx_ring[0].\n"); @@ -2449,13 +2445,13 @@ static irqreturn_t qlge_isr(int irq, void *dev_id) * systematically re-enable the interrupt if we didn't * schedule napi. */ - ql_enable_completion_interrupt(qdev, 0); + qlge_enable_completion_interrupt(qdev, 0); } return work_done ? IRQ_HANDLED : IRQ_NONE; } -static int ql_tso(struct sk_buff *skb, struct ob_mac_tso_iocb_req *mac_iocb_ptr) +static int qlge_tso(struct sk_buff *skb, struct qlge_ob_mac_tso_iocb_req *mac_iocb_ptr) { if (skb_is_gso(skb)) { int err; @@ -2469,11 +2465,11 @@ static int ql_tso(struct sk_buff *skb, struct ob_mac_tso_iocb_req *mac_iocb_ptr) mac_iocb_ptr->flags3 |= OB_MAC_TSO_IOCB_IC; mac_iocb_ptr->frame_len = cpu_to_le32((u32)skb->len); mac_iocb_ptr->total_hdrs_len = - cpu_to_le16(skb_transport_offset(skb) + tcp_hdrlen(skb)); + cpu_to_le16(skb_transport_offset(skb) + tcp_hdrlen(skb)); mac_iocb_ptr->net_trans_offset = - cpu_to_le16(skb_network_offset(skb) | - skb_transport_offset(skb) - << OB_MAC_TRANSPORT_HDR_SHIFT); + cpu_to_le16(skb_network_offset(skb) | + skb_transport_offset(skb) + << OB_MAC_TRANSPORT_HDR_SHIFT); mac_iocb_ptr->mss = cpu_to_le16(skb_shinfo(skb)->gso_size); mac_iocb_ptr->flags2 |= OB_MAC_TSO_IOCB_LSO; if (likely(l3_proto == htons(ETH_P_IP))) { @@ -2488,17 +2484,17 @@ static int ql_tso(struct sk_buff *skb, struct ob_mac_tso_iocb_req *mac_iocb_ptr) } else if (l3_proto == htons(ETH_P_IPV6)) { mac_iocb_ptr->flags1 |= OB_MAC_TSO_IOCB_IP6; tcp_hdr(skb)->check = - ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, - &ipv6_hdr(skb)->daddr, - 0, IPPROTO_TCP, 0); + ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, + &ipv6_hdr(skb)->daddr, + 0, IPPROTO_TCP, 0); } return 1; } return 0; } -static void ql_hw_csum_setup(struct sk_buff *skb, - struct ob_mac_tso_iocb_req *mac_iocb_ptr) +static void qlge_hw_csum_setup(struct sk_buff *skb, + struct qlge_ob_mac_tso_iocb_req *mac_iocb_ptr) { int len; struct iphdr *iph = ip_hdr(skb); @@ -2508,7 +2504,7 @@ static void ql_hw_csum_setup(struct sk_buff *skb, mac_iocb_ptr->frame_len = cpu_to_le32((u32)skb->len); mac_iocb_ptr->net_trans_offset = cpu_to_le16(skb_network_offset(skb) | - skb_transport_offset(skb) << OB_MAC_TRANSPORT_HDR_SHIFT); + skb_transport_offset(skb) << OB_MAC_TRANSPORT_HDR_SHIFT); mac_iocb_ptr->flags1 |= OB_MAC_TSO_IOCB_IP4; len = (ntohs(iph->tot_len) - (iph->ihl << 2)); @@ -2516,14 +2512,14 @@ static void ql_hw_csum_setup(struct sk_buff *skb, check = &(tcp_hdr(skb)->check); mac_iocb_ptr->flags2 |= OB_MAC_TSO_IOCB_TC; mac_iocb_ptr->total_hdrs_len = - cpu_to_le16(skb_transport_offset(skb) + - (tcp_hdr(skb)->doff << 2)); + cpu_to_le16(skb_transport_offset(skb) + + (tcp_hdr(skb)->doff << 2)); } else { check = &(udp_hdr(skb)->check); mac_iocb_ptr->flags2 |= OB_MAC_TSO_IOCB_UC; mac_iocb_ptr->total_hdrs_len = - cpu_to_le16(skb_transport_offset(skb) + - sizeof(struct udphdr)); + cpu_to_le16(skb_transport_offset(skb) + + sizeof(struct udphdr)); } *check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, len, iph->protocol, 0); @@ -2531,9 +2527,9 @@ static void ql_hw_csum_setup(struct sk_buff *skb, static netdev_tx_t qlge_send(struct sk_buff *skb, struct net_device *ndev) { + struct qlge_adapter *qdev = netdev_to_qdev(ndev); + struct qlge_ob_mac_iocb_req *mac_iocb_ptr; struct tx_ring_desc *tx_ring_desc; - struct ob_mac_iocb_req *mac_iocb_ptr; - struct ql_adapter *qdev = netdev_priv(ndev); int tso; struct tx_ring *tx_ring; u32 tx_ring_idx = (u32)skb->queue_mapping; @@ -2571,28 +2567,28 @@ static netdev_tx_t qlge_send(struct sk_buff *skb, struct net_device *ndev) mac_iocb_ptr->flags3 |= OB_MAC_IOCB_V; mac_iocb_ptr->vlan_tci = cpu_to_le16(skb_vlan_tag_get(skb)); } - tso = ql_tso(skb, (struct ob_mac_tso_iocb_req *)mac_iocb_ptr); + tso = qlge_tso(skb, (struct qlge_ob_mac_tso_iocb_req *)mac_iocb_ptr); if (tso < 0) { dev_kfree_skb_any(skb); return NETDEV_TX_OK; } else if (unlikely(!tso) && (skb->ip_summed == CHECKSUM_PARTIAL)) { - ql_hw_csum_setup(skb, - (struct ob_mac_tso_iocb_req *)mac_iocb_ptr); + qlge_hw_csum_setup(skb, + (struct qlge_ob_mac_tso_iocb_req *)mac_iocb_ptr); } - if (ql_map_send(qdev, mac_iocb_ptr, skb, tx_ring_desc) != - NETDEV_TX_OK) { + if (qlge_map_send(qdev, mac_iocb_ptr, skb, tx_ring_desc) != + NETDEV_TX_OK) { netif_err(qdev, tx_queued, qdev->ndev, "Could not map the segments.\n"); tx_ring->tx_errors++; return NETDEV_TX_BUSY; } - QL_DUMP_OB_MAC_IOCB(qdev, mac_iocb_ptr); + tx_ring->prod_idx++; if (tx_ring->prod_idx == tx_ring->wq_len) tx_ring->prod_idx = 0; wmb(); - ql_write_db_reg_relaxed(tx_ring->prod_idx, tx_ring->prod_idx_db_reg); + qlge_write_db_reg_relaxed(tx_ring->prod_idx, tx_ring->prod_idx_db_reg); netif_printk(qdev, tx_queued, KERN_DEBUG, qdev->ndev, "tx queued, slot %d, len %d\n", tx_ring->prod_idx, skb->len); @@ -2611,7 +2607,7 @@ static netdev_tx_t qlge_send(struct sk_buff *skb, struct net_device *ndev) return NETDEV_TX_OK; } -static void ql_free_shadow_space(struct ql_adapter *qdev) +static void qlge_free_shadow_space(struct qlge_adapter *qdev) { if (qdev->rx_ring_shadow_reg_area) { dma_free_coherent(&qdev->pdev->dev, @@ -2629,7 +2625,7 @@ static void ql_free_shadow_space(struct ql_adapter *qdev) } } -static int ql_alloc_shadow_space(struct ql_adapter *qdev) +static int qlge_alloc_shadow_space(struct qlge_adapter *qdev) { qdev->rx_ring_shadow_reg_area = dma_alloc_coherent(&qdev->pdev->dev, PAGE_SIZE, @@ -2658,11 +2654,11 @@ err_wqp_sh_area: return -ENOMEM; } -static void ql_init_tx_ring(struct ql_adapter *qdev, struct tx_ring *tx_ring) +static void qlge_init_tx_ring(struct qlge_adapter *qdev, struct tx_ring *tx_ring) { struct tx_ring_desc *tx_ring_desc; int i; - struct ob_mac_iocb_req *mac_iocb_ptr; + struct qlge_ob_mac_iocb_req *mac_iocb_ptr; mac_iocb_ptr = tx_ring->wq_base; tx_ring_desc = tx_ring->q; @@ -2676,8 +2672,8 @@ static void ql_init_tx_ring(struct ql_adapter *qdev, struct tx_ring *tx_ring) atomic_set(&tx_ring->tx_count, tx_ring->wq_len); } -static void ql_free_tx_resources(struct ql_adapter *qdev, - struct tx_ring *tx_ring) +static void qlge_free_tx_resources(struct qlge_adapter *qdev, + struct tx_ring *tx_ring) { if (tx_ring->wq_base) { dma_free_coherent(&qdev->pdev->dev, tx_ring->wq_size, @@ -2688,20 +2684,20 @@ static void ql_free_tx_resources(struct ql_adapter *qdev, tx_ring->q = NULL; } -static int ql_alloc_tx_resources(struct ql_adapter *qdev, - struct tx_ring *tx_ring) +static int qlge_alloc_tx_resources(struct qlge_adapter *qdev, + struct tx_ring *tx_ring) { tx_ring->wq_base = - dma_alloc_coherent(&qdev->pdev->dev, tx_ring->wq_size, - &tx_ring->wq_base_dma, GFP_ATOMIC); + dma_alloc_coherent(&qdev->pdev->dev, tx_ring->wq_size, + &tx_ring->wq_base_dma, GFP_ATOMIC); if (!tx_ring->wq_base || tx_ring->wq_base_dma & WQ_ADDR_ALIGN) goto pci_alloc_err; tx_ring->q = - kmalloc_array(tx_ring->wq_len, sizeof(struct tx_ring_desc), - GFP_KERNEL); + kmalloc_array(tx_ring->wq_len, sizeof(struct tx_ring_desc), + GFP_KERNEL); if (!tx_ring->q) goto err; @@ -2715,19 +2711,19 @@ pci_alloc_err: return -ENOMEM; } -static void ql_free_lbq_buffers(struct ql_adapter *qdev, struct rx_ring *rx_ring) +static void qlge_free_lbq_buffers(struct qlge_adapter *qdev, struct rx_ring *rx_ring) { struct qlge_bq *lbq = &rx_ring->lbq; unsigned int last_offset; - last_offset = ql_lbq_block_size(qdev) - qdev->lbq_buf_size; + last_offset = qlge_lbq_block_size(qdev) - qdev->lbq_buf_size; while (lbq->next_to_clean != lbq->next_to_use) { struct qlge_bq_desc *lbq_desc = &lbq->queue[lbq->next_to_clean]; if (lbq_desc->p.pg_chunk.offset == last_offset) dma_unmap_page(&qdev->pdev->dev, lbq_desc->dma_addr, - ql_lbq_block_size(qdev), + qlge_lbq_block_size(qdev), DMA_FROM_DEVICE); put_page(lbq_desc->p.pg_chunk.page); @@ -2736,13 +2732,13 @@ static void ql_free_lbq_buffers(struct ql_adapter *qdev, struct rx_ring *rx_ring if (rx_ring->master_chunk.page) { dma_unmap_page(&qdev->pdev->dev, rx_ring->chunk_dma_addr, - ql_lbq_block_size(qdev), DMA_FROM_DEVICE); + qlge_lbq_block_size(qdev), DMA_FROM_DEVICE); put_page(rx_ring->master_chunk.page); rx_ring->master_chunk.page = NULL; } } -static void ql_free_sbq_buffers(struct ql_adapter *qdev, struct rx_ring *rx_ring) +static void qlge_free_sbq_buffers(struct qlge_adapter *qdev, struct rx_ring *rx_ring) { int i; @@ -2767,7 +2763,7 @@ static void ql_free_sbq_buffers(struct ql_adapter *qdev, struct rx_ring *rx_ring /* Free all large and small rx buffers associated * with the completion queues for this device. */ -static void ql_free_rx_buffers(struct ql_adapter *qdev) +static void qlge_free_rx_buffers(struct qlge_adapter *qdev) { int i; @@ -2775,25 +2771,25 @@ static void ql_free_rx_buffers(struct ql_adapter *qdev) struct rx_ring *rx_ring = &qdev->rx_ring[i]; if (rx_ring->lbq.queue) - ql_free_lbq_buffers(qdev, rx_ring); + qlge_free_lbq_buffers(qdev, rx_ring); if (rx_ring->sbq.queue) - ql_free_sbq_buffers(qdev, rx_ring); + qlge_free_sbq_buffers(qdev, rx_ring); } } -static void ql_alloc_rx_buffers(struct ql_adapter *qdev) +static void qlge_alloc_rx_buffers(struct qlge_adapter *qdev) { int i; for (i = 0; i < qdev->rss_ring_count; i++) - ql_update_buffer_queues(&qdev->rx_ring[i], GFP_KERNEL, - HZ / 2); + qlge_update_buffer_queues(&qdev->rx_ring[i], GFP_KERNEL, + HZ / 2); } static int qlge_init_bq(struct qlge_bq *bq) { struct rx_ring *rx_ring = QLGE_BQ_CONTAINER(bq); - struct ql_adapter *qdev = rx_ring->qdev; + struct qlge_adapter *qdev = rx_ring->qdev; struct qlge_bq_desc *bq_desc; __le64 *buf_ptr; int i; @@ -2823,8 +2819,8 @@ static int qlge_init_bq(struct qlge_bq *bq) return 0; } -static void ql_free_rx_resources(struct ql_adapter *qdev, - struct rx_ring *rx_ring) +static void qlge_free_rx_resources(struct qlge_adapter *qdev, + struct rx_ring *rx_ring) { /* Free the small buffer queue. */ if (rx_ring->sbq.base) { @@ -2860,15 +2856,15 @@ static void ql_free_rx_resources(struct ql_adapter *qdev, /* Allocate queues and buffers for this completions queue based * on the values in the parameter structure. */ -static int ql_alloc_rx_resources(struct ql_adapter *qdev, - struct rx_ring *rx_ring) +static int qlge_alloc_rx_resources(struct qlge_adapter *qdev, + struct rx_ring *rx_ring) { /* * Allocate the completion queue for this rx_ring. */ rx_ring->cq_base = - dma_alloc_coherent(&qdev->pdev->dev, rx_ring->cq_size, - &rx_ring->cq_base_dma, GFP_ATOMIC); + dma_alloc_coherent(&qdev->pdev->dev, rx_ring->cq_size, + &rx_ring->cq_base_dma, GFP_ATOMIC); if (!rx_ring->cq_base) { netif_err(qdev, ifup, qdev->ndev, "rx_ring alloc failed.\n"); @@ -2877,14 +2873,14 @@ static int ql_alloc_rx_resources(struct ql_adapter *qdev, if (rx_ring->cq_id < qdev->rss_ring_count && (qlge_init_bq(&rx_ring->sbq) || qlge_init_bq(&rx_ring->lbq))) { - ql_free_rx_resources(qdev, rx_ring); + qlge_free_rx_resources(qdev, rx_ring); return -ENOMEM; } return 0; } -static void ql_tx_ring_clean(struct ql_adapter *qdev) +static void qlge_tx_ring_clean(struct qlge_adapter *qdev) { struct tx_ring *tx_ring; struct tx_ring_desc *tx_ring_desc; @@ -2903,8 +2899,8 @@ static void ql_tx_ring_clean(struct ql_adapter *qdev) "Freeing lost SKB %p, from queue %d, index %d.\n", tx_ring_desc->skb, j, tx_ring_desc->index); - ql_unmap_send(qdev, tx_ring_desc, - tx_ring_desc->map_cnt); + qlge_unmap_send(qdev, tx_ring_desc, + tx_ring_desc->map_cnt); dev_kfree_skb(tx_ring_desc->skb); tx_ring_desc->skb = NULL; } @@ -2912,27 +2908,27 @@ static void ql_tx_ring_clean(struct ql_adapter *qdev) } } -static void ql_free_mem_resources(struct ql_adapter *qdev) +static void qlge_free_mem_resources(struct qlge_adapter *qdev) { int i; for (i = 0; i < qdev->tx_ring_count; i++) - ql_free_tx_resources(qdev, &qdev->tx_ring[i]); + qlge_free_tx_resources(qdev, &qdev->tx_ring[i]); for (i = 0; i < qdev->rx_ring_count; i++) - ql_free_rx_resources(qdev, &qdev->rx_ring[i]); - ql_free_shadow_space(qdev); + qlge_free_rx_resources(qdev, &qdev->rx_ring[i]); + qlge_free_shadow_space(qdev); } -static int ql_alloc_mem_resources(struct ql_adapter *qdev) +static int qlge_alloc_mem_resources(struct qlge_adapter *qdev) { int i; /* Allocate space for our shadow registers and such. */ - if (ql_alloc_shadow_space(qdev)) + if (qlge_alloc_shadow_space(qdev)) return -ENOMEM; for (i = 0; i < qdev->rx_ring_count; i++) { - if (ql_alloc_rx_resources(qdev, &qdev->rx_ring[i]) != 0) { + if (qlge_alloc_rx_resources(qdev, &qdev->rx_ring[i]) != 0) { netif_err(qdev, ifup, qdev->ndev, "RX resource allocation failed.\n"); goto err_mem; @@ -2940,7 +2936,7 @@ static int ql_alloc_mem_resources(struct ql_adapter *qdev) } /* Allocate tx queue resources */ for (i = 0; i < qdev->tx_ring_count; i++) { - if (ql_alloc_tx_resources(qdev, &qdev->tx_ring[i]) != 0) { + if (qlge_alloc_tx_resources(qdev, &qdev->tx_ring[i]) != 0) { netif_err(qdev, ifup, qdev->ndev, "TX resource allocation failed.\n"); goto err_mem; @@ -2949,7 +2945,7 @@ static int ql_alloc_mem_resources(struct ql_adapter *qdev) return 0; err_mem: - ql_free_mem_resources(qdev); + qlge_free_mem_resources(qdev); return -ENOMEM; } @@ -2957,7 +2953,7 @@ err_mem: * The control block is defined as * "Completion Queue Initialization Control Block", or cqicb. */ -static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring) +static int qlge_start_rx_ring(struct qlge_adapter *qdev, struct rx_ring *rx_ring) { struct cqicb *cqicb = &rx_ring->cqicb; void *shadow_reg = qdev->rx_ring_shadow_reg_area + @@ -2965,7 +2961,7 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring) u64 shadow_reg_dma = qdev->rx_ring_shadow_reg_dma + (rx_ring->cq_id * RX_RING_SHADOW_SPACE); void __iomem *doorbell_area = - qdev->doorbell_area + (DB_PAGE_SIZE * (128 + rx_ring->cq_id)); + qdev->doorbell_area + (DB_PAGE_SIZE * (128 + rx_ring->cq_id)); int err = 0; u64 tmp; __le64 *base_indirect_ptr; @@ -3012,8 +3008,8 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring) * Set up the control block load flags. */ cqicb->flags = FLAGS_LC | /* Load queue base address */ - FLAGS_LV | /* Load MSI-X vector */ - FLAGS_LI; /* Load irq delay values */ + FLAGS_LV | /* Load MSI-X vector */ + FLAGS_LI; /* Load irq delay values */ if (rx_ring->cq_id < qdev->rss_ring_count) { cqicb->flags |= FLAGS_LL; /* Load lbq values */ tmp = (u64)rx_ring->lbq.base_dma; @@ -3043,7 +3039,7 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring) page_entries++; } while (page_entries < MAX_DB_PAGES_PER_BQ(QLGE_BQ_LEN)); cqicb->sbq_addr = - cpu_to_le64(rx_ring->sbq.base_indirect_dma); + cpu_to_le64(rx_ring->sbq.base_indirect_dma); cqicb->sbq_buf_size = cpu_to_le16(SMALL_BUFFER_SIZE); cqicb->sbq_len = cpu_to_le16(QLGE_FIT16(QLGE_BQ_LEN)); rx_ring->sbq.next_to_use = 0; @@ -3053,7 +3049,7 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring) /* Inbound completion handling rx_rings run in * separate NAPI contexts. */ - netif_napi_add(qdev->ndev, &rx_ring->napi, ql_napi_poll_msix, + netif_napi_add(qdev->ndev, &rx_ring->napi, qlge_napi_poll_msix, 64); cqicb->irq_delay = cpu_to_le16(qdev->rx_coalesce_usecs); cqicb->pkt_delay = cpu_to_le16(qdev->rx_max_coalesced_frames); @@ -3061,8 +3057,8 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring) cqicb->irq_delay = cpu_to_le16(qdev->tx_coalesce_usecs); cqicb->pkt_delay = cpu_to_le16(qdev->tx_max_coalesced_frames); } - err = ql_write_cfg(qdev, cqicb, sizeof(struct cqicb), - CFG_LCQ, rx_ring->cq_id); + err = qlge_write_cfg(qdev, cqicb, sizeof(struct cqicb), + CFG_LCQ, rx_ring->cq_id); if (err) { netif_err(qdev, ifup, qdev->ndev, "Failed to load CQICB.\n"); return err; @@ -3070,15 +3066,15 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring) return err; } -static int ql_start_tx_ring(struct ql_adapter *qdev, struct tx_ring *tx_ring) +static int qlge_start_tx_ring(struct qlge_adapter *qdev, struct tx_ring *tx_ring) { struct wqicb *wqicb = (struct wqicb *)tx_ring; void __iomem *doorbell_area = - qdev->doorbell_area + (DB_PAGE_SIZE * tx_ring->wq_id); + qdev->doorbell_area + (DB_PAGE_SIZE * tx_ring->wq_id); void *shadow_reg = qdev->tx_ring_shadow_reg_area + - (tx_ring->wq_id * sizeof(u64)); + (tx_ring->wq_id * sizeof(u64)); u64 shadow_reg_dma = qdev->tx_ring_shadow_reg_dma + - (tx_ring->wq_id * sizeof(u64)); + (tx_ring->wq_id * sizeof(u64)); int err = 0; /* @@ -3105,10 +3101,10 @@ static int ql_start_tx_ring(struct ql_adapter *qdev, struct tx_ring *tx_ring) wqicb->cnsmr_idx_addr = cpu_to_le64(tx_ring->cnsmr_idx_sh_reg_dma); - ql_init_tx_ring(qdev, tx_ring); + qlge_init_tx_ring(qdev, tx_ring); - err = ql_write_cfg(qdev, wqicb, sizeof(*wqicb), CFG_LRQ, - (u16)tx_ring->wq_id); + err = qlge_write_cfg(qdev, wqicb, sizeof(*wqicb), CFG_LRQ, + (u16)tx_ring->wq_id); if (err) { netif_err(qdev, ifup, qdev->ndev, "Failed to load tx_ring.\n"); return err; @@ -3116,7 +3112,7 @@ static int ql_start_tx_ring(struct ql_adapter *qdev, struct tx_ring *tx_ring) return err; } -static void ql_disable_msix(struct ql_adapter *qdev) +static void qlge_disable_msix(struct qlge_adapter *qdev) { if (test_bit(QL_MSIX_ENABLED, &qdev->flags)) { pci_disable_msix(qdev->pdev); @@ -3133,7 +3129,7 @@ static void ql_disable_msix(struct ql_adapter *qdev) * stored in qdev->intr_count. If we don't get that * many then we reduce the count and try again. */ -static void ql_enable_msix(struct ql_adapter *qdev) +static void qlge_enable_msix(struct qlge_adapter *qdev) { int i, err; @@ -3186,7 +3182,7 @@ msi: "Running with legacy interrupts.\n"); } -/* Each vector services 1 RSS ring and and 1 or more +/* Each vector services 1 RSS ring and 1 or more * TX completion rings. This function loops through * the TX completion rings and assigns the vector that * will service it. An example would be if there are @@ -3195,7 +3191,7 @@ msi: * and TX completion rings 0,1,2 and 3. Vector 1 would * service RSS ring 1 and TX completion rings 4,5,6 and 7. */ -static void ql_set_tx_vect(struct ql_adapter *qdev) +static void qlge_set_tx_vect(struct qlge_adapter *qdev) { int i, j, vect; u32 tx_rings_per_vector = qdev->tx_ring_count / qdev->intr_count; @@ -3203,7 +3199,7 @@ static void ql_set_tx_vect(struct ql_adapter *qdev) if (likely(test_bit(QL_MSIX_ENABLED, &qdev->flags))) { /* Assign irq vectors to TX rx_rings.*/ for (vect = 0, j = 0, i = qdev->rss_ring_count; - i < qdev->rx_ring_count; i++) { + i < qdev->rx_ring_count; i++) { if (j == tx_rings_per_vector) { vect++; j = 0; @@ -3225,7 +3221,7 @@ static void ql_set_tx_vect(struct ql_adapter *qdev) * rings. This function sets up a bit mask per vector * that indicates which rings it services. */ -static void ql_set_irq_mask(struct ql_adapter *qdev, struct intr_context *ctx) +static void qlge_set_irq_mask(struct qlge_adapter *qdev, struct intr_context *ctx) { int j, vect = ctx->intr; u32 tx_rings_per_vector = qdev->tx_ring_count / qdev->intr_count; @@ -3240,8 +3236,8 @@ static void ql_set_irq_mask(struct ql_adapter *qdev, struct intr_context *ctx) */ for (j = 0; j < tx_rings_per_vector; j++) { ctx->irq_mask |= - (1 << qdev->rx_ring[qdev->rss_ring_count + - (vect * tx_rings_per_vector) + j].cq_id); + (1 << qdev->rx_ring[qdev->rss_ring_count + + (vect * tx_rings_per_vector) + j].cq_id); } } else { /* For single vector we just shift each queue's @@ -3258,7 +3254,7 @@ static void ql_set_irq_mask(struct ql_adapter *qdev, struct intr_context *ctx) * The intr_context structure is used to hook each vector * to possibly different handlers. */ -static void ql_resolve_queues_to_irqs(struct ql_adapter *qdev) +static void qlge_resolve_queues_to_irqs(struct qlge_adapter *qdev) { int i = 0; struct intr_context *intr_context = &qdev->intr_context[0]; @@ -3275,23 +3271,23 @@ static void ql_resolve_queues_to_irqs(struct ql_adapter *qdev) /* Set up this vector's bit-mask that indicates * which queues it services. */ - ql_set_irq_mask(qdev, intr_context); + qlge_set_irq_mask(qdev, intr_context); /* * We set up each vectors enable/disable/read bits so * there's no bit/mask calculations in the critical path. */ intr_context->intr_en_mask = - INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | - INTR_EN_TYPE_ENABLE | INTR_EN_IHD_MASK | INTR_EN_IHD - | i; + INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | + INTR_EN_TYPE_ENABLE | INTR_EN_IHD_MASK | INTR_EN_IHD + | i; intr_context->intr_dis_mask = - INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | - INTR_EN_TYPE_DISABLE | INTR_EN_IHD_MASK | - INTR_EN_IHD | i; + INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | + INTR_EN_TYPE_DISABLE | INTR_EN_IHD_MASK | + INTR_EN_IHD | i; intr_context->intr_read_mask = - INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | - INTR_EN_TYPE_READ | INTR_EN_IHD_MASK | INTR_EN_IHD | - i; + INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | + INTR_EN_TYPE_READ | INTR_EN_IHD_MASK | INTR_EN_IHD | + i; if (i == 0) { /* The first vector/queue handles * broadcast/multicast, fatal errors, @@ -3322,10 +3318,10 @@ static void ql_resolve_queues_to_irqs(struct ql_adapter *qdev) * there's no bit/mask calculations in the critical path. */ intr_context->intr_en_mask = - INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | INTR_EN_TYPE_ENABLE; + INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | INTR_EN_TYPE_ENABLE; intr_context->intr_dis_mask = - INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | - INTR_EN_TYPE_DISABLE; + INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | + INTR_EN_TYPE_DISABLE; if (test_bit(QL_LEGACY_ENABLED, &qdev->flags)) { /* Experience shows that when using INTx interrupts, * the device does not always auto-mask INTR_EN_EN. @@ -3337,7 +3333,7 @@ static void ql_resolve_queues_to_irqs(struct ql_adapter *qdev) intr_context->intr_dis_mask |= INTR_EN_EI << 16; } intr_context->intr_read_mask = - INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | INTR_EN_TYPE_READ; + INTR_EN_TYPE_MASK | INTR_EN_INTR_MASK | INTR_EN_TYPE_READ; /* * Single interrupt means one handler for all rings. */ @@ -3348,15 +3344,15 @@ static void ql_resolve_queues_to_irqs(struct ql_adapter *qdev) * a single vector so it will service all RSS and * TX completion rings. */ - ql_set_irq_mask(qdev, intr_context); + qlge_set_irq_mask(qdev, intr_context); } /* Tell the TX completion rings which MSIx vector * they will be using. */ - ql_set_tx_vect(qdev); + qlge_set_tx_vect(qdev); } -static void ql_free_irq(struct ql_adapter *qdev) +static void qlge_free_irq(struct qlge_adapter *qdev) { int i; struct intr_context *intr_context = &qdev->intr_context[0]; @@ -3371,17 +3367,17 @@ static void ql_free_irq(struct ql_adapter *qdev) } } } - ql_disable_msix(qdev); + qlge_disable_msix(qdev); } -static int ql_request_irq(struct ql_adapter *qdev) +static int qlge_request_irq(struct qlge_adapter *qdev) { int i; int status = 0; struct pci_dev *pdev = qdev->pdev; struct intr_context *intr_context = &qdev->intr_context[0]; - ql_resolve_queues_to_irqs(qdev); + qlge_resolve_queues_to_irqs(qdev); for (i = 0; i < qdev->intr_count; i++, intr_context++) { if (test_bit(QL_MSIX_ENABLED, &qdev->flags)) { @@ -3408,11 +3404,11 @@ static int ql_request_irq(struct ql_adapter *qdev) "%s: dev_id = 0x%p.\n", __func__, &qdev->rx_ring[0]); status = - request_irq(pdev->irq, qlge_isr, - test_bit(QL_MSI_ENABLED, &qdev->flags) - ? 0 - : IRQF_SHARED, - intr_context->name, &qdev->rx_ring[0]); + request_irq(pdev->irq, qlge_isr, + test_bit(QL_MSI_ENABLED, &qdev->flags) + ? 0 + : IRQF_SHARED, + intr_context->name, &qdev->rx_ring[0]); if (status) goto err_irq; @@ -3425,11 +3421,11 @@ static int ql_request_irq(struct ql_adapter *qdev) return status; err_irq: netif_err(qdev, ifup, qdev->ndev, "Failed to get the interrupts!!!\n"); - ql_free_irq(qdev); + qlge_free_irq(qdev); return status; } -static int ql_start_rss(struct ql_adapter *qdev) +static int qlge_start_rss(struct qlge_adapter *qdev) { static const u8 init_hash_seed[] = { 0x6d, 0x5a, 0x56, 0xda, 0x25, 0x5b, 0x0e, 0xc2, @@ -3459,7 +3455,7 @@ static int ql_start_rss(struct ql_adapter *qdev) memcpy((void *)&ricb->ipv6_hash_key[0], init_hash_seed, 40); memcpy((void *)&ricb->ipv4_hash_key[0], init_hash_seed, 16); - status = ql_write_cfg(qdev, ricb, sizeof(*ricb), CFG_LR, 0); + status = qlge_write_cfg(qdev, ricb, sizeof(*ricb), CFG_LR, 0); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to load RICB.\n"); return status; @@ -3467,55 +3463,55 @@ static int ql_start_rss(struct ql_adapter *qdev) return status; } -static int ql_clear_routing_entries(struct ql_adapter *qdev) +static int qlge_clear_routing_entries(struct qlge_adapter *qdev) { int i, status = 0; - status = ql_sem_spinlock(qdev, SEM_RT_IDX_MASK); + status = qlge_sem_spinlock(qdev, SEM_RT_IDX_MASK); if (status) return status; /* Clear all the entries in the routing table. */ for (i = 0; i < 16; i++) { - status = ql_set_routing_reg(qdev, i, 0, 0); + status = qlge_set_routing_reg(qdev, i, 0, 0); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to init routing register for CAM packets.\n"); break; } } - ql_sem_unlock(qdev, SEM_RT_IDX_MASK); + qlge_sem_unlock(qdev, SEM_RT_IDX_MASK); return status; } /* Initialize the frame-to-queue routing. */ -static int ql_route_initialize(struct ql_adapter *qdev) +static int qlge_route_initialize(struct qlge_adapter *qdev) { int status = 0; /* Clear all the entries in the routing table. */ - status = ql_clear_routing_entries(qdev); + status = qlge_clear_routing_entries(qdev); if (status) return status; - status = ql_sem_spinlock(qdev, SEM_RT_IDX_MASK); + status = qlge_sem_spinlock(qdev, SEM_RT_IDX_MASK); if (status) return status; - status = ql_set_routing_reg(qdev, RT_IDX_IP_CSUM_ERR_SLOT, - RT_IDX_IP_CSUM_ERR, 1); + status = qlge_set_routing_reg(qdev, RT_IDX_IP_CSUM_ERR_SLOT, + RT_IDX_IP_CSUM_ERR, 1); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to init routing register for IP CSUM error packets.\n"); goto exit; } - status = ql_set_routing_reg(qdev, RT_IDX_TCP_UDP_CSUM_ERR_SLOT, - RT_IDX_TU_CSUM_ERR, 1); + status = qlge_set_routing_reg(qdev, RT_IDX_TCP_UDP_CSUM_ERR_SLOT, + RT_IDX_TU_CSUM_ERR, 1); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to init routing register for TCP/UDP CSUM error packets.\n"); goto exit; } - status = ql_set_routing_reg(qdev, RT_IDX_BCAST_SLOT, RT_IDX_BCAST, 1); + status = qlge_set_routing_reg(qdev, RT_IDX_BCAST_SLOT, RT_IDX_BCAST, 1); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to init routing register for broadcast packets.\n"); @@ -3525,8 +3521,8 @@ static int ql_route_initialize(struct ql_adapter *qdev) * routing block. */ if (qdev->rss_ring_count > 1) { - status = ql_set_routing_reg(qdev, RT_IDX_RSS_MATCH_SLOT, - RT_IDX_RSS_MATCH, 1); + status = qlge_set_routing_reg(qdev, RT_IDX_RSS_MATCH_SLOT, + RT_IDX_RSS_MATCH, 1); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to init routing register for MATCH RSS packets.\n"); @@ -3534,17 +3530,17 @@ static int ql_route_initialize(struct ql_adapter *qdev) } } - status = ql_set_routing_reg(qdev, RT_IDX_CAM_HIT_SLOT, - RT_IDX_CAM_HIT, 1); + status = qlge_set_routing_reg(qdev, RT_IDX_CAM_HIT_SLOT, + RT_IDX_CAM_HIT, 1); if (status) netif_err(qdev, ifup, qdev->ndev, "Failed to init routing register for CAM packets.\n"); exit: - ql_sem_unlock(qdev, SEM_RT_IDX_MASK); + qlge_sem_unlock(qdev, SEM_RT_IDX_MASK); return status; } -int ql_cam_route_initialize(struct ql_adapter *qdev) +int qlge_cam_route_initialize(struct qlge_adapter *qdev) { int status, set; @@ -3552,22 +3548,22 @@ int ql_cam_route_initialize(struct ql_adapter *qdev) * determine if we are setting or clearing * the MAC address in the CAM. */ - set = ql_read32(qdev, STS); + set = qlge_read32(qdev, STS); set &= qdev->port_link_up; - status = ql_set_mac_addr(qdev, set); + status = qlge_set_mac_addr(qdev, set); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to init mac address.\n"); return status; } - status = ql_route_initialize(qdev); + status = qlge_route_initialize(qdev); if (status) netif_err(qdev, ifup, qdev->ndev, "Failed to init routing table.\n"); return status; } -static int ql_adapter_initialize(struct ql_adapter *qdev) +static int qlge_adapter_initialize(struct qlge_adapter *qdev) { u32 value, mask; int i; @@ -3578,7 +3574,7 @@ static int ql_adapter_initialize(struct ql_adapter *qdev) */ value = SYS_EFE | SYS_FAE; mask = value << 16; - ql_write32(qdev, SYS, mask | value); + qlge_write32(qdev, SYS, mask | value); /* Set the default queue, and VLAN behavior. */ value = NIC_RCV_CFG_DFQ; @@ -3587,40 +3583,40 @@ static int ql_adapter_initialize(struct ql_adapter *qdev) value |= NIC_RCV_CFG_RV; mask |= (NIC_RCV_CFG_RV << 16); } - ql_write32(qdev, NIC_RCV_CFG, (mask | value)); + qlge_write32(qdev, NIC_RCV_CFG, (mask | value)); /* Set the MPI interrupt to enabled. */ - ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); + qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); /* Enable the function, set pagesize, enable error checking. */ value = FSC_FE | FSC_EPC_INBOUND | FSC_EPC_OUTBOUND | - FSC_EC | FSC_VM_PAGE_4K; + FSC_EC | FSC_VM_PAGE_4K; value |= SPLT_SETTING; /* Set/clear header splitting. */ mask = FSC_VM_PAGESIZE_MASK | - FSC_DBL_MASK | FSC_DBRST_MASK | (value << 16); - ql_write32(qdev, FSC, mask | value); + FSC_DBL_MASK | FSC_DBRST_MASK | (value << 16); + qlge_write32(qdev, FSC, mask | value); - ql_write32(qdev, SPLT_HDR, SPLT_LEN); + qlge_write32(qdev, SPLT_HDR, SPLT_LEN); /* Set RX packet routing to use port/pci function on which the * packet arrived on in addition to usual frame routing. * This is helpful on bonding where both interfaces can have * the same MAC address. */ - ql_write32(qdev, RST_FO, RST_FO_RR_MASK | RST_FO_RR_RCV_FUNC_CQ); + qlge_write32(qdev, RST_FO, RST_FO_RR_MASK | RST_FO_RR_RCV_FUNC_CQ); /* Reroute all packets to our Interface. * They may have been routed to MPI firmware * due to WOL. */ - value = ql_read32(qdev, MGMT_RCV_CFG); + value = qlge_read32(qdev, MGMT_RCV_CFG); value &= ~MGMT_RCV_CFG_RM; mask = 0xffff0000; /* Sticky reg needs clearing due to WOL. */ - ql_write32(qdev, MGMT_RCV_CFG, mask); - ql_write32(qdev, MGMT_RCV_CFG, mask | value); + qlge_write32(qdev, MGMT_RCV_CFG, mask); + qlge_write32(qdev, MGMT_RCV_CFG, mask | value); /* Default WOL is enable on Mezz cards */ if (qdev->pdev->subsystem_device == 0x0068 || @@ -3629,7 +3625,7 @@ static int ql_adapter_initialize(struct ql_adapter *qdev) /* Start up the rx queues. */ for (i = 0; i < qdev->rx_ring_count; i++) { - status = ql_start_rx_ring(qdev, &qdev->rx_ring[i]); + status = qlge_start_rx_ring(qdev, &qdev->rx_ring[i]); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to start rx ring[%d].\n", i); @@ -3641,7 +3637,7 @@ static int ql_adapter_initialize(struct ql_adapter *qdev) * then download a RICB to configure RSS. */ if (qdev->rss_ring_count > 1) { - status = ql_start_rss(qdev); + status = qlge_start_rss(qdev); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to start RSS.\n"); return status; @@ -3650,7 +3646,7 @@ static int ql_adapter_initialize(struct ql_adapter *qdev) /* Start up the tx queues. */ for (i = 0; i < qdev->tx_ring_count; i++) { - status = ql_start_tx_ring(qdev, &qdev->tx_ring[i]); + status = qlge_start_tx_ring(qdev, &qdev->tx_ring[i]); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to start tx ring[%d].\n", i); @@ -3664,7 +3660,7 @@ static int ql_adapter_initialize(struct ql_adapter *qdev) netif_err(qdev, ifup, qdev->ndev, "Failed to start port.\n"); /* Set up the MAC address and frame routing filter. */ - status = ql_cam_route_initialize(qdev); + status = qlge_cam_route_initialize(qdev); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to init CAM/Routing tables.\n"); @@ -3679,14 +3675,14 @@ static int ql_adapter_initialize(struct ql_adapter *qdev) } /* Issue soft reset to chip. */ -static int ql_adapter_reset(struct ql_adapter *qdev) +static int qlge_adapter_reset(struct qlge_adapter *qdev) { u32 value; int status = 0; unsigned long end_jiffies; /* Clear all the entries in the routing table. */ - status = ql_clear_routing_entries(qdev); + status = qlge_clear_routing_entries(qdev); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to clear routing bits.\n"); return status; @@ -3697,19 +3693,19 @@ static int ql_adapter_reset(struct ql_adapter *qdev) */ if (!test_bit(QL_ASIC_RECOVERY, &qdev->flags)) { /* Stop management traffic. */ - ql_mb_set_mgmnt_traffic_ctl(qdev, MB_SET_MPI_TFK_STOP); + qlge_mb_set_mgmnt_traffic_ctl(qdev, MB_SET_MPI_TFK_STOP); /* Wait for the NIC and MGMNT FIFOs to empty. */ - ql_wait_fifo_empty(qdev); + qlge_wait_fifo_empty(qdev); } else { clear_bit(QL_ASIC_RECOVERY, &qdev->flags); } - ql_write32(qdev, RST_FO, (RST_FO_FR << 16) | RST_FO_FR); + qlge_write32(qdev, RST_FO, (RST_FO_FR << 16) | RST_FO_FR); end_jiffies = jiffies + usecs_to_jiffies(30); do { - value = ql_read32(qdev, RST_FO); + value = qlge_read32(qdev, RST_FO); if ((value & RST_FO_FR) == 0) break; cpu_relax(); @@ -3722,13 +3718,13 @@ static int ql_adapter_reset(struct ql_adapter *qdev) } /* Resume management traffic. */ - ql_mb_set_mgmnt_traffic_ctl(qdev, MB_SET_MPI_TFK_RESUME); + qlge_mb_set_mgmnt_traffic_ctl(qdev, MB_SET_MPI_TFK_RESUME); return status; } -static void ql_display_dev_info(struct net_device *ndev) +static void qlge_display_dev_info(struct net_device *ndev) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); netif_info(qdev, probe, qdev->ndev, "Function #%d, Port %d, NIC Roll %d, NIC Rev = %d, XG Roll = %d, XG Rev = %d.\n", @@ -3742,7 +3738,7 @@ static void ql_display_dev_info(struct net_device *ndev) "MAC address %pM\n", ndev->dev_addr); } -static int ql_wol(struct ql_adapter *qdev) +static int qlge_wol(struct qlge_adapter *qdev) { int status = 0; u32 wol = MB_WOL_DISABLE; @@ -3755,7 +3751,7 @@ static int ql_wol(struct ql_adapter *qdev) */ if (qdev->wol & (WAKE_ARP | WAKE_MAGICSECURE | WAKE_PHY | WAKE_UCAST | - WAKE_MCAST | WAKE_BCAST)) { + WAKE_MCAST | WAKE_BCAST)) { netif_err(qdev, ifdown, qdev->ndev, "Unsupported WOL parameter. qdev->wol = 0x%x.\n", qdev->wol); @@ -3763,7 +3759,7 @@ static int ql_wol(struct ql_adapter *qdev) } if (qdev->wol & WAKE_MAGIC) { - status = ql_mb_wol_set_magic(qdev, 1); + status = qlge_mb_wol_set_magic(qdev, 1); if (status) { netif_err(qdev, ifdown, qdev->ndev, "Failed to set magic packet on %s.\n", @@ -3779,7 +3775,7 @@ static int ql_wol(struct ql_adapter *qdev) if (qdev->wol) { wol |= MB_WOL_MODE_ON; - status = ql_mb_wol_mode(qdev, wol); + status = qlge_mb_wol_mode(qdev, wol); netif_err(qdev, drv, qdev->ndev, "WOL %s (wol code 0x%x) on %s\n", (status == 0) ? "Successfully set" : "Failed", @@ -3789,7 +3785,7 @@ static int ql_wol(struct ql_adapter *qdev) return status; } -static void ql_cancel_all_work_sync(struct ql_adapter *qdev) +static void qlge_cancel_all_work_sync(struct qlge_adapter *qdev) { /* Don't kill the reset worker thread if we * are in the process of recovery. @@ -3799,58 +3795,57 @@ static void ql_cancel_all_work_sync(struct ql_adapter *qdev) cancel_delayed_work_sync(&qdev->mpi_reset_work); cancel_delayed_work_sync(&qdev->mpi_work); cancel_delayed_work_sync(&qdev->mpi_idc_work); - cancel_delayed_work_sync(&qdev->mpi_core_to_log); cancel_delayed_work_sync(&qdev->mpi_port_cfg_work); } -static int ql_adapter_down(struct ql_adapter *qdev) +static int qlge_adapter_down(struct qlge_adapter *qdev) { int i, status = 0; - ql_link_off(qdev); + qlge_link_off(qdev); - ql_cancel_all_work_sync(qdev); + qlge_cancel_all_work_sync(qdev); for (i = 0; i < qdev->rss_ring_count; i++) napi_disable(&qdev->rx_ring[i].napi); clear_bit(QL_ADAPTER_UP, &qdev->flags); - ql_disable_interrupts(qdev); + qlge_disable_interrupts(qdev); - ql_tx_ring_clean(qdev); + qlge_tx_ring_clean(qdev); /* Call netif_napi_del() from common point. - */ + */ for (i = 0; i < qdev->rss_ring_count; i++) netif_napi_del(&qdev->rx_ring[i].napi); - status = ql_adapter_reset(qdev); + status = qlge_adapter_reset(qdev); if (status) netif_err(qdev, ifdown, qdev->ndev, "reset(func #%d) FAILED!\n", qdev->func); - ql_free_rx_buffers(qdev); + qlge_free_rx_buffers(qdev); return status; } -static int ql_adapter_up(struct ql_adapter *qdev) +static int qlge_adapter_up(struct qlge_adapter *qdev) { int err = 0; - err = ql_adapter_initialize(qdev); + err = qlge_adapter_initialize(qdev); if (err) { netif_info(qdev, ifup, qdev->ndev, "Unable to initialize adapter.\n"); goto err_init; } set_bit(QL_ADAPTER_UP, &qdev->flags); - ql_alloc_rx_buffers(qdev); + qlge_alloc_rx_buffers(qdev); /* If the port is initialized and the * link is up the turn on the carrier. */ - if ((ql_read32(qdev, STS) & qdev->port_init) && - (ql_read32(qdev, STS) & qdev->port_link_up)) - ql_link_on(qdev); + if ((qlge_read32(qdev, STS) & qdev->port_init) && + (qlge_read32(qdev, STS) & qdev->port_link_up)) + qlge_link_on(qdev); /* Restore rx mode. */ clear_bit(QL_ALLMULTI, &qdev->flags); clear_bit(QL_PROMISCUOUS, &qdev->flags); @@ -3859,34 +3854,34 @@ static int ql_adapter_up(struct ql_adapter *qdev) /* Restore vlan setting. */ qlge_restore_vlan(qdev); - ql_enable_interrupts(qdev); - ql_enable_all_completion_interrupts(qdev); + qlge_enable_interrupts(qdev); + qlge_enable_all_completion_interrupts(qdev); netif_tx_start_all_queues(qdev->ndev); return 0; err_init: - ql_adapter_reset(qdev); + qlge_adapter_reset(qdev); return err; } -static void ql_release_adapter_resources(struct ql_adapter *qdev) +static void qlge_release_adapter_resources(struct qlge_adapter *qdev) { - ql_free_mem_resources(qdev); - ql_free_irq(qdev); + qlge_free_mem_resources(qdev); + qlge_free_irq(qdev); } -static int ql_get_adapter_resources(struct ql_adapter *qdev) +static int qlge_get_adapter_resources(struct qlge_adapter *qdev) { - if (ql_alloc_mem_resources(qdev)) { + if (qlge_alloc_mem_resources(qdev)) { netif_err(qdev, ifup, qdev->ndev, "Unable to allocate memory.\n"); return -ENOMEM; } - return ql_request_irq(qdev); + return qlge_request_irq(qdev); } static int qlge_close(struct net_device *ndev) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); int i; /* If we hit pci_channel_io_perm_failure @@ -3910,12 +3905,12 @@ static int qlge_close(struct net_device *ndev) for (i = 0; i < qdev->rss_ring_count; i++) cancel_delayed_work_sync(&qdev->rx_ring[i].refill_work); - ql_adapter_down(qdev); - ql_release_adapter_resources(qdev); + qlge_adapter_down(qdev); + qlge_release_adapter_resources(qdev); return 0; } -static void qlge_set_lb_size(struct ql_adapter *qdev) +static void qlge_set_lb_size(struct qlge_adapter *qdev) { if (qdev->ndev->mtu <= 1500) qdev->lbq_buf_size = LARGE_BUFFER_MIN_SIZE; @@ -3924,22 +3919,22 @@ static void qlge_set_lb_size(struct ql_adapter *qdev) qdev->lbq_buf_order = get_order(qdev->lbq_buf_size); } -static int ql_configure_rings(struct ql_adapter *qdev) +static int qlge_configure_rings(struct qlge_adapter *qdev) { int i; struct rx_ring *rx_ring; struct tx_ring *tx_ring; - int cpu_cnt = min(MAX_CPUS, (int)num_online_cpus()); + int cpu_cnt = min_t(int, MAX_CPUS, num_online_cpus()); /* In a perfect world we have one RSS ring for each CPU * and each has it's own vector. To do that we ask for - * cpu_cnt vectors. ql_enable_msix() will adjust the + * cpu_cnt vectors. qlge_enable_msix() will adjust the * vector count to what we actually get. We then * allocate an RSS ring for each. * Essentially, we are doing min(cpu_count, msix_vector_count). */ qdev->intr_count = cpu_cnt; - ql_enable_msix(qdev); + qlge_enable_msix(qdev); /* Adjust the RSS ring count to the actual vector count. */ qdev->rss_ring_count = qdev->intr_count; qdev->tx_ring_count = cpu_cnt; @@ -3952,7 +3947,7 @@ static int ql_configure_rings(struct ql_adapter *qdev) tx_ring->wq_id = i; tx_ring->wq_len = qdev->tx_ring_size; tx_ring->wq_size = - tx_ring->wq_len * sizeof(struct ob_mac_iocb_req); + tx_ring->wq_len * sizeof(struct qlge_ob_mac_iocb_req); /* * The completion queue ID for the tx rings start @@ -3973,7 +3968,7 @@ static int ql_configure_rings(struct ql_adapter *qdev) */ rx_ring->cq_len = qdev->rx_ring_size; rx_ring->cq_size = - rx_ring->cq_len * sizeof(struct ql_net_rsp_iocb); + rx_ring->cq_len * sizeof(struct qlge_net_rsp_iocb); rx_ring->lbq.type = QLGE_LB; rx_ring->sbq.type = QLGE_SB; INIT_DELAYED_WORK(&rx_ring->refill_work, @@ -3985,7 +3980,7 @@ static int ql_configure_rings(struct ql_adapter *qdev) /* outbound cq is same size as tx_ring it services. */ rx_ring->cq_len = qdev->tx_ring_size; rx_ring->cq_size = - rx_ring->cq_len * sizeof(struct ql_net_rsp_iocb); + rx_ring->cq_len * sizeof(struct qlge_net_rsp_iocb); } } return 0; @@ -3993,34 +3988,34 @@ static int ql_configure_rings(struct ql_adapter *qdev) static int qlge_open(struct net_device *ndev) { + struct qlge_adapter *qdev = netdev_to_qdev(ndev); int err = 0; - struct ql_adapter *qdev = netdev_priv(ndev); - err = ql_adapter_reset(qdev); + err = qlge_adapter_reset(qdev); if (err) return err; qlge_set_lb_size(qdev); - err = ql_configure_rings(qdev); + err = qlge_configure_rings(qdev); if (err) return err; - err = ql_get_adapter_resources(qdev); + err = qlge_get_adapter_resources(qdev); if (err) goto error_up; - err = ql_adapter_up(qdev); + err = qlge_adapter_up(qdev); if (err) goto error_up; return err; error_up: - ql_release_adapter_resources(qdev); + qlge_release_adapter_resources(qdev); return err; } -static int ql_change_rx_buffers(struct ql_adapter *qdev) +static int qlge_change_rx_buffers(struct qlge_adapter *qdev) { int status; @@ -4041,13 +4036,13 @@ static int ql_change_rx_buffers(struct ql_adapter *qdev) } } - status = ql_adapter_down(qdev); + status = qlge_adapter_down(qdev); if (status) goto error; qlge_set_lb_size(qdev); - status = ql_adapter_up(qdev); + status = qlge_adapter_up(qdev); if (status) goto error; @@ -4062,7 +4057,7 @@ error: static int qlge_change_mtu(struct net_device *ndev, int new_mtu) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); int status; if (ndev->mtu == 1500 && new_mtu == 9000) @@ -4080,7 +4075,7 @@ static int qlge_change_mtu(struct net_device *ndev, int new_mtu) if (!netif_running(qdev->ndev)) return 0; - status = ql_change_rx_buffers(qdev); + status = qlge_change_rx_buffers(qdev); if (status) { netif_err(qdev, ifup, qdev->ndev, "Changing MTU failed.\n"); @@ -4092,7 +4087,7 @@ static int qlge_change_mtu(struct net_device *ndev, int new_mtu) static struct net_device_stats *qlge_get_stats(struct net_device *ndev) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); struct rx_ring *rx_ring = &qdev->rx_ring[0]; struct tx_ring *tx_ring = &qdev->tx_ring[0]; unsigned long pkts, mcast, dropped, errors, bytes; @@ -4128,11 +4123,11 @@ static struct net_device_stats *qlge_get_stats(struct net_device static void qlge_set_multicast_list(struct net_device *ndev) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); struct netdev_hw_addr *ha; int i, status; - status = ql_sem_spinlock(qdev, SEM_RT_IDX_MASK); + status = qlge_sem_spinlock(qdev, SEM_RT_IDX_MASK); if (status) return; /* @@ -4141,7 +4136,7 @@ static void qlge_set_multicast_list(struct net_device *ndev) */ if (ndev->flags & IFF_PROMISC) { if (!test_bit(QL_PROMISCUOUS, &qdev->flags)) { - if (ql_set_routing_reg + if (qlge_set_routing_reg (qdev, RT_IDX_PROMISCUOUS_SLOT, RT_IDX_VALID, 1)) { netif_err(qdev, hw, qdev->ndev, "Failed to set promiscuous mode.\n"); @@ -4151,7 +4146,7 @@ static void qlge_set_multicast_list(struct net_device *ndev) } } else { if (test_bit(QL_PROMISCUOUS, &qdev->flags)) { - if (ql_set_routing_reg + if (qlge_set_routing_reg (qdev, RT_IDX_PROMISCUOUS_SLOT, RT_IDX_VALID, 0)) { netif_err(qdev, hw, qdev->ndev, "Failed to clear promiscuous mode.\n"); @@ -4168,7 +4163,7 @@ static void qlge_set_multicast_list(struct net_device *ndev) if ((ndev->flags & IFF_ALLMULTI) || (netdev_mc_count(ndev) > MAX_MULTICAST_ENTRIES)) { if (!test_bit(QL_ALLMULTI, &qdev->flags)) { - if (ql_set_routing_reg + if (qlge_set_routing_reg (qdev, RT_IDX_ALLMULTI_SLOT, RT_IDX_MCAST, 1)) { netif_err(qdev, hw, qdev->ndev, "Failed to set all-multi mode.\n"); @@ -4178,7 +4173,7 @@ static void qlge_set_multicast_list(struct net_device *ndev) } } else { if (test_bit(QL_ALLMULTI, &qdev->flags)) { - if (ql_set_routing_reg + if (qlge_set_routing_reg (qdev, RT_IDX_ALLMULTI_SLOT, RT_IDX_MCAST, 0)) { netif_err(qdev, hw, qdev->ndev, "Failed to clear all-multi mode.\n"); @@ -4189,22 +4184,22 @@ static void qlge_set_multicast_list(struct net_device *ndev) } if (!netdev_mc_empty(ndev)) { - status = ql_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); + status = qlge_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); if (status) goto exit; i = 0; netdev_for_each_mc_addr(ha, ndev) { - if (ql_set_mac_addr_reg(qdev, (u8 *)ha->addr, - MAC_ADDR_TYPE_MULTI_MAC, i)) { + if (qlge_set_mac_addr_reg(qdev, (u8 *)ha->addr, + MAC_ADDR_TYPE_MULTI_MAC, i)) { netif_err(qdev, hw, qdev->ndev, "Failed to loadmulticast address.\n"); - ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK); + qlge_sem_unlock(qdev, SEM_MAC_ADDR_MASK); goto exit; } i++; } - ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK); - if (ql_set_routing_reg + qlge_sem_unlock(qdev, SEM_MAC_ADDR_MASK); + if (qlge_set_routing_reg (qdev, RT_IDX_MCAST_MATCH_SLOT, RT_IDX_MCAST_MATCH, 1)) { netif_err(qdev, hw, qdev->ndev, "Failed to set multicast match mode.\n"); @@ -4213,12 +4208,12 @@ static void qlge_set_multicast_list(struct net_device *ndev) } } exit: - ql_sem_unlock(qdev, SEM_RT_IDX_MASK); + qlge_sem_unlock(qdev, SEM_RT_IDX_MASK); } static int qlge_set_mac_address(struct net_device *ndev, void *p) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); struct sockaddr *addr = p; int status; @@ -4228,37 +4223,37 @@ static int qlge_set_mac_address(struct net_device *ndev, void *p) /* Update local copy of current mac address. */ memcpy(qdev->current_mac_addr, ndev->dev_addr, ndev->addr_len); - status = ql_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); + status = qlge_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); if (status) return status; - status = ql_set_mac_addr_reg(qdev, (u8 *)ndev->dev_addr, - MAC_ADDR_TYPE_CAM_MAC, - qdev->func * MAX_CQ); + status = qlge_set_mac_addr_reg(qdev, (u8 *)ndev->dev_addr, + MAC_ADDR_TYPE_CAM_MAC, + qdev->func * MAX_CQ); if (status) netif_err(qdev, hw, qdev->ndev, "Failed to load MAC address.\n"); - ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK); + qlge_sem_unlock(qdev, SEM_MAC_ADDR_MASK); return status; } static void qlge_tx_timeout(struct net_device *ndev, unsigned int txqueue) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = netdev_to_qdev(ndev); - ql_queue_asic_error(qdev); + qlge_queue_asic_error(qdev); } -static void ql_asic_reset_work(struct work_struct *work) +static void qlge_asic_reset_work(struct work_struct *work) { - struct ql_adapter *qdev = - container_of(work, struct ql_adapter, asic_reset_work.work); + struct qlge_adapter *qdev = + container_of(work, struct qlge_adapter, asic_reset_work.work); int status; rtnl_lock(); - status = ql_adapter_down(qdev); + status = qlge_adapter_down(qdev); if (status) goto error; - status = ql_adapter_up(qdev); + status = qlge_adapter_up(qdev); if (status) goto error; @@ -4279,13 +4274,13 @@ error: } static const struct nic_operations qla8012_nic_ops = { - .get_flash = ql_get_8012_flash_params, - .port_initialize = ql_8012_port_initialize, + .get_flash = qlge_get_8012_flash_params, + .port_initialize = qlge_8012_port_initialize, }; static const struct nic_operations qla8000_nic_ops = { - .get_flash = ql_get_8000_flash_params, - .port_initialize = ql_8000_port_initialize, + .get_flash = qlge_get_8000_flash_params, + .port_initialize = qlge_8000_port_initialize, }; /* Find the pcie function number for the other NIC @@ -4295,21 +4290,21 @@ static const struct nic_operations qla8000_nic_ops = { * after a fatal firmware error, or doing a firmware * coredump. */ -static int ql_get_alt_pcie_func(struct ql_adapter *qdev) +static int qlge_get_alt_pcie_func(struct qlge_adapter *qdev) { int status = 0; u32 temp; u32 nic_func1, nic_func2; - status = ql_read_mpi_reg(qdev, MPI_TEST_FUNC_PORT_CFG, - &temp); + status = qlge_read_mpi_reg(qdev, MPI_TEST_FUNC_PORT_CFG, + &temp); if (status) return status; nic_func1 = ((temp >> MPI_TEST_NIC1_FUNC_SHIFT) & - MPI_TEST_NIC_FUNC_MASK); + MPI_TEST_NIC_FUNC_MASK); nic_func2 = ((temp >> MPI_TEST_NIC2_FUNC_SHIFT) & - MPI_TEST_NIC_FUNC_MASK); + MPI_TEST_NIC_FUNC_MASK); if (qdev->func == nic_func1) qdev->alt_func = nic_func2; @@ -4321,16 +4316,16 @@ static int ql_get_alt_pcie_func(struct ql_adapter *qdev) return status; } -static int ql_get_board_info(struct ql_adapter *qdev) +static int qlge_get_board_info(struct qlge_adapter *qdev) { int status; qdev->func = - (ql_read32(qdev, STS) & STS_FUNC_ID_MASK) >> STS_FUNC_ID_SHIFT; + (qlge_read32(qdev, STS) & STS_FUNC_ID_MASK) >> STS_FUNC_ID_SHIFT; if (qdev->func > 3) return -EIO; - status = ql_get_alt_pcie_func(qdev); + status = qlge_get_alt_pcie_func(qdev); if (status) return status; @@ -4348,7 +4343,7 @@ static int ql_get_board_info(struct ql_adapter *qdev) qdev->mailbox_in = PROC_ADDR_MPI_RISC | PROC_ADDR_FUNC0_MBI; qdev->mailbox_out = PROC_ADDR_MPI_RISC | PROC_ADDR_FUNC0_MBO; } - qdev->chip_rev_id = ql_read32(qdev, REV_ID); + qdev->chip_rev_id = qlge_read32(qdev, REV_ID); qdev->device_id = qdev->pdev->device; if (qdev->device_id == QLGE_DEVICE_ID_8012) qdev->nic_ops = &qla8012_nic_ops; @@ -4357,10 +4352,9 @@ static int ql_get_board_info(struct ql_adapter *qdev) return status; } -static void ql_release_all(struct pci_dev *pdev) +static void qlge_release_all(struct pci_dev *pdev) { - struct net_device *ndev = pci_get_drvdata(pdev); - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = pci_get_drvdata(pdev); if (qdev->workqueue) { destroy_workqueue(qdev->workqueue); @@ -4375,34 +4369,32 @@ static void ql_release_all(struct pci_dev *pdev) pci_release_regions(pdev); } -static int ql_init_device(struct pci_dev *pdev, struct net_device *ndev, - int cards_found) +static int qlge_init_device(struct pci_dev *pdev, struct qlge_adapter *qdev, + int cards_found) { - struct ql_adapter *qdev = netdev_priv(ndev); + struct net_device *ndev = qdev->ndev; int err = 0; - memset((void *)qdev, 0, sizeof(*qdev)); err = pci_enable_device(pdev); if (err) { dev_err(&pdev->dev, "PCI device enable failed.\n"); return err; } - qdev->ndev = ndev; qdev->pdev = pdev; - pci_set_drvdata(pdev, ndev); + pci_set_drvdata(pdev, qdev); /* Set PCIe read request size */ err = pcie_set_readrq(pdev, 4096); if (err) { dev_err(&pdev->dev, "Set readrq failed.\n"); - goto err_out1; + goto err_disable_pci; } err = pci_request_regions(pdev, DRV_NAME); if (err) { dev_err(&pdev->dev, "PCI region request failed.\n"); - return err; + goto err_disable_pci; } pci_set_master(pdev); @@ -4418,7 +4410,7 @@ static int ql_init_device(struct pci_dev *pdev, struct net_device *ndev, if (err) { dev_err(&pdev->dev, "No usable DMA configuration.\n"); - goto err_out2; + goto err_release_pci; } /* Set PCIe reset type for EEH to fundamental. */ @@ -4429,7 +4421,7 @@ static int ql_init_device(struct pci_dev *pdev, struct net_device *ndev, if (!qdev->reg_base) { dev_err(&pdev->dev, "Register mapping failed.\n"); err = -ENOMEM; - goto err_out2; + goto err_release_pci; } qdev->doorbell_area_size = pci_resource_len(pdev, 3); @@ -4438,24 +4430,24 @@ static int ql_init_device(struct pci_dev *pdev, struct net_device *ndev, if (!qdev->doorbell_area) { dev_err(&pdev->dev, "Doorbell register mapping failed.\n"); err = -ENOMEM; - goto err_out2; + goto err_iounmap_base; } - err = ql_get_board_info(qdev); + err = qlge_get_board_info(qdev); if (err) { dev_err(&pdev->dev, "Register access failed.\n"); err = -EIO; - goto err_out2; + goto err_iounmap_doorbell; } qdev->msg_enable = netif_msg_init(debug, default_msg); spin_lock_init(&qdev->stats_lock); if (qlge_mpi_coredump) { qdev->mpi_coredump = - vmalloc(sizeof(struct ql_mpi_coredump)); + vmalloc(sizeof(struct qlge_mpi_coredump)); if (!qdev->mpi_coredump) { err = -ENOMEM; - goto err_out2; + goto err_iounmap_doorbell; } if (qlge_force_coredump) set_bit(QL_FRC_COREDUMP, &qdev->flags); @@ -4464,7 +4456,7 @@ static int ql_init_device(struct pci_dev *pdev, struct net_device *ndev, err = qdev->nic_ops->get_flash(qdev); if (err) { dev_err(&pdev->dev, "Invalid FLASH.\n"); - goto err_out2; + goto err_free_mpi_coredump; } /* Keep local copy of current mac address. */ @@ -4487,15 +4479,14 @@ static int ql_init_device(struct pci_dev *pdev, struct net_device *ndev, ndev->name); if (!qdev->workqueue) { err = -ENOMEM; - goto err_out2; + goto err_free_mpi_coredump; } - INIT_DELAYED_WORK(&qdev->asic_reset_work, ql_asic_reset_work); - INIT_DELAYED_WORK(&qdev->mpi_reset_work, ql_mpi_reset_work); - INIT_DELAYED_WORK(&qdev->mpi_work, ql_mpi_work); - INIT_DELAYED_WORK(&qdev->mpi_port_cfg_work, ql_mpi_port_cfg_work); - INIT_DELAYED_WORK(&qdev->mpi_idc_work, ql_mpi_idc_work); - INIT_DELAYED_WORK(&qdev->mpi_core_to_log, ql_mpi_core_to_log); + INIT_DELAYED_WORK(&qdev->asic_reset_work, qlge_asic_reset_work); + INIT_DELAYED_WORK(&qdev->mpi_reset_work, qlge_mpi_reset_work); + INIT_DELAYED_WORK(&qdev->mpi_work, qlge_mpi_work); + INIT_DELAYED_WORK(&qdev->mpi_port_cfg_work, qlge_mpi_port_cfg_work); + INIT_DELAYED_WORK(&qdev->mpi_idc_work, qlge_mpi_idc_work); init_completion(&qdev->ide_completion); mutex_init(&qdev->mpi_mutex); @@ -4505,10 +4496,18 @@ static int ql_init_device(struct pci_dev *pdev, struct net_device *ndev, DRV_NAME, DRV_VERSION); } return 0; -err_out2: - ql_release_all(pdev); -err_out1: + +err_free_mpi_coredump: + vfree(qdev->mpi_coredump); +err_iounmap_doorbell: + iounmap(qdev->doorbell_area); +err_iounmap_base: + iounmap(qdev->reg_base); +err_release_pci: + pci_release_regions(pdev); +err_disable_pci: pci_disable_device(pdev); + return err; } @@ -4527,12 +4526,12 @@ static const struct net_device_ops qlge_netdev_ops = { .ndo_vlan_rx_kill_vid = qlge_vlan_rx_kill_vid, }; -static void ql_timer(struct timer_list *t) +static void qlge_timer(struct timer_list *t) { - struct ql_adapter *qdev = from_timer(qdev, t, timer); + struct qlge_adapter *qdev = from_timer(qdev, t, timer); u32 var = 0; - var = ql_read32(qdev, STS); + var = qlge_read32(qdev, STS); if (pci_channel_offline(qdev->pdev)) { netif_err(qdev, ifup, qdev->ndev, "EEH STS = 0x%.08x.\n", var); return; @@ -4541,36 +4540,47 @@ static void ql_timer(struct timer_list *t) mod_timer(&qdev->timer, jiffies + (5 * HZ)); } +static const struct devlink_ops qlge_devlink_ops; + static int qlge_probe(struct pci_dev *pdev, const struct pci_device_id *pci_entry) { + struct qlge_netdev_priv *ndev_priv; + struct qlge_adapter *qdev = NULL; struct net_device *ndev = NULL; - struct ql_adapter *qdev = NULL; + struct devlink *devlink; static int cards_found; int err = 0; - ndev = alloc_etherdev_mq(sizeof(struct ql_adapter), + devlink = devlink_alloc(&qlge_devlink_ops, sizeof(struct qlge_adapter)); + if (!devlink) + return -ENOMEM; + + qdev = devlink_priv(devlink); + + ndev = alloc_etherdev_mq(sizeof(struct qlge_netdev_priv), min(MAX_CPUS, netif_get_num_default_rss_queues())); if (!ndev) - return -ENOMEM; + goto devlink_free; - err = ql_init_device(pdev, ndev, cards_found); - if (err < 0) { - free_netdev(ndev); - return err; - } + ndev_priv = netdev_priv(ndev); + ndev_priv->qdev = qdev; + ndev_priv->ndev = ndev; + qdev->ndev = ndev; + err = qlge_init_device(pdev, qdev, cards_found); + if (err < 0) + goto netdev_free; - qdev = netdev_priv(ndev); SET_NETDEV_DEV(ndev, &pdev->dev); ndev->hw_features = NETIF_F_SG | - NETIF_F_IP_CSUM | - NETIF_F_TSO | - NETIF_F_TSO_ECN | - NETIF_F_HW_VLAN_CTAG_TX | - NETIF_F_HW_VLAN_CTAG_RX | - NETIF_F_HW_VLAN_CTAG_FILTER | - NETIF_F_RXCSUM; + NETIF_F_IP_CSUM | + NETIF_F_TSO | + NETIF_F_TSO_ECN | + NETIF_F_HW_VLAN_CTAG_TX | + NETIF_F_HW_VLAN_CTAG_RX | + NETIF_F_HW_VLAN_CTAG_FILTER | + NETIF_F_RXCSUM; ndev->features = ndev->hw_features; ndev->vlan_features = ndev->hw_features; /* vlan gets same features (except vlan filter) */ @@ -4601,51 +4611,67 @@ static int qlge_probe(struct pci_dev *pdev, err = register_netdev(ndev); if (err) { dev_err(&pdev->dev, "net device registration failed.\n"); - ql_release_all(pdev); + qlge_release_all(pdev); pci_disable_device(pdev); - free_netdev(ndev); - return err; + goto netdev_free; } + + err = devlink_register(devlink, &pdev->dev); + if (err) + goto netdev_free; + + qlge_health_create_reporters(qdev); /* Start up the timer to trigger EEH if * the bus goes dead */ - timer_setup(&qdev->timer, ql_timer, TIMER_DEFERRABLE); + timer_setup(&qdev->timer, qlge_timer, TIMER_DEFERRABLE); mod_timer(&qdev->timer, jiffies + (5 * HZ)); - ql_link_off(qdev); - ql_display_dev_info(ndev); + qlge_link_off(qdev); + qlge_display_dev_info(ndev); atomic_set(&qdev->lb_count, 0); cards_found++; return 0; + +netdev_free: + free_netdev(ndev); +devlink_free: + devlink_free(devlink); + + return err; } -netdev_tx_t ql_lb_send(struct sk_buff *skb, struct net_device *ndev) +netdev_tx_t qlge_lb_send(struct sk_buff *skb, struct net_device *ndev) { return qlge_send(skb, ndev); } -int ql_clean_lb_rx_ring(struct rx_ring *rx_ring, int budget) +int qlge_clean_lb_rx_ring(struct rx_ring *rx_ring, int budget) { - return ql_clean_inbound_rx_ring(rx_ring, budget); + return qlge_clean_inbound_rx_ring(rx_ring, budget); } static void qlge_remove(struct pci_dev *pdev) { - struct net_device *ndev = pci_get_drvdata(pdev); - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = pci_get_drvdata(pdev); + struct net_device *ndev = qdev->ndev; + struct devlink *devlink = priv_to_devlink(qdev); del_timer_sync(&qdev->timer); - ql_cancel_all_work_sync(qdev); + qlge_cancel_all_work_sync(qdev); unregister_netdev(ndev); - ql_release_all(pdev); + qlge_release_all(pdev); pci_disable_device(pdev); + devlink_health_reporter_destroy(qdev->reporter); + devlink_unregister(devlink); + devlink_free(devlink); free_netdev(ndev); } /* Clean up resources without touching hardware. */ -static void ql_eeh_close(struct net_device *ndev) +static void qlge_eeh_close(struct net_device *ndev) { + struct qlge_adapter *qdev = netdev_to_qdev(ndev); int i; - struct ql_adapter *qdev = netdev_priv(ndev); if (netif_carrier_ok(ndev)) { netif_carrier_off(ndev); @@ -4653,15 +4679,15 @@ static void ql_eeh_close(struct net_device *ndev) } /* Disabling the timer */ - ql_cancel_all_work_sync(qdev); + qlge_cancel_all_work_sync(qdev); for (i = 0; i < qdev->rss_ring_count; i++) netif_napi_del(&qdev->rx_ring[i].napi); clear_bit(QL_ADAPTER_UP, &qdev->flags); - ql_tx_ring_clean(qdev); - ql_free_rx_buffers(qdev); - ql_release_adapter_resources(qdev); + qlge_tx_ring_clean(qdev); + qlge_free_rx_buffers(qdev); + qlge_release_adapter_resources(qdev); } /* @@ -4671,8 +4697,8 @@ static void ql_eeh_close(struct net_device *ndev) static pci_ers_result_t qlge_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) { - struct net_device *ndev = pci_get_drvdata(pdev); - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = pci_get_drvdata(pdev); + struct net_device *ndev = qdev->ndev; switch (state) { case pci_channel_io_normal: @@ -4681,14 +4707,14 @@ static pci_ers_result_t qlge_io_error_detected(struct pci_dev *pdev, netif_device_detach(ndev); del_timer_sync(&qdev->timer); if (netif_running(ndev)) - ql_eeh_close(ndev); + qlge_eeh_close(ndev); pci_disable_device(pdev); return PCI_ERS_RESULT_NEED_RESET; case pci_channel_io_perm_failure: dev_err(&pdev->dev, "%s: pci_channel_io_perm_failure.\n", __func__); del_timer_sync(&qdev->timer); - ql_eeh_close(ndev); + qlge_eeh_close(ndev); set_bit(QL_EEH_FATAL, &qdev->flags); return PCI_ERS_RESULT_DISCONNECT; } @@ -4705,8 +4731,7 @@ static pci_ers_result_t qlge_io_error_detected(struct pci_dev *pdev, */ static pci_ers_result_t qlge_io_slot_reset(struct pci_dev *pdev) { - struct net_device *ndev = pci_get_drvdata(pdev); - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = pci_get_drvdata(pdev); pdev->error_state = pci_channel_io_normal; @@ -4718,7 +4743,7 @@ static pci_ers_result_t qlge_io_slot_reset(struct pci_dev *pdev) } pci_set_master(pdev); - if (ql_adapter_reset(qdev)) { + if (qlge_adapter_reset(qdev)) { netif_err(qdev, drv, qdev->ndev, "reset FAILED!\n"); set_bit(QL_EEH_FATAL, &qdev->flags); return PCI_ERS_RESULT_DISCONNECT; @@ -4729,8 +4754,8 @@ static pci_ers_result_t qlge_io_slot_reset(struct pci_dev *pdev) static void qlge_io_resume(struct pci_dev *pdev) { - struct net_device *ndev = pci_get_drvdata(pdev); - struct ql_adapter *qdev = netdev_priv(ndev); + struct qlge_adapter *qdev = pci_get_drvdata(pdev); + struct net_device *ndev = qdev->ndev; int err = 0; if (netif_running(ndev)) { @@ -4756,36 +4781,43 @@ static const struct pci_error_handlers qlge_err_handler = { static int __maybe_unused qlge_suspend(struct device *dev_d) { - struct net_device *ndev = dev_get_drvdata(dev_d); - struct ql_adapter *qdev = netdev_priv(ndev); + struct pci_dev *pdev = to_pci_dev(dev_d); + struct qlge_adapter *qdev; + struct net_device *ndev; int err; + qdev = pci_get_drvdata(pdev); + ndev = qdev->ndev; netif_device_detach(ndev); del_timer_sync(&qdev->timer); if (netif_running(ndev)) { - err = ql_adapter_down(qdev); + err = qlge_adapter_down(qdev); if (!err) return err; } - ql_wol(qdev); + qlge_wol(qdev); return 0; } static int __maybe_unused qlge_resume(struct device *dev_d) { - struct net_device *ndev = dev_get_drvdata(dev_d); - struct ql_adapter *qdev = netdev_priv(ndev); + struct pci_dev *pdev = to_pci_dev(dev_d); + struct qlge_adapter *qdev; + struct net_device *ndev; int err; - pci_set_master(to_pci_dev(dev_d)); + qdev = pci_get_drvdata(pdev); + ndev = qdev->ndev; + + pci_set_master(pdev); device_wakeup_disable(dev_d); if (netif_running(ndev)) { - err = ql_adapter_up(qdev); + err = qlge_adapter_up(qdev); if (err) return err; } diff --git a/drivers/staging/qlge/qlge_mpi.c b/drivers/staging/qlge/qlge_mpi.c index 2ff3db2661a9..2630ebf50341 100644 --- a/drivers/staging/qlge/qlge_mpi.c +++ b/drivers/staging/qlge/qlge_mpi.c @@ -1,28 +1,28 @@ // SPDX-License-Identifier: GPL-2.0 #include "qlge.h" -int ql_unpause_mpi_risc(struct ql_adapter *qdev) +int qlge_unpause_mpi_risc(struct qlge_adapter *qdev) { u32 tmp; /* Un-pause the RISC */ - tmp = ql_read32(qdev, CSR); + tmp = qlge_read32(qdev, CSR); if (!(tmp & CSR_RP)) return -EIO; - ql_write32(qdev, CSR, CSR_CMD_CLR_PAUSE); + qlge_write32(qdev, CSR, CSR_CMD_CLR_PAUSE); return 0; } -int ql_pause_mpi_risc(struct ql_adapter *qdev) +int qlge_pause_mpi_risc(struct qlge_adapter *qdev) { u32 tmp; int count; /* Pause the RISC */ - ql_write32(qdev, CSR, CSR_CMD_SET_PAUSE); + qlge_write32(qdev, CSR, CSR_CMD_SET_PAUSE); for (count = UDELAY_COUNT; count; count--) { - tmp = ql_read32(qdev, CSR); + tmp = qlge_read32(qdev, CSR); if (tmp & CSR_RP) break; mdelay(UDELAY_DELAY); @@ -30,17 +30,17 @@ int ql_pause_mpi_risc(struct ql_adapter *qdev) return (count == 0) ? -ETIMEDOUT : 0; } -int ql_hard_reset_mpi_risc(struct ql_adapter *qdev) +int qlge_hard_reset_mpi_risc(struct qlge_adapter *qdev) { u32 tmp; int count; /* Reset the RISC */ - ql_write32(qdev, CSR, CSR_CMD_SET_RST); + qlge_write32(qdev, CSR, CSR_CMD_SET_RST); for (count = UDELAY_COUNT; count; count--) { - tmp = ql_read32(qdev, CSR); + tmp = qlge_read32(qdev, CSR); if (tmp & CSR_RR) { - ql_write32(qdev, CSR, CSR_CMD_CLR_RST); + qlge_write32(qdev, CSR, CSR_CMD_CLR_RST); break; } mdelay(UDELAY_DELAY); @@ -48,47 +48,47 @@ int ql_hard_reset_mpi_risc(struct ql_adapter *qdev) return (count == 0) ? -ETIMEDOUT : 0; } -int ql_read_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 *data) +int qlge_read_mpi_reg(struct qlge_adapter *qdev, u32 reg, u32 *data) { int status; /* wait for reg to come ready */ - status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR); + status = qlge_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR); if (status) goto exit; /* set up for reg read */ - ql_write32(qdev, PROC_ADDR, reg | PROC_ADDR_R); + qlge_write32(qdev, PROC_ADDR, reg | PROC_ADDR_R); /* wait for reg to come ready */ - status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR); + status = qlge_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR); if (status) goto exit; /* get the data */ - *data = ql_read32(qdev, PROC_DATA); + *data = qlge_read32(qdev, PROC_DATA); exit: return status; } -int ql_write_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 data) +int qlge_write_mpi_reg(struct qlge_adapter *qdev, u32 reg, u32 data) { int status = 0; /* wait for reg to come ready */ - status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR); + status = qlge_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR); if (status) goto exit; /* write the data to the data reg */ - ql_write32(qdev, PROC_DATA, data); + qlge_write32(qdev, PROC_DATA, data); /* trigger the write */ - ql_write32(qdev, PROC_ADDR, reg); + qlge_write32(qdev, PROC_ADDR, reg); /* wait for reg to come ready */ - status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR); + status = qlge_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR); if (status) goto exit; exit: return status; } -int ql_soft_reset_mpi_risc(struct ql_adapter *qdev) +int qlge_soft_reset_mpi_risc(struct qlge_adapter *qdev) { - return ql_write_mpi_reg(qdev, 0x00001010, 1); + return qlge_write_mpi_reg(qdev, 0x00001010, 1); } /* Determine if we are in charge of the firmware. If @@ -96,7 +96,7 @@ int ql_soft_reset_mpi_risc(struct ql_adapter *qdev) * we are the higher function and the lower function * is not enabled. */ -int ql_own_firmware(struct ql_adapter *qdev) +int qlge_own_firmware(struct qlge_adapter *qdev) { u32 temp; @@ -112,43 +112,43 @@ int ql_own_firmware(struct ql_adapter *qdev) * enabled, then we are responsible for * core dump and firmware reset after an error. */ - temp = ql_read32(qdev, STS); + temp = qlge_read32(qdev, STS); if (!(temp & (1 << (8 + qdev->alt_func)))) return 1; return 0; } -static int ql_get_mb_sts(struct ql_adapter *qdev, struct mbox_params *mbcp) +static int qlge_get_mb_sts(struct qlge_adapter *qdev, struct mbox_params *mbcp) { int i, status; - status = ql_sem_spinlock(qdev, SEM_PROC_REG_MASK); + status = qlge_sem_spinlock(qdev, SEM_PROC_REG_MASK); if (status) return -EBUSY; for (i = 0; i < mbcp->out_count; i++) { status = - ql_read_mpi_reg(qdev, qdev->mailbox_out + i, - &mbcp->mbox_out[i]); + qlge_read_mpi_reg(qdev, qdev->mailbox_out + i, + &mbcp->mbox_out[i]); if (status) { netif_err(qdev, drv, qdev->ndev, "Failed mailbox read.\n"); break; } } - ql_sem_unlock(qdev, SEM_PROC_REG_MASK); /* does flush too */ + qlge_sem_unlock(qdev, SEM_PROC_REG_MASK); /* does flush too */ return status; } /* Wait for a single mailbox command to complete. * Returns zero on success. */ -static int ql_wait_mbx_cmd_cmplt(struct ql_adapter *qdev) +static int qlge_wait_mbx_cmd_cmplt(struct qlge_adapter *qdev) { int count; u32 value; for (count = 100; count; count--) { - value = ql_read32(qdev, STS); + value = qlge_read32(qdev, STS); if (value & STS_PI) return 0; mdelay(UDELAY_DELAY); /* 100ms */ @@ -159,7 +159,7 @@ static int ql_wait_mbx_cmd_cmplt(struct ql_adapter *qdev) /* Execute a single mailbox command. * Caller must hold PROC_ADDR semaphore. */ -static int ql_exec_mb_cmd(struct ql_adapter *qdev, struct mbox_params *mbcp) +static int qlge_exec_mb_cmd(struct qlge_adapter *qdev, struct mbox_params *mbcp) { int i, status; @@ -167,10 +167,10 @@ static int ql_exec_mb_cmd(struct ql_adapter *qdev, struct mbox_params *mbcp) * Make sure there's nothing pending. * This shouldn't happen. */ - if (ql_read32(qdev, CSR) & CSR_HRI) + if (qlge_read32(qdev, CSR) & CSR_HRI) return -EIO; - status = ql_sem_spinlock(qdev, SEM_PROC_REG_MASK); + status = qlge_sem_spinlock(qdev, SEM_PROC_REG_MASK); if (status) return status; @@ -178,17 +178,17 @@ static int ql_exec_mb_cmd(struct ql_adapter *qdev, struct mbox_params *mbcp) * Fill the outbound mailboxes. */ for (i = 0; i < mbcp->in_count; i++) { - status = ql_write_mpi_reg(qdev, qdev->mailbox_in + i, - mbcp->mbox_in[i]); + status = qlge_write_mpi_reg(qdev, qdev->mailbox_in + i, + mbcp->mbox_in[i]); if (status) goto end; } /* * Wake up the MPI firmware. */ - ql_write32(qdev, CSR, CSR_CMD_SET_H2R_INT); + qlge_write32(qdev, CSR, CSR_CMD_SET_H2R_INT); end: - ql_sem_unlock(qdev, SEM_PROC_REG_MASK); + qlge_sem_unlock(qdev, SEM_PROC_REG_MASK); return status; } @@ -199,7 +199,7 @@ end: * to handler processing this since a mailbox command * will need to be sent to ACK the request. */ -static int ql_idc_req_aen(struct ql_adapter *qdev) +static int qlge_idc_req_aen(struct qlge_adapter *qdev) { int status; struct mbox_params *mbcp = &qdev->idc_mbc; @@ -209,17 +209,17 @@ static int ql_idc_req_aen(struct ql_adapter *qdev) * handle the request. */ mbcp->out_count = 4; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); if (status) { netif_err(qdev, drv, qdev->ndev, "Could not read MPI, resetting ASIC!\n"); - ql_queue_asic_error(qdev); + qlge_queue_asic_error(qdev); } else { /* Begin polled mode early so * we don't get another interrupt * when we leave mpi_worker. */ - ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); + qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); queue_delayed_work(qdev->workqueue, &qdev->mpi_idc_work, 0); } return status; @@ -228,17 +228,17 @@ static int ql_idc_req_aen(struct ql_adapter *qdev) /* Process an inter-device event completion. * If good, signal the caller's completion. */ -static int ql_idc_cmplt_aen(struct ql_adapter *qdev) +static int qlge_idc_cmplt_aen(struct qlge_adapter *qdev) { int status; struct mbox_params *mbcp = &qdev->idc_mbc; mbcp->out_count = 4; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); if (status) { netif_err(qdev, drv, qdev->ndev, "Could not read MPI, resetting RISC!\n"); - ql_queue_fw_error(qdev); + qlge_queue_fw_error(qdev); } else { /* Wake up the sleeping mpi_idc_work thread that is * waiting for this event. @@ -248,13 +248,13 @@ static int ql_idc_cmplt_aen(struct ql_adapter *qdev) return status; } -static void ql_link_up(struct ql_adapter *qdev, struct mbox_params *mbcp) +static void qlge_link_up(struct qlge_adapter *qdev, struct mbox_params *mbcp) { int status; mbcp->out_count = 2; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); if (status) { netif_err(qdev, drv, qdev->ndev, "%s: Could not get mailbox status.\n", __func__); @@ -268,7 +268,7 @@ static void ql_link_up(struct ql_adapter *qdev, struct mbox_params *mbcp) * then set up the CAM and frame routing. */ if (test_bit(QL_CAM_RT_SET, &qdev->flags)) { - status = ql_cam_route_initialize(qdev); + status = qlge_cam_route_initialize(qdev); if (status) { netif_err(qdev, ifup, qdev->ndev, "Failed to init CAM/Routing tables.\n"); @@ -288,34 +288,34 @@ static void ql_link_up(struct ql_adapter *qdev, struct mbox_params *mbcp) * we don't get another interrupt * when we leave mpi_worker dpc. */ - ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); + qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); queue_delayed_work(qdev->workqueue, &qdev->mpi_port_cfg_work, 0); } - ql_link_on(qdev); + qlge_link_on(qdev); } -static void ql_link_down(struct ql_adapter *qdev, struct mbox_params *mbcp) +static void qlge_link_down(struct qlge_adapter *qdev, struct mbox_params *mbcp) { int status; mbcp->out_count = 3; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); if (status) netif_err(qdev, drv, qdev->ndev, "Link down AEN broken!\n"); - ql_link_off(qdev); + qlge_link_off(qdev); } -static int ql_sfp_in(struct ql_adapter *qdev, struct mbox_params *mbcp) +static int qlge_sfp_in(struct qlge_adapter *qdev, struct mbox_params *mbcp) { int status; mbcp->out_count = 5; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); if (status) netif_err(qdev, drv, qdev->ndev, "SFP in AEN broken!\n"); else @@ -324,13 +324,13 @@ static int ql_sfp_in(struct ql_adapter *qdev, struct mbox_params *mbcp) return status; } -static int ql_sfp_out(struct ql_adapter *qdev, struct mbox_params *mbcp) +static int qlge_sfp_out(struct qlge_adapter *qdev, struct mbox_params *mbcp) { int status; mbcp->out_count = 1; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); if (status) netif_err(qdev, drv, qdev->ndev, "SFP out AEN broken!\n"); else @@ -339,13 +339,13 @@ static int ql_sfp_out(struct ql_adapter *qdev, struct mbox_params *mbcp) return status; } -static int ql_aen_lost(struct ql_adapter *qdev, struct mbox_params *mbcp) +static int qlge_aen_lost(struct qlge_adapter *qdev, struct mbox_params *mbcp) { int status; mbcp->out_count = 6; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); if (status) { netif_err(qdev, drv, qdev->ndev, "Lost AEN broken!\n"); } else { @@ -360,20 +360,20 @@ static int ql_aen_lost(struct ql_adapter *qdev, struct mbox_params *mbcp) return status; } -static void ql_init_fw_done(struct ql_adapter *qdev, struct mbox_params *mbcp) +static void qlge_init_fw_done(struct qlge_adapter *qdev, struct mbox_params *mbcp) { int status; mbcp->out_count = 2; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); if (status) { netif_err(qdev, drv, qdev->ndev, "Firmware did not initialize!\n"); } else { netif_err(qdev, drv, qdev->ndev, "Firmware Revision = 0x%.08x.\n", mbcp->mbox_out[1]); qdev->fw_rev_id = mbcp->mbox_out[1]; - status = ql_cam_route_initialize(qdev); + status = qlge_cam_route_initialize(qdev); if (status) netif_err(qdev, ifup, qdev->ndev, "Failed to init CAM/Routing tables.\n"); @@ -387,26 +387,26 @@ static void ql_init_fw_done(struct ql_adapter *qdev, struct mbox_params *mbcp) * It also gets called when a mailbox command is polling for * it's completion. */ -static int ql_mpi_handler(struct ql_adapter *qdev, struct mbox_params *mbcp) +static int qlge_mpi_handler(struct qlge_adapter *qdev, struct mbox_params *mbcp) { int status; int orig_count = mbcp->out_count; /* Just get mailbox zero for now. */ mbcp->out_count = 1; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); if (status) { netif_err(qdev, drv, qdev->ndev, "Could not read MPI, resetting ASIC!\n"); - ql_queue_asic_error(qdev); + qlge_queue_asic_error(qdev); goto end; } switch (mbcp->mbox_out[0]) { - /* This case is only active when we arrive here - * as a result of issuing a mailbox command to - * the firmware. - */ + /* This case is only active when we arrive here + * as a result of issuing a mailbox command to + * the firmware. + */ case MB_CMD_STS_INTRMDT: case MB_CMD_STS_GOOD: case MB_CMD_STS_INVLD_CMD: @@ -421,34 +421,34 @@ static int ql_mpi_handler(struct ql_adapter *qdev, struct mbox_params *mbcp) * command completion. */ mbcp->out_count = orig_count; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); return status; - /* We are being asked by firmware to accept - * a change to the port. This is only - * a change to max frame sizes (Tx/Rx), pause - * parameters, or loopback mode. - */ + /* We are being asked by firmware to accept + * a change to the port. This is only + * a change to max frame sizes (Tx/Rx), pause + * parameters, or loopback mode. + */ case AEN_IDC_REQ: - status = ql_idc_req_aen(qdev); + status = qlge_idc_req_aen(qdev); break; - /* Process and inbound IDC event. - * This will happen when we're trying to - * change tx/rx max frame size, change pause - * parameters or loopback mode. - */ + /* Process and inbound IDC event. + * This will happen when we're trying to + * change tx/rx max frame size, change pause + * parameters or loopback mode. + */ case AEN_IDC_CMPLT: case AEN_IDC_EXT: - status = ql_idc_cmplt_aen(qdev); + status = qlge_idc_cmplt_aen(qdev); break; case AEN_LINK_UP: - ql_link_up(qdev, mbcp); + qlge_link_up(qdev, mbcp); break; case AEN_LINK_DOWN: - ql_link_down(qdev, mbcp); + qlge_link_down(qdev, mbcp); break; case AEN_FW_INIT_DONE: @@ -457,48 +457,48 @@ static int ql_mpi_handler(struct ql_adapter *qdev, struct mbox_params *mbcp) */ if (mbcp->mbox_in[0] == MB_CMD_EX_FW) { mbcp->out_count = orig_count; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); mbcp->mbox_out[0] = MB_CMD_STS_GOOD; return status; } - ql_init_fw_done(qdev, mbcp); + qlge_init_fw_done(qdev, mbcp); break; case AEN_AEN_SFP_IN: - ql_sfp_in(qdev, mbcp); + qlge_sfp_in(qdev, mbcp); break; case AEN_AEN_SFP_OUT: - ql_sfp_out(qdev, mbcp); + qlge_sfp_out(qdev, mbcp); break; - /* This event can arrive at boot time or after an - * MPI reset if the firmware failed to initialize. - */ + /* This event can arrive at boot time or after an + * MPI reset if the firmware failed to initialize. + */ case AEN_FW_INIT_FAIL: /* If we're in process on executing the firmware, * then convert the status to normal mailbox status. */ if (mbcp->mbox_in[0] == MB_CMD_EX_FW) { mbcp->out_count = orig_count; - status = ql_get_mb_sts(qdev, mbcp); + status = qlge_get_mb_sts(qdev, mbcp); mbcp->mbox_out[0] = MB_CMD_STS_ERR; return status; } netif_err(qdev, drv, qdev->ndev, "Firmware initialization failed.\n"); status = -EIO; - ql_queue_fw_error(qdev); + qlge_queue_fw_error(qdev); break; case AEN_SYS_ERR: netif_err(qdev, drv, qdev->ndev, "System Error.\n"); - ql_queue_fw_error(qdev); + qlge_queue_fw_error(qdev); status = -EIO; break; case AEN_AEN_LOST: - ql_aen_lost(qdev, mbcp); + qlge_aen_lost(qdev, mbcp); break; case AEN_DCBX_CHG: @@ -510,7 +510,7 @@ static int ql_mpi_handler(struct ql_adapter *qdev, struct mbox_params *mbcp) /* Clear the MPI firmware status. */ } end: - ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT); + qlge_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT); /* Restore the original mailbox count to * what the caller asked for. This can get * changed when a mailbox command is waiting @@ -526,7 +526,7 @@ end: * element in the array contains the value for it's * respective mailbox register. */ -static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) +static int qlge_mailbox_command(struct qlge_adapter *qdev, struct mbox_params *mbcp) { int status; unsigned long count; @@ -534,10 +534,10 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) mutex_lock(&qdev->mpi_mutex); /* Begin polled mode for MPI */ - ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); + qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); /* Load the mailbox registers and wake up MPI RISC. */ - status = ql_exec_mb_cmd(qdev, mbcp); + status = qlge_exec_mb_cmd(qdev, mbcp); if (status) goto end; @@ -556,7 +556,7 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) count = jiffies + HZ * MAILBOX_TIMEOUT; do { /* Wait for the interrupt to come in. */ - status = ql_wait_mbx_cmd_cmplt(qdev); + status = qlge_wait_mbx_cmd_cmplt(qdev); if (status) continue; @@ -565,7 +565,7 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) * will be spawned. If it's our completion * we will catch it below. */ - status = ql_mpi_handler(qdev, mbcp); + status = qlge_mpi_handler(qdev, mbcp); if (status) goto end; @@ -574,9 +574,9 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) * completion then get out. */ if (((mbcp->mbox_out[0] & 0x0000f000) == - MB_CMD_STS_GOOD) || - ((mbcp->mbox_out[0] & 0x0000f000) == - MB_CMD_STS_INTRMDT)) + MB_CMD_STS_GOOD) || + ((mbcp->mbox_out[0] & 0x0000f000) == + MB_CMD_STS_INTRMDT)) goto done; } while (time_before(jiffies, count)); @@ -590,17 +590,17 @@ done: /* Now we can clear the interrupt condition * and look at our status. */ - ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT); + qlge_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT); if (((mbcp->mbox_out[0] & 0x0000f000) != - MB_CMD_STS_GOOD) && - ((mbcp->mbox_out[0] & 0x0000f000) != - MB_CMD_STS_INTRMDT)) { + MB_CMD_STS_GOOD) && + ((mbcp->mbox_out[0] & 0x0000f000) != + MB_CMD_STS_INTRMDT)) { status = -EIO; } end: /* End polled mode for MPI */ - ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); + qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); mutex_unlock(&qdev->mpi_mutex); return status; } @@ -609,7 +609,7 @@ end: * driver banner and for ethtool info. * Returns zero on success. */ -int ql_mb_about_fw(struct ql_adapter *qdev) +int qlge_mb_about_fw(struct qlge_adapter *qdev) { struct mbox_params mbc; struct mbox_params *mbcp = &mbc; @@ -622,7 +622,7 @@ int ql_mb_about_fw(struct ql_adapter *qdev) mbcp->mbox_in[0] = MB_CMD_ABOUT_FW; - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -641,7 +641,7 @@ int ql_mb_about_fw(struct ql_adapter *qdev) /* Get functional state for MPI firmware. * Returns zero on success. */ -int ql_mb_get_fw_state(struct ql_adapter *qdev) +int qlge_mb_get_fw_state(struct qlge_adapter *qdev) { struct mbox_params mbc; struct mbox_params *mbcp = &mbc; @@ -654,7 +654,7 @@ int ql_mb_get_fw_state(struct ql_adapter *qdev) mbcp->mbox_in[0] = MB_CMD_GET_FW_STATE; - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -680,7 +680,7 @@ int ql_mb_get_fw_state(struct ql_adapter *qdev) /* Send and ACK mailbox command to the firmware to * let it continue with the change. */ -static int ql_mb_idc_ack(struct ql_adapter *qdev) +static int qlge_mb_idc_ack(struct qlge_adapter *qdev) { struct mbox_params mbc; struct mbox_params *mbcp = &mbc; @@ -697,7 +697,7 @@ static int ql_mb_idc_ack(struct ql_adapter *qdev) mbcp->mbox_in[3] = qdev->idc_mbc.mbox_out[3]; mbcp->mbox_in[4] = qdev->idc_mbc.mbox_out[4]; - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -712,7 +712,7 @@ static int ql_mb_idc_ack(struct ql_adapter *qdev) * for the current port. * Most likely will block. */ -int ql_mb_set_port_cfg(struct ql_adapter *qdev) +int qlge_mb_set_port_cfg(struct qlge_adapter *qdev) { struct mbox_params mbc; struct mbox_params *mbcp = &mbc; @@ -727,7 +727,7 @@ int ql_mb_set_port_cfg(struct ql_adapter *qdev) mbcp->mbox_in[1] = qdev->link_config; mbcp->mbox_in[2] = qdev->max_frame_size; - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -742,8 +742,8 @@ int ql_mb_set_port_cfg(struct ql_adapter *qdev) return status; } -static int ql_mb_dump_ram(struct ql_adapter *qdev, u64 req_dma, u32 addr, - u32 size) +static int qlge_mb_dump_ram(struct qlge_adapter *qdev, u64 req_dma, u32 addr, + u32 size) { int status = 0; struct mbox_params mbc; @@ -764,7 +764,7 @@ static int ql_mb_dump_ram(struct ql_adapter *qdev, u64 req_dma, u32 addr, mbcp->mbox_in[7] = LSW(MSD(req_dma)); mbcp->mbox_in[8] = MSW(addr); - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -776,8 +776,8 @@ static int ql_mb_dump_ram(struct ql_adapter *qdev, u64 req_dma, u32 addr, } /* Issue a mailbox command to dump RISC RAM. */ -int ql_dump_risc_ram_area(struct ql_adapter *qdev, void *buf, - u32 ram_addr, int word_count) +int qlge_dump_risc_ram_area(struct qlge_adapter *qdev, void *buf, + u32 ram_addr, int word_count) { int status; char *my_buf; @@ -789,7 +789,7 @@ int ql_dump_risc_ram_area(struct ql_adapter *qdev, void *buf, if (!my_buf) return -EIO; - status = ql_mb_dump_ram(qdev, buf_dma, ram_addr, word_count); + status = qlge_mb_dump_ram(qdev, buf_dma, ram_addr, word_count); if (!status) memcpy(buf, my_buf, word_count * sizeof(u32)); @@ -802,7 +802,7 @@ int ql_dump_risc_ram_area(struct ql_adapter *qdev, void *buf, * for the current port. * Most likely will block. */ -int ql_mb_get_port_cfg(struct ql_adapter *qdev) +int qlge_mb_get_port_cfg(struct qlge_adapter *qdev) { struct mbox_params mbc; struct mbox_params *mbcp = &mbc; @@ -815,7 +815,7 @@ int ql_mb_get_port_cfg(struct ql_adapter *qdev) mbcp->mbox_in[0] = MB_CMD_GET_PORT_CFG; - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -832,7 +832,7 @@ int ql_mb_get_port_cfg(struct ql_adapter *qdev) return status; } -int ql_mb_wol_mode(struct ql_adapter *qdev, u32 wol) +int qlge_mb_wol_mode(struct qlge_adapter *qdev, u32 wol) { struct mbox_params mbc; struct mbox_params *mbcp = &mbc; @@ -846,7 +846,7 @@ int ql_mb_wol_mode(struct ql_adapter *qdev, u32 wol) mbcp->mbox_in[0] = MB_CMD_SET_WOL_MODE; mbcp->mbox_in[1] = wol; - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -857,7 +857,7 @@ int ql_mb_wol_mode(struct ql_adapter *qdev, u32 wol) return status; } -int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol) +int qlge_mb_wol_set_magic(struct qlge_adapter *qdev, u32 enable_wol) { struct mbox_params mbc; struct mbox_params *mbcp = &mbc; @@ -888,7 +888,7 @@ int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol) mbcp->mbox_in[7] = 0; } - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -906,7 +906,7 @@ int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol) * The firmware will complete the request if the other * function doesn't respond. */ -static int ql_idc_wait(struct ql_adapter *qdev) +static int qlge_idc_wait(struct qlge_adapter *qdev) { int status = -ETIMEDOUT; struct mbox_params *mbcp = &qdev->idc_mbc; @@ -947,7 +947,7 @@ static int ql_idc_wait(struct ql_adapter *qdev) return status; } -int ql_mb_set_led_cfg(struct ql_adapter *qdev, u32 led_config) +int qlge_mb_set_led_cfg(struct qlge_adapter *qdev, u32 led_config) { struct mbox_params mbc; struct mbox_params *mbcp = &mbc; @@ -961,7 +961,7 @@ int ql_mb_set_led_cfg(struct ql_adapter *qdev, u32 led_config) mbcp->mbox_in[0] = MB_CMD_SET_LED_CFG; mbcp->mbox_in[1] = led_config; - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -974,7 +974,7 @@ int ql_mb_set_led_cfg(struct ql_adapter *qdev, u32 led_config) return status; } -int ql_mb_get_led_cfg(struct ql_adapter *qdev) +int qlge_mb_get_led_cfg(struct qlge_adapter *qdev) { struct mbox_params mbc; struct mbox_params *mbcp = &mbc; @@ -987,7 +987,7 @@ int ql_mb_get_led_cfg(struct ql_adapter *qdev) mbcp->mbox_in[0] = MB_CMD_GET_LED_CFG; - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -1001,7 +1001,7 @@ int ql_mb_get_led_cfg(struct ql_adapter *qdev) return status; } -int ql_mb_set_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 control) +int qlge_mb_set_mgmnt_traffic_ctl(struct qlge_adapter *qdev, u32 control) { struct mbox_params mbc; struct mbox_params *mbcp = &mbc; @@ -1015,7 +1015,7 @@ int ql_mb_set_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 control) mbcp->mbox_in[0] = MB_CMD_SET_MGMNT_TFK_CTL; mbcp->mbox_in[1] = control; - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -1038,7 +1038,7 @@ int ql_mb_set_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 control) } /* Returns a negative error code or the mailbox command status. */ -static int ql_mb_get_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 *control) +static int qlge_mb_get_mgmnt_traffic_ctl(struct qlge_adapter *qdev, u32 *control) { struct mbox_params mbc; struct mbox_params *mbcp = &mbc; @@ -1052,7 +1052,7 @@ static int ql_mb_get_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 *control) mbcp->mbox_in[0] = MB_CMD_GET_MGMNT_TFK_CTL; - status = ql_mailbox_command(qdev, mbcp); + status = qlge_mailbox_command(qdev, mbcp); if (status) return status; @@ -1073,15 +1073,15 @@ static int ql_mb_get_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 *control) return status; } -int ql_wait_fifo_empty(struct ql_adapter *qdev) +int qlge_wait_fifo_empty(struct qlge_adapter *qdev) { int count; u32 mgmnt_fifo_empty; u32 nic_fifo_empty; for (count = 6; count; count--) { - nic_fifo_empty = ql_read32(qdev, STS) & STS_NFE; - ql_mb_get_mgmnt_traffic_ctl(qdev, &mgmnt_fifo_empty); + nic_fifo_empty = qlge_read32(qdev, STS) & STS_NFE; + qlge_mb_get_mgmnt_traffic_ctl(qdev, &mgmnt_fifo_empty); mgmnt_fifo_empty &= MB_GET_MPI_TFK_FIFO_EMPTY; if (nic_fifo_empty && mgmnt_fifo_empty) return 0; @@ -1093,14 +1093,14 @@ int ql_wait_fifo_empty(struct ql_adapter *qdev) /* API called in work thread context to set new TX/RX * maximum frame size values to match MTU. */ -static int ql_set_port_cfg(struct ql_adapter *qdev) +static int qlge_set_port_cfg(struct qlge_adapter *qdev) { int status; - status = ql_mb_set_port_cfg(qdev); + status = qlge_mb_set_port_cfg(qdev); if (status) return status; - status = ql_idc_wait(qdev); + status = qlge_idc_wait(qdev); return status; } @@ -1112,13 +1112,13 @@ static int ql_set_port_cfg(struct ql_adapter *qdev) * from the firmware and, if necessary, changes them to match * the MTU setting. */ -void ql_mpi_port_cfg_work(struct work_struct *work) +void qlge_mpi_port_cfg_work(struct work_struct *work) { - struct ql_adapter *qdev = - container_of(work, struct ql_adapter, mpi_port_cfg_work.work); + struct qlge_adapter *qdev = + container_of(work, struct qlge_adapter, mpi_port_cfg_work.work); int status; - status = ql_mb_get_port_cfg(qdev); + status = qlge_mb_get_port_cfg(qdev); if (status) { netif_err(qdev, drv, qdev->ndev, "Bug: Failed to get port config data.\n"); @@ -1131,7 +1131,7 @@ void ql_mpi_port_cfg_work(struct work_struct *work) qdev->link_config |= CFG_JUMBO_FRAME_SIZE; qdev->max_frame_size = CFG_DEFAULT_MAX_FRAME_SIZE; - status = ql_set_port_cfg(qdev); + status = qlge_set_port_cfg(qdev); if (status) { netif_err(qdev, drv, qdev->ndev, "Bug: Failed to set port config data.\n"); @@ -1141,7 +1141,7 @@ end: clear_bit(QL_PORT_CFG, &qdev->flags); return; err: - ql_queue_fw_error(qdev); + qlge_queue_fw_error(qdev); goto end; } @@ -1151,10 +1151,10 @@ err: * has been made and then send a mailbox command ACKing * the change request. */ -void ql_mpi_idc_work(struct work_struct *work) +void qlge_mpi_idc_work(struct work_struct *work) { - struct ql_adapter *qdev = - container_of(work, struct ql_adapter, mpi_idc_work.work); + struct qlge_adapter *qdev = + container_of(work, struct qlge_adapter, mpi_idc_work.work); int status; struct mbox_params *mbcp = &qdev->idc_mbc; u32 aen; @@ -1170,7 +1170,7 @@ void ql_mpi_idc_work(struct work_struct *work) break; case MB_CMD_PORT_RESET: case MB_CMD_STOP_FW: - ql_link_off(qdev); + qlge_link_off(qdev); fallthrough; case MB_CMD_SET_PORT_CFG: /* Signal the resulting link up AEN @@ -1180,7 +1180,7 @@ void ql_mpi_idc_work(struct work_struct *work) set_bit(QL_CAM_RT_SET, &qdev->flags); /* Do ACK if required */ if (timeout) { - status = ql_mb_idc_ack(qdev); + status = qlge_mb_idc_ack(qdev); if (status) netif_err(qdev, drv, qdev->ndev, "Bug: No pending IDC!\n"); @@ -1191,18 +1191,18 @@ void ql_mpi_idc_work(struct work_struct *work) } break; - /* These sub-commands issued by another (FCoE) - * function are requesting to do an operation - * on the shared resource (MPI environment). - * We currently don't issue these so we just - * ACK the request. - */ + /* These sub-commands issued by another (FCoE) + * function are requesting to do an operation + * on the shared resource (MPI environment). + * We currently don't issue these so we just + * ACK the request. + */ case MB_CMD_IOP_RESTART_MPI: case MB_CMD_IOP_PREP_LINK_DOWN: /* Drop the link, reload the routing * table when link comes up. */ - ql_link_off(qdev); + qlge_link_off(qdev); set_bit(QL_CAM_RT_SET, &qdev->flags); fallthrough; case MB_CMD_IOP_DVR_START: @@ -1213,7 +1213,7 @@ void ql_mpi_idc_work(struct work_struct *work) case MB_CMD_IOP_NONE: /* an IDC without params */ /* Do ACK if required */ if (timeout) { - status = ql_mb_idc_ack(qdev); + status = qlge_mb_idc_ack(qdev); if (status) netif_err(qdev, drv, qdev->ndev, "Bug: No pending IDC!\n"); @@ -1226,54 +1226,48 @@ void ql_mpi_idc_work(struct work_struct *work) } } -void ql_mpi_work(struct work_struct *work) +void qlge_mpi_work(struct work_struct *work) { - struct ql_adapter *qdev = - container_of(work, struct ql_adapter, mpi_work.work); + struct qlge_adapter *qdev = + container_of(work, struct qlge_adapter, mpi_work.work); struct mbox_params mbc; struct mbox_params *mbcp = &mbc; int err = 0; mutex_lock(&qdev->mpi_mutex); /* Begin polled mode for MPI */ - ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); + qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); - while (ql_read32(qdev, STS) & STS_PI) { + while (qlge_read32(qdev, STS) & STS_PI) { memset(mbcp, 0, sizeof(struct mbox_params)); mbcp->out_count = 1; /* Don't continue if an async event * did not complete properly. */ - err = ql_mpi_handler(qdev, mbcp); + err = qlge_mpi_handler(qdev, mbcp); if (err) break; } /* End polled mode for MPI */ - ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); + qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); mutex_unlock(&qdev->mpi_mutex); } -void ql_mpi_reset_work(struct work_struct *work) +void qlge_mpi_reset_work(struct work_struct *work) { - struct ql_adapter *qdev = - container_of(work, struct ql_adapter, mpi_reset_work.work); + struct qlge_adapter *qdev = + container_of(work, struct qlge_adapter, mpi_reset_work.work); cancel_delayed_work_sync(&qdev->mpi_work); cancel_delayed_work_sync(&qdev->mpi_port_cfg_work); cancel_delayed_work_sync(&qdev->mpi_idc_work); /* If we're not the dominant NIC function, * then there is nothing to do. */ - if (!ql_own_firmware(qdev)) { + if (!qlge_own_firmware(qdev)) { netif_err(qdev, drv, qdev->ndev, "Don't own firmware!\n"); return; } - if (qdev->mpi_coredump && !ql_core_dump(qdev, qdev->mpi_coredump)) { - netif_err(qdev, drv, qdev->ndev, "Core is dumped!\n"); - qdev->core_is_dumped = 1; - queue_delayed_work(qdev->workqueue, - &qdev->mpi_core_to_log, 5 * HZ); - } - ql_soft_reset_mpi_risc(qdev); + qlge_soft_reset_mpi_risc(qdev); } diff --git a/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c b/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c index 8794907a39f4..ebd9b96a8211 100644 --- a/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c +++ b/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c @@ -779,7 +779,7 @@ static void issue_auth(struct adapter *padapter, struct sta_info *psta, /* setting auth algo number */ val16 = (u16)psta->authalg; - if (status != _STATS_SUCCESSFUL_) + if (status != WLAN_STATUS_SUCCESS) val16 = 0; if (val16) { @@ -2675,13 +2675,13 @@ static unsigned int OnAuth(struct adapter *padapter, DBG_88E("auth rejected due to bad alg [alg=%d, auth_mib=%d] %02X%02X%02X%02X%02X%02X\n", algorithm, auth_mode, sa[0], sa[1], sa[2], sa[3], sa[4], sa[5]); - status = _STATS_NO_SUPP_ALG_; + status = WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG; goto auth_fail; } if (!rtw_access_ctrl(padapter, sa)) { - status = _STATS_UNABLE_HANDLE_STA_; + status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA; goto auth_fail; } @@ -2692,7 +2692,7 @@ static unsigned int OnAuth(struct adapter *padapter, pstat = rtw_alloc_stainfo(pstapriv, sa); if (!pstat) { DBG_88E(" Exceed the upper limit of supported clients...\n"); - status = _STATS_UNABLE_HANDLE_STA_; + status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA; goto auth_fail; } @@ -2724,7 +2724,7 @@ static unsigned int OnAuth(struct adapter *padapter, if ((pstat->auth_seq + 1) != seq) { DBG_88E("(1)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", seq, pstat->auth_seq + 1); - status = _STATS_OUT_OF_AUTH_SEQ_; + status = WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION; goto auth_fail; } @@ -2737,7 +2737,7 @@ static unsigned int OnAuth(struct adapter *padapter, } else { DBG_88E("(2)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", seq, pstat->auth_seq + 1); - status = _STATS_OUT_OF_AUTH_SEQ_; + status = WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION; goto auth_fail; } } else { /* shared system or auto authentication */ @@ -2757,7 +2757,7 @@ static unsigned int OnAuth(struct adapter *padapter, if (!p || ie_len <= 0) { DBG_88E("auth rejected because challenge failure!(1)\n"); - status = _STATS_CHALLENGE_FAIL_; + status = WLAN_STATUS_CHALLENGE_FAIL; goto auth_fail; } @@ -2768,13 +2768,13 @@ static unsigned int OnAuth(struct adapter *padapter, pstat->expire_to = pstapriv->assoc_to; } else { DBG_88E("auth rejected because challenge failure!\n"); - status = _STATS_CHALLENGE_FAIL_; + status = WLAN_STATUS_CHALLENGE_FAIL; goto auth_fail; } } else { DBG_88E("(3)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", seq, pstat->auth_seq + 1); - status = _STATS_OUT_OF_AUTH_SEQ_; + status = WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION; goto auth_fail; } } @@ -2782,7 +2782,7 @@ static unsigned int OnAuth(struct adapter *padapter, /* Now, we are going to issue_auth... */ pstat->auth_seq = seq + 1; - issue_auth(padapter, pstat, (unsigned short)(_STATS_SUCCESSFUL_)); + issue_auth(padapter, pstat, (unsigned short)(WLAN_STATUS_SUCCESS)); if (pstat->state & WIFI_FW_AUTH_SUCCESS) pstat->auth_seq = 0; @@ -2892,7 +2892,7 @@ static unsigned int OnAssocReq(struct adapter *padapter, int i, wpa_ie_len, left; unsigned char supportRate[16]; int supportRateNum; - unsigned short status = _STATS_SUCCESSFUL_; + unsigned short status = WLAN_STATUS_SUCCESS; unsigned short frame_type, ie_offset = 0; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; @@ -2953,7 +2953,7 @@ static unsigned int OnAssocReq(struct adapter *padapter, !elems.ssid) { DBG_88E("STA %pM sent invalid association request\n", pstat->hwaddr); - status = _STATS_FAILURE_; + status = WLAN_STATUS_UNSPECIFIED_FAILURE; goto OnAssocReqFail; } @@ -2964,18 +2964,18 @@ static unsigned int OnAssocReq(struct adapter *padapter, if (!p || ie_len == 0) { /* broadcast ssid, however it is not allowed in assocreq */ - status = _STATS_FAILURE_; + status = WLAN_STATUS_UNSPECIFIED_FAILURE; goto OnAssocReqFail; } else { /* check if ssid match */ if (memcmp((void *)(p + 2), cur->ssid.ssid, cur->ssid.ssid_length)) - status = _STATS_FAILURE_; + status = WLAN_STATUS_UNSPECIFIED_FAILURE; if (ie_len != cur->ssid.ssid_length) - status = _STATS_FAILURE_; + status = WLAN_STATUS_UNSPECIFIED_FAILURE; } - if (status != _STATS_SUCCESSFUL_) + if (status != WLAN_STATUS_SUCCESS) goto OnAssocReqFail; /* check if the supported rate is ok */ @@ -2986,7 +2986,7 @@ static unsigned int OnAssocReq(struct adapter *padapter, /* memcpy(supportRate, AP_BSSRATE, AP_BSSRATE_LEN); */ /* supportRateNum = AP_BSSRATE_LEN; */ - status = _STATS_FAILURE_; + status = WLAN_STATUS_UNSPECIFIED_FAILURE; goto OnAssocReqFail; } else { memcpy(supportRate, p + 2, ie_len); @@ -3066,7 +3066,7 @@ static unsigned int OnAssocReq(struct adapter *padapter, wpa_ie_len = 0; } - if (status != _STATS_SUCCESSFUL_) + if (status != WLAN_STATUS_SUCCESS) goto OnAssocReqFail; pstat->flags &= ~(WLAN_STA_WPS | WLAN_STA_MAYBE_WPS); @@ -3097,7 +3097,7 @@ static unsigned int OnAssocReq(struct adapter *padapter, if (!selected_registrar) { DBG_88E("selected_registrar is false , or AP is not ready to do WPS\n"); - status = _STATS_UNABLE_HANDLE_STA_; + status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA; goto OnAssocReqFail; } @@ -3198,7 +3198,7 @@ static unsigned int OnAssocReq(struct adapter *padapter, pstat->flags &= ~WLAN_STA_HT; } if ((!pmlmepriv->htpriv.ht_option) && (pstat->flags & WLAN_STA_HT)) { - status = _STATS_FAILURE_; + status = WLAN_STATUS_UNSPECIFIED_FAILURE; goto OnAssocReqFail; } @@ -3225,7 +3225,7 @@ static unsigned int OnAssocReq(struct adapter *padapter, else pstat->flags &= ~WLAN_STA_SHORT_PREAMBLE; - if (status != _STATS_SUCCESSFUL_) + if (status != WLAN_STATUS_SUCCESS) goto OnAssocReqFail; /* TODO: identify_proprietary_vendor_ie(); */ @@ -3276,7 +3276,7 @@ static unsigned int OnAssocReq(struct adapter *padapter, spin_unlock_bh(&pstapriv->asoc_list_lock); /* now the station is qualified to join our BSS... */ - if ((pstat->state & WIFI_FW_ASSOC_SUCCESS) && (status == _STATS_SUCCESSFUL_)) { + if ((pstat->state & WIFI_FW_ASSOC_SUCCESS) && (status == WLAN_STATUS_SUCCESS)) { /* 1 bss_cap_update & sta_info_update */ bss_cap_update_on_sta_join(padapter, pstat); sta_info_update(padapter, pstat); diff --git a/drivers/staging/rtl8188eu/include/wifi.h b/drivers/staging/rtl8188eu/include/wifi.h index 1895f81e09b5..1b9006879a11 100644 --- a/drivers/staging/rtl8188eu/include/wifi.h +++ b/drivers/staging/rtl8188eu/include/wifi.h @@ -74,20 +74,6 @@ enum WIFI_FRAME_SUBTYPE { WIFI_QOS_DATA_NULL = (BIT(6) | WIFI_QOS_DATA_TYPE), }; -enum WIFI_STATUS_CODE { - _STATS_SUCCESSFUL_ = 0, - _STATS_FAILURE_ = 1, - _STATS_CAP_FAIL_ = 10, - _STATS_NO_ASOC_ = 11, - _STATS_OTHER_ = 12, - _STATS_NO_SUPP_ALG_ = 13, - _STATS_OUT_OF_AUTH_SEQ_ = 14, - _STATS_CHALLENGE_FAIL_ = 15, - _STATS_AUTH_TIMEOUT_ = 16, - _STATS_UNABLE_HANDLE_STA_ = 17, - _STATS_RATE_FAIL_ = 18, -}; - enum WIFI_REG_DOMAIN { DOMAIN_FCC = 1, DOMAIN_IC = 2, @@ -102,73 +88,64 @@ enum WIFI_REG_DOMAIN { DOMAIN_MAX }; -#define _TO_DS_ BIT(8) -#define _FROM_DS_ BIT(9) -#define _MORE_FRAG_ BIT(10) -#define _RETRY_ BIT(11) -#define _PWRMGT_ BIT(12) -#define _MORE_DATA_ BIT(13) -#define _PRIVACY_ BIT(14) -#define _ORDER_ BIT(15) - #define SetToDs(pbuf) \ - *(__le16 *)(pbuf) |= cpu_to_le16(_TO_DS_) + *(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_TODS) -#define GetToDs(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_TO_DS_)) != 0) +#define GetToDs(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_TODS)) != 0) #define ClearToDs(pbuf) \ - *(__le16 *)(pbuf) &= (~cpu_to_le16(_TO_DS_)) + *(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_TODS)) #define SetFrDs(pbuf) \ - *(__le16 *)(pbuf) |= cpu_to_le16(_FROM_DS_) + *(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_FROMDS) -#define GetFrDs(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_FROM_DS_)) != 0) +#define GetFrDs(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_FROMDS)) != 0) #define ClearFrDs(pbuf) \ - *(__le16 *)(pbuf) &= (~cpu_to_le16(_FROM_DS_)) + *(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_FROMDS)) #define get_tofr_ds(pframe) ((GetToDs(pframe) << 1) | GetFrDs(pframe)) #define SetMFrag(pbuf) \ - *(__le16 *)(pbuf) |= cpu_to_le16(_MORE_FRAG_) + *(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_MOREFRAGS) -#define GetMFrag(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_MORE_FRAG_)) != 0) +#define GetMFrag(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) != 0) #define ClearMFrag(pbuf) \ - *(__le16 *)(pbuf) &= (~cpu_to_le16(_MORE_FRAG_)) + *(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) #define SetRetry(pbuf) \ - *(__le16 *)(pbuf) |= cpu_to_le16(_RETRY_) + *(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_RETRY) -#define GetRetry(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_RETRY_)) != 0) +#define GetRetry(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_RETRY)) != 0) #define ClearRetry(pbuf) \ - *(__le16 *)(pbuf) &= (~cpu_to_le16(_RETRY_)) + *(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_RETRY)) #define SetPwrMgt(pbuf) \ - *(__le16 *)(pbuf) |= cpu_to_le16(_PWRMGT_) + *(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_PM) -#define GetPwrMgt(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_PWRMGT_)) != 0) +#define GetPwrMgt(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_PM)) != 0) #define ClearPwrMgt(pbuf) \ - *(__le16 *)(pbuf) &= (~cpu_to_le16(_PWRMGT_)) + *(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_PM)) #define SetMData(pbuf) \ - *(__le16 *)(pbuf) |= cpu_to_le16(_MORE_DATA_) + *(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_MOREDATA) -#define GetMData(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_MORE_DATA_)) != 0) +#define GetMData(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_MOREDATA)) != 0) #define ClearMData(pbuf) \ - *(__le16 *)(pbuf) &= (~cpu_to_le16(_MORE_DATA_)) + *(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_MOREDATA)) #define SetPrivacy(pbuf) \ - *(__le16 *)(pbuf) |= cpu_to_le16(_PRIVACY_) + *(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_PROTECTED) #define GetPrivacy(pbuf) \ - (((*(__le16 *)(pbuf)) & cpu_to_le16(_PRIVACY_)) != 0) + (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_PROTECTED)) != 0) #define GetOrder(pbuf) \ - (((*(__le16 *)(pbuf)) & cpu_to_le16(_ORDER_)) != 0) + (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_ORDER)) != 0) #define GetFrameType(pbuf) \ (le16_to_cpu(*(__le16 *)(pbuf)) & (BIT(3) | BIT(2))) diff --git a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c index 6f42f13a71fa..bf22f130d3e1 100644 --- a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c @@ -1865,7 +1865,7 @@ static int rtw_wx_set_enc_ext(struct net_device *dev, goto exit; } - strlcpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); + strscpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); if (pext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) param->u.crypt.set_tx = 1; diff --git a/drivers/staging/rtl8188eu/os_dep/usb_intf.c b/drivers/staging/rtl8188eu/os_dep/usb_intf.c index 43ebd11b53fe..efad43d8e465 100644 --- a/drivers/staging/rtl8188eu/os_dep/usb_intf.c +++ b/drivers/staging/rtl8188eu/os_dep/usb_intf.c @@ -41,6 +41,7 @@ static const struct usb_device_id rtw_usb_id_tbl[] = { {USB_DEVICE(0x2357, 0x0111)}, /* TP-Link TL-WN727N v5.21 */ {USB_DEVICE(0x2C4E, 0x0102)}, /* MERCUSYS MW150US v2 */ {USB_DEVICE(0x0df6, 0x0076)}, /* Sitecom N150 v2 */ + {USB_DEVICE(0x7392, 0xb811)}, /* Edimax EW-7811UN V2 */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0xffef)}, /* Rosewill RNX-N150NUB */ {} /* Terminating entry */ }; diff --git a/drivers/staging/rtl8188eu/os_dep/xmit_linux.c b/drivers/staging/rtl8188eu/os_dep/xmit_linux.c index c22ddeb9a56b..b0efa2eb705e 100644 --- a/drivers/staging/rtl8188eu/os_dep/xmit_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/xmit_linux.c @@ -205,5 +205,5 @@ drop_packet: ("%s: drop, tx_drop=%d\n", __func__, (u32)pxmitpriv->tx_drop)); exit: - return 0; + return NETDEV_TX_OK; } diff --git a/drivers/staging/rtl8192e/Kconfig b/drivers/staging/rtl8192e/Kconfig index 03fcc23516fd..963a2ffbc1fb 100644 --- a/drivers/staging/rtl8192e/Kconfig +++ b/drivers/staging/rtl8192e/Kconfig @@ -3,6 +3,7 @@ config RTLLIB tristate "Support for rtllib wireless devices" depends on WLAN && m select LIB80211 + select CRC32 help If you have a wireless card that uses rtllib, say Y. Currently the only card is the rtl8192e. diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c index 9f869fb3eaa8..ff843d7ec606 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c @@ -129,9 +129,9 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val) RegRCR = rtl92e_readl(dev, RCR); priv->ReceiveConfig = RegRCR; - if (Type == true) + if (Type) RegRCR |= (RCR_CBSSID); - else if (Type == false) + else RegRCR &= (~RCR_CBSSID); rtl92e_writel(dev, RCR, RegRCR); diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c index 663675efcfe4..9078fadd65f9 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c @@ -1389,7 +1389,7 @@ static void _rtl92e_watchdog_wq_cb(void *data) rtl92e_dm_watchdog(dev); - if (rtllib_act_scanning(priv->rtllib, false) == false) { + if (!rtllib_act_scanning(priv->rtllib, false)) { if ((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == RTLLIB_NOLINK) && (ieee->eRFPowerState == eRfOn) && !ieee->is_set_key && @@ -2471,7 +2471,7 @@ static int _rtl92e_pci_probe(struct pci_dev *pdev, priv->ops = ops; - if (rtl92e_check_adapter(pdev, dev) == false) + if (!rtl92e_check_adapter(pdev, dev)) goto err_unmap; dev->irq = pdev->irq; diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c index 462835684e8b..e340be3ebb97 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c @@ -1765,7 +1765,7 @@ static void _rtl92e_dm_cts_to_self(struct net_device *dev) unsigned long curTxOkCnt = 0; unsigned long curRxOkCnt = 0; - if (priv->rtllib->bCTSToSelfEnable != true) { + if (!priv->rtllib->bCTSToSelfEnable) { pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF; return; } @@ -2447,7 +2447,7 @@ static void _rtl92e_dm_dynamic_tx_power(struct net_device *dev) unsigned int txhipower_threshold = 0; unsigned int txlowpower_threshold = 0; - if (priv->rtllib->bdynamic_txpower_enable != true) { + if (!priv->rtllib->bdynamic_txpower_enable) { priv->bDynamicTxHighPower = false; priv->bDynamicTxLowPower = false; return; diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_ethtool.c b/drivers/staging/rtl8192e/rtl8192e/rtl_ethtool.c index 6ae7a67e767f..f4f7b74c8cd1 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_ethtool.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_ethtool.c @@ -18,9 +18,9 @@ static void _rtl92e_ethtool_get_drvinfo(struct net_device *dev, { struct r8192_priv *priv = rtllib_priv(dev); - strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); - strlcpy(info->version, DRV_VERSION, sizeof(info->version)); - strlcpy(info->bus_info, pci_name(priv->pdev), sizeof(info->bus_info)); + strscpy(info->driver, DRV_NAME, sizeof(info->driver)); + strscpy(info->version, DRV_VERSION, sizeof(info->version)); + strscpy(info->bus_info, pci_name(priv->pdev), sizeof(info->bus_info)); } static u32 _rtl92e_ethtool_get_link(struct net_device *dev) diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_ps.c b/drivers/staging/rtl8192e/rtl8192e/rtl_ps.c index 9475f8c6edf7..c5e89eb40342 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_ps.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_ps.c @@ -290,7 +290,7 @@ void rtl92e_leisure_ps_leave(struct net_device *dev) if (priv->rtllib->SetFwCmdHandler) priv->rtllib->SetFwCmdHandler(dev, FW_CMD_LPS_LEAVE); - } + } } } } diff --git a/drivers/staging/rtl8192e/rtllib_rx.c b/drivers/staging/rtl8192e/rtllib_rx.c index d31b5e1c8df4..66c135321da4 100644 --- a/drivers/staging/rtl8192e/rtllib_rx.c +++ b/drivers/staging/rtl8192e/rtllib_rx.c @@ -924,7 +924,7 @@ static int rtllib_rx_check_duplicate(struct rtllib_device *ieee, sc = le16_to_cpu(hdr->seq_ctl); frag = WLAN_GET_SEQ_FRAG(sc); - if ((ieee->pHTInfo->bCurRxReorderEnable == false) || + if (!ieee->pHTInfo->bCurRxReorderEnable || !ieee->current_network.qos_data.active || !IsDataFrame(skb->data) || IsLegacyDataFrame(skb->data)) { @@ -1442,8 +1442,7 @@ static int rtllib_rx_InfraAdhoc(struct rtllib_device *ieee, struct sk_buff *skb, } /* Indicate packets to upper layer or Rx Reorder */ - if (ieee->pHTInfo->bCurRxReorderEnable == false || pTS == NULL || - bToOtherSTA) + if (!ieee->pHTInfo->bCurRxReorderEnable || pTS == NULL || bToOtherSTA) rtllib_rx_indicate_pkt_legacy(ieee, rx_stats, rxb, dst, src); else RxReorderIndicatePacket(ieee, rxb, pTS, SeqNum); diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c b/drivers/staging/rtl8192e/rtllib_softmac.c index 2c752ba5a802..2d3be91b113d 100644 --- a/drivers/staging/rtl8192e/rtllib_softmac.c +++ b/drivers/staging/rtl8192e/rtllib_softmac.c @@ -1352,9 +1352,8 @@ rtllib_association_req(struct rtllib_network *beacon, rtllib_WMM_Info(ieee, &tag); } - if (wps_ie_len && ieee->wps_ie) { + if (wps_ie_len && ieee->wps_ie) skb_put_data(skb, ieee->wps_ie, wps_ie_len); - } if (turbo_info_len) { tag = skb_put(skb, turbo_info_len); diff --git a/drivers/staging/rtl8192e/rtllib_tx.c b/drivers/staging/rtl8192e/rtllib_tx.c index e0d79daca24a..8add17752eed 100644 --- a/drivers/staging/rtl8192e/rtllib_tx.c +++ b/drivers/staging/rtl8192e/rtllib_tx.c @@ -297,7 +297,7 @@ static void rtllib_tx_query_agg_cap(struct rtllib_device *ieee, netdev_info(ieee->dev, "%s: can't get TS\n", __func__); return; } - if (pTxTs->TxAdmittedBARecord.bValid == false) { + if (!pTxTs->TxAdmittedBARecord.bValid) { if (ieee->wpa_ie_len && (ieee->pairwise_key_type == KEY_TYPE_NA)) { ; @@ -307,7 +307,7 @@ static void rtllib_tx_query_agg_cap(struct rtllib_device *ieee, TsStartAddBaProcess(ieee, pTxTs); } goto FORCED_AGG_SETTING; - } else if (pTxTs->bUsingBa == false) { + } else if (!pTxTs->bUsingBa) { if (SN_LESS(pTxTs->TxAdmittedBARecord.BaStartSeqCtrl.field.SeqNum, (pTxTs->TxCurSeq+1)%4096)) pTxTs->bUsingBa = true; @@ -365,9 +365,9 @@ static void rtllib_query_HTCapShortGI(struct rtllib_device *ieee, return; } - if ((pHTInfo->bCurBW40MHz == true) && pHTInfo->bCurShortGI40MHz) + if (pHTInfo->bCurBW40MHz && pHTInfo->bCurShortGI40MHz) tcb_desc->bUseShortGI = true; - else if ((pHTInfo->bCurBW40MHz == false) && pHTInfo->bCurShortGI20MHz) + else if (!pHTInfo->bCurBW40MHz && pHTInfo->bCurShortGI20MHz) tcb_desc->bUseShortGI = true; } diff --git a/drivers/staging/rtl8192e/rtllib_wx.c b/drivers/staging/rtl8192e/rtllib_wx.c index aa26b2fd2774..2e486ccb6432 100644 --- a/drivers/staging/rtl8192e/rtllib_wx.c +++ b/drivers/staging/rtl8192e/rtllib_wx.c @@ -341,8 +341,6 @@ int rtllib_wx_set_encode(struct rtllib_device *ieee, goto done; } - - sec.enabled = 1; sec.flags |= SEC_ENABLED; diff --git a/drivers/staging/rtl8192u/Kconfig b/drivers/staging/rtl8192u/Kconfig index ef883d462d3d..f3b112a058ca 100644 --- a/drivers/staging/rtl8192u/Kconfig +++ b/drivers/staging/rtl8192u/Kconfig @@ -5,6 +5,7 @@ config RTL8192U depends on m select WIRELESS_EXT select WEXT_PRIV + select CRC32 select CRYPTO select CRYPTO_AES select CRYPTO_CCM diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac_wx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac_wx.c index f434a26cdb2f..afa92ddfa005 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac_wx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac_wx.c @@ -484,7 +484,7 @@ int ieee80211_wx_get_name(struct ieee80211_device *ieee, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { - strlcpy(wrqu->name, "802.11", IFNAMSIZ); + strscpy(wrqu->name, "802.11", IFNAMSIZ); if (ieee->modulation & IEEE80211_CCK_MODULATION) { strlcat(wrqu->name, "b", IFNAMSIZ); if (ieee->modulation & IEEE80211_OFDM_MODULATION) diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c index 63a561ab4a76..bd8914645e95 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c @@ -327,20 +327,20 @@ static void ieee80211_tx_query_agg_cap(struct ieee80211_device *ieee, } FORCED_AGG_SETTING: switch (pHTInfo->ForcedAMPDUMode) { - case HT_AGG_AUTO: - break; - - case HT_AGG_FORCE_ENABLE: - tcb_desc->bAMPDUEnable = true; - tcb_desc->ampdu_density = pHTInfo->ForcedMPDUDensity; - tcb_desc->ampdu_factor = pHTInfo->ForcedAMPDUFactor; - break; - - case HT_AGG_FORCE_DISABLE: - tcb_desc->bAMPDUEnable = false; - tcb_desc->ampdu_density = 0; - tcb_desc->ampdu_factor = 0; - break; + case HT_AGG_AUTO: + break; + + case HT_AGG_FORCE_ENABLE: + tcb_desc->bAMPDUEnable = true; + tcb_desc->ampdu_density = pHTInfo->ForcedMPDUDensity; + tcb_desc->ampdu_factor = pHTInfo->ForcedAMPDUFactor; + break; + + case HT_AGG_FORCE_DISABLE: + tcb_desc->bAMPDUEnable = false; + tcb_desc->ampdu_density = 0; + tcb_desc->ampdu_factor = 0; + break; } return; diff --git a/drivers/staging/rtl8192u/r8190_rtl8256.c b/drivers/staging/rtl8192u/r8190_rtl8256.c index 63e0f7b1b852..fee3bfb99075 100644 --- a/drivers/staging/rtl8192u/r8190_rtl8256.c +++ b/drivers/staging/rtl8192u/r8190_rtl8256.c @@ -58,7 +58,7 @@ void phy_set_rf8256_bandwidth(struct net_device *dev, enum ht_channel_width Band (enum rf90_radio_path_e)eRFPath, 0x14, bMask12Bits, 0x5ab); } else { - RT_TRACE(COMP_ERR, "phy_set_rf8256_bandwidth(): unknown hardware version\n"); + RT_TRACE(COMP_ERR, "%s(): unknown hardware version\n", __func__); } break; case HT_CHANNEL_WIDTH_20_40: diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c index 93676af98629..9fc4adc83d77 100644 --- a/drivers/staging/rtl8192u/r8192U_core.c +++ b/drivers/staging/rtl8192u/r8192U_core.c @@ -1608,6 +1608,8 @@ static short rtl8192_usb_initendpoints(struct net_device *dev) void *oldaddr, *newaddr; priv->rx_urb[16] = usb_alloc_urb(0, GFP_KERNEL); + if (!priv->rx_urb[16]) + return -ENOMEM; priv->oldaddr = kmalloc(16, GFP_KERNEL); if (!priv->oldaddr) return -ENOMEM; diff --git a/drivers/staging/rtl8712/rtl871x_debug.h b/drivers/staging/rtl8712/rtl871x_debug.h index a427547c02ba..57f2a38cb71c 100644 --- a/drivers/staging/rtl8712/rtl871x_debug.h +++ b/drivers/staging/rtl8712/rtl871x_debug.h @@ -17,7 +17,6 @@ #include "osdep_service.h" #include "drv_types.h" - #define _drv_emerg_ 1 #define _drv_alert_ 2 #define _drv_crit_ 3 @@ -28,7 +27,6 @@ #define _drv_dump_ 8 #define _drv_debug_ 9 - #define _module_rtl871x_xmit_c_ BIT(0) #define _module_xmit_osdep_c_ BIT(1) #define _module_rtl871x_recv_c_ BIT(2) diff --git a/drivers/staging/rtl8712/rtl871x_ioctl_linux.c b/drivers/staging/rtl8712/rtl871x_ioctl_linux.c index cbaa7a489748..81de5a9e6b67 100644 --- a/drivers/staging/rtl8712/rtl871x_ioctl_linux.c +++ b/drivers/staging/rtl8712/rtl871x_ioctl_linux.c @@ -1784,7 +1784,7 @@ static int r871x_wx_set_enc_ext(struct net_device *dev, return -ENOMEM; param->cmd = IEEE_CMD_SET_ENCRYPTION; eth_broadcast_addr(param->sta_addr); - strlcpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); + strscpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); if (pext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) param->u.crypt.set_tx = 0; if (pext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) diff --git a/drivers/staging/rtl8712/wifi.h b/drivers/staging/rtl8712/wifi.h index 601d4ff607bc..1b32b3510093 100644 --- a/drivers/staging/rtl8712/wifi.h +++ b/drivers/staging/rtl8712/wifi.h @@ -101,20 +101,6 @@ enum WIFI_REASON_CODE { _RSON_PMK_NOT_AVAILABLE_ = 24, }; -enum WIFI_STATUS_CODE { - _STATS_SUCCESSFUL_ = 0, - _STATS_FAILURE_ = 1, - _STATS_CAP_FAIL_ = 10, - _STATS_NO_ASOC_ = 11, - _STATS_OTHER_ = 12, - _STATS_NO_SUPP_ALG_ = 13, - _STATS_OUT_OF_AUTH_SEQ_ = 14, - _STATS_CHALLENGE_FAIL_ = 15, - _STATS_AUTH_TIMEOUT_ = 16, - _STATS_UNABLE_HANDLE_STA_ = 17, - _STATS_RATE_FAIL_ = 18, -}; - enum WIFI_REG_DOMAIN { DOMAIN_FCC = 1, DOMAIN_IC = 2, diff --git a/drivers/staging/rtl8723bs/core/rtw_security.c b/drivers/staging/rtl8723bs/core/rtw_security.c index a83d8f7f611c..a311595deafb 100644 --- a/drivers/staging/rtl8723bs/core/rtw_security.c +++ b/drivers/staging/rtl8723bs/core/rtw_security.c @@ -171,9 +171,8 @@ static void crc32_init(void) for (i = 0; i < 256; ++i) { k = crc32_reverseBit((u8)i); - for (c = ((u32)k) << 24, j = 8; j > 0; --j) { + for (c = ((u32)k) << 24, j = 8; j > 0; --j) c = c & 0x80000000 ? (c << 1) ^ CRC32_POLY_BE : (c << 1); - } p1 = (u8 *)&crc32_table[i]; p1[0] = crc32_reverseBit(p[3]); @@ -195,9 +194,8 @@ static __le32 getcrc32(u8 *buf, sint len) crc = 0xffffffff; /* preload shift register, per CRC-32 spec */ - for (p = buf; len > 0; ++p, --len) { + for (p = buf; len > 0; ++p, --len) crc = crc32_table[(crc ^ *p) & 0xff] ^ (crc >> 8); - } return cpu_to_le32(~crc); /* transmit complement, per CRC-32 spec */ } @@ -320,9 +318,8 @@ static u32 secmicgetuint32(u8 *p) s32 i; u32 res = 0; - for (i = 0; i < 4; i++) { + for (i = 0; i < 4; i++) res |= ((u32)(*p++)) << (8*i); - } return res; } @@ -396,9 +393,8 @@ void rtw_secgetmic(struct mic_data *pmicdata, u8 *dst) rtw_secmicappendbyte(pmicdata, 0); rtw_secmicappendbyte(pmicdata, 0); /* and then zeroes until the length is a multiple of 4 */ - while (pmicdata->nBytesInM != 0) { + while (pmicdata->nBytesInM != 0) rtw_secmicappendbyte(pmicdata, 0); - } /* The appendByte function has already computed the result. */ secmicputuint32(dst, pmicdata->L); secmicputuint32(dst+4, pmicdata->R); @@ -918,9 +914,8 @@ static void xor_128(u8 *a, u8 *b, u8 *out) { sint i; - for (i = 0; i < 16; i++) { + for (i = 0; i < 16; i++) out[i] = a[i] ^ b[i]; - } } @@ -928,9 +923,8 @@ static void xor_32(u8 *a, u8 *b, u8 *out) { sint i; - for (i = 0; i < 4; i++) { + for (i = 0; i < 4; i++) out[i] = a[i] ^ b[i]; - } } @@ -969,9 +963,8 @@ static void byte_sub(u8 *in, u8 *out) { sint i; - for (i = 0; i < 16; i++) { + for (i = 0; i < 16; i++) out[i] = sbox(in[i]); - } } @@ -1259,9 +1252,8 @@ static void bitwise_xor(u8 *ina, u8 *inb, u8 *out) { sint i; - for (i = 0; i < 16; i++) { + for (i = 0; i < 16; i++) out[i] = ina[i] ^ inb[i]; - } } static sint aes_cipher(u8 *key, uint hdrlen, diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c index cf23414d7224..22365926a9f8 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c @@ -20,16 +20,11 @@ #define MAX_DOZE_WAITING_TIMES_9x 64 /** -* Function: phy_CalculateBitShift -* -* OverView: Get shifted position of the BitMask -* -* Input: -* u32 BitMask, -* -* Output: none -* Return: u32 Return the shift bit bit position of the mask -*/ + * phy_CalculateBitShift - Get shifted position of the BitMask. + * @BitMask: Bitmask. + * + * Return: Return the shift bit position of the mask + */ static u32 phy_CalculateBitShift(u32 BitMask) { u32 i; @@ -43,19 +38,17 @@ static u32 phy_CalculateBitShift(u32 BitMask) /** -* Function: PHY_QueryBBReg -* -* OverView: Read "specific bits" from BB register -* -* Input: -* struct adapter * Adapter, -* u32 RegAddr, The target address to be readback -* u32 BitMask The target bit position in the target address -* to be readback -* Output: None -* Return: u32 Data The readback register value -* Note: This function is equal to "GetRegSetting" in PHY programming guide -*/ + * PHY_QueryBBReg - Read "specific bits" from BB register. + * @Adapter: + * @RegAddr: The target address to be readback + * @BitMask: The target bit position in the target address + * to be readback + * + * Return: The readback register value + * + * .. Note:: This function is equal to "GetRegSetting" in PHY programming + * guide + */ u32 PHY_QueryBBReg_8723B(struct adapter *Adapter, u32 RegAddr, u32 BitMask) { u32 OriginalValue, BitShift; @@ -64,8 +57,6 @@ u32 PHY_QueryBBReg_8723B(struct adapter *Adapter, u32 RegAddr, u32 BitMask) return 0; #endif - /* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); */ - OriginalValue = rtw_read32(Adapter, RegAddr); BitShift = phy_CalculateBitShift(BitMask); @@ -75,22 +66,17 @@ u32 PHY_QueryBBReg_8723B(struct adapter *Adapter, u32 RegAddr, u32 BitMask) /** -* Function: PHY_SetBBReg -* -* OverView: Write "Specific bits" to BB register (page 8~) -* -* Input: -* struct adapter * Adapter, -* u32 RegAddr, The target address to be modified -* u32 BitMask The target bit position in the target address -* to be modified -* u32 Data The new register value in the target bit position -* of the target address -* -* Output: None -* Return: None -* Note: This function is equal to "PutRegSetting" in PHY programming guide -*/ + * PHY_SetBBReg - Write "Specific bits" to BB register (page 8~). + * @Adapter: + * @RegAddr: The target address to be modified + * @BitMask: The target bit position in the target address + * to be modified + * @Data: The new register value in the target bit position + * of the target address + * + * .. Note:: This function is equal to "PutRegSetting" in PHY programming + * guide + */ void PHY_SetBBReg_8723B( struct adapter *Adapter, @@ -106,8 +92,6 @@ void PHY_SetBBReg_8723B( return; #endif - /* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */ - if (BitMask != bMaskDWord) { /* if not "double word" write */ OriginalValue = rtw_read32(Adapter, RegAddr); BitShift = phy_CalculateBitShift(BitMask); @@ -171,40 +155,30 @@ static u32 phy_RFSerialRead_8723B( if (RfPiEnable) { /* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhySet, bLSSIReadBackData); - - /* RT_DISP(FINIT, INIT_RF, ("Readback from RF-PI : 0x%x\n", retValue)); */ } else { /* Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF */ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhySet, bLSSIReadBackData); - - /* RT_DISP(FINIT, INIT_RF, ("Readback from RF-SI : 0x%x\n", retValue)); */ } return retValue; } /** -* Function: phy_RFSerialWrite_8723B -* -* OverView: Write data to RF register (page 8~) -* -* Input: -* struct adapter * Adapter, -* RF_PATH eRFPath, Radio path of A/B/C/D -* u32 Offset, The target address to be read -* u32 Data The new register Data in the target bit position -* of the target to be read -* -* Output: None -* Return: None -* Note: Threre are three types of serial operations: -* 1. Software serial write -* 2. Hardware LSSI-Low Speed Serial Interface -* 3. Hardware HSSI-High speed -* serial write. Driver need to implement (1) and (2). -* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() + * phy_RFSerialWrite_8723B - Write data to RF register (page 8~). + * @Adapter: + * @eRFPath: Radio path of A/B/C/D + * @Offset: The target address to be read + * @Data: The new register Data in the target bit position + * of the target to be read + * + * .. Note:: Threre are three types of serial operations: + * 1. Software serial write + * 2. Hardware LSSI-Low Speed Serial Interface + * 3. Hardware HSSI-High speed + * serial write. Driver need to implement (1) and (2). + * This function is equal to the combination of RF_ReadReg() and RFLSSIRead() * - * Note: For RF8256 only + * .. Note:: For RF8256 only * The total count of RTL8256(Zebra4) register is around 36 bit it only employs * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration @@ -225,7 +199,7 @@ static u32 phy_RFSerialRead_8723B( * * * -*/ + */ static void phy_RFSerialWrite_8723B( struct adapter *Adapter, enum RF_PATH eRFPath, @@ -248,34 +222,27 @@ static void phy_RFSerialWrite_8723B( /* */ /* Put write addr in [5:0] and write data in [31:16] */ /* */ - /* DataAndAddr = (Data<<16) | (NewOffset&0x3f); */ DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; /* T65 RF */ - /* */ /* Write Operation */ /* */ PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); - /* RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]= 0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); */ - } /** -* Function: PHY_QueryRFReg -* -* OverView: Query "Specific bits" to RF register (page 8~) -* -* Input: -* struct adapter * Adapter, -* RF_PATH eRFPath, Radio path of A/B/C/D -* u32 RegAddr, The target address to be read -* u32 BitMask The target bit position in the target address -* to be read -* -* Output: None -* Return: u32 Readback value -* Note: This function is equal to "GetRFRegSetting" in PHY programming guide -*/ + * PHY_QueryRFReg - Query "Specific bits" to RF register (page 8~). + * @Adapter: + * @eRFPath: Radio path of A/B/C/D + * @RegAdd: The target address to be read + * @BitMask: The target bit position in the target address + * to be read + * + * Return: Readback value + * + * .. Note:: This function is equal to "GetRFRegSetting" in PHY + * programming guide + */ u32 PHY_QueryRFReg_8723B( struct adapter *Adapter, u8 eRFPath, @@ -296,23 +263,18 @@ u32 PHY_QueryRFReg_8723B( } /** -* Function: PHY_SetRFReg -* -* OverView: Write "Specific bits" to RF register (page 8~) -* -* Input: -* struct adapter * Adapter, -* RF_PATH eRFPath, Radio path of A/B/C/D -* u32 RegAddr, The target address to be modified -* u32 BitMask The target bit position in the target address -* to be modified -* u32 Data The new register Data in the target bit position -* of the target address -* -* Output: None -* Return: None -* Note: This function is equal to "PutRFRegSetting" in PHY programming guide -*/ + * PHY_SetRFReg - Write "Specific bits" to RF register (page 8~). + * @Adapter: + * @eRFPath: Radio path of A/B/C/D + * @RegAddr: The target address to be modified + * @BitMask: The target bit position in the target address + * to be modified + * @Data: The new register Data in the target bit position + * of the target address + * + * .. Note:: This function is equal to "PutRFRegSetting" in PHY + * programming guide. + */ void PHY_SetRFReg_8723B( struct adapter *Adapter, u8 eRFPath, @@ -344,15 +306,7 @@ void PHY_SetRFReg_8723B( /*----------------------------------------------------------------------------- - * Function: PHY_MACConfig8192C - * - * Overview: Condig MAC by header file or parameter file. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE + * PHY_MACConfig8192C - Condig MAC by header file or parameter file. * * Revised History: * When Who Remark @@ -369,17 +323,12 @@ s32 PHY_MACConfig8723B(struct adapter *Adapter) } /** -* Function: phy_InitBBRFRegisterDefinition -* -* OverView: Initialize Register definition offset for Radio Path A/B/C/D -* -* Input: -* struct adapter * Adapter, -* -* Output: None -* Return: None -* Note: The initialization value is constant and it should never be changes -*/ + * phy_InitBBRFRegisterDefinition - Initialize Register definition offset for + * Radio Path A/B/C/D + * @Adapter: + * + * .. Note:: The initialization value is constant and it should never be changes + */ static void phy_InitBBRFRegisterDefinition(struct adapter *Adapter) { struct hal_com_data *pHalData = GET_HAL_DATA(Adapter); @@ -512,7 +461,6 @@ int PHY_RFConfig8723B(struct adapter *Adapter) rtStatus = PHY_RF6052_Config8723B(Adapter); phy_LCK_8723B(Adapter); - /* PHY_BB8723B_Config_1T(Adapter); */ return rtStatus; } @@ -619,8 +567,6 @@ u8 PHY_GetTxPowerIndex( s8 txPower = 0, powerDiffByRate = 0, limit = 0; bool bIn24G = false; - /* DBG_871X("===>%s\n", __func__); */ - txPower = (s8) PHY_GetTxPowerIndexBase(padapter, RFPath, Rate, BandWidth, Channel, &bIn24G); powerDiffByRate = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, ODM_RF_PATH_A, RF_1TX, Rate); @@ -642,7 +588,6 @@ u8 PHY_GetTxPowerIndex( if (txPower > MAX_POWER_INDEX) txPower = MAX_POWER_INDEX; - /* DBG_871X("Final Tx Power(RF-%c, Channel: %d) = %d(0x%X)\n", ((RFPath == 0)?'A':'B'), Channel, txPower, txPower)); */ return (u8) txPower; } @@ -789,8 +734,6 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter) PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); -/* PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); */ - PHY_SetBBReg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT31|BIT30), 0x0); break; @@ -805,15 +748,9 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter) PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); -/* PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); */ - PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); - break; - default: - /*RT_TRACE(COMP_DBG, DBG_LOUD, ("phy_SetBWMode8723B(): unknown Bandwidth: %#X\n"\ - , pHalData->CurrentChannelBW));*/ break; } @@ -826,10 +763,8 @@ static void phy_SwChnl8723B(struct adapter *padapter) struct hal_com_data *pHalData = GET_HAL_DATA(padapter); u8 channelToSW = pHalData->CurrentChannel; - if (pHalData->rf_chip == RF_PSEUDO_11N) { - /* RT_TRACE(COMP_MLME, DBG_LOUD, ("phy_SwChnl8723B: return for PSEUDO\n")); */ + if (pHalData->rf_chip == RF_PSEUDO_11N) return; - } pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff00) | channelToSW); PHY_SetRFReg(padapter, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]); PHY_SetRFReg(padapter, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]); @@ -841,7 +776,6 @@ static void phy_SwChnlAndSetBwMode8723B(struct adapter *Adapter) { struct hal_com_data *pHalData = GET_HAL_DATA(Adapter); - /* RT_TRACE(COMP_SCAN, DBG_LOUD, ("phy_SwChnlAndSetBwMode8723B(): bSwChnl %d, bSetChnlBW %d\n", pHalData->bSwChnl, pHalData->bSetChnlBW)); */ if (Adapter->bNotifyChannelChange) { DBG_871X("[%s] bSwChnl =%d, ch =%d, bSetChnlBW =%d, bw =%d\n", __func__, @@ -886,8 +820,6 @@ static void PHY_HandleSwChnlAndSetBW8723B( u8 tmpnCur80MhzPrimeSC = pHalData->nCur80MhzPrimeSC; u8 tmpCenterFrequencyIndex1 = pHalData->CurrentCenterFrequencyIndex1; - /* DBG_871X("=> PHY_HandleSwChnlAndSetBW8812: bSwitchChannel %d, bSetBandWidth %d\n", bSwitchChannel, bSetBandWidth); */ - /* check is swchnl or setbw */ if (!bSwitchChannel && !bSetBandWidth) { DBG_871X("PHY_HandleSwChnlAndSetBW8812: not switch channel and not set bandwidth\n"); @@ -896,7 +828,6 @@ static void PHY_HandleSwChnlAndSetBW8723B( /* skip change for channel or bandwidth is the same */ if (bSwitchChannel) { - /* if (pHalData->CurrentChannel != ChannelNum) */ { if (HAL_IsLegalChannel(Adapter, ChannelNum)) pHalData->bSwChnl = true; @@ -906,10 +837,8 @@ static void PHY_HandleSwChnlAndSetBW8723B( if (bSetBandWidth) pHalData->bSetChnlBW = true; - if (!pHalData->bSetChnlBW && !pHalData->bSwChnl) { - /* DBG_871X("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d\n", pHalData->bSwChnl, pHalData->bSetChnlBW); */ + if (!pHalData->bSetChnlBW && !pHalData->bSwChnl) return; - } if (pHalData->bSwChnl) { @@ -968,9 +897,5 @@ void PHY_SetSwChnlBWMode8723B( u8 Offset80 ) { - /* DBG_871X("%s() ===>\n", __func__); */ - PHY_HandleSwChnlAndSetBW8723B(Adapter, true, true, channel, Bandwidth, Offset40, Offset80, channel); - - /* DBG_871X("<==%s()\n", __func__); */ } diff --git a/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c b/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c index 1fbf89cb72d0..2d15a5f7648d 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c @@ -24,7 +24,7 @@ static void update_recvframe_attrib(struct adapter *padapter, { struct rx_pkt_attrib *pattrib; struct recv_stat report; - PRXREPORT prxreport = (PRXREPORT)&report; + struct rxreport_8723b *prxreport = (struct rxreport_8723b *)&report; report.rxdw0 = prxstat->rxdw0; report.rxdw1 = prxstat->rxdw1; diff --git a/drivers/staging/rtl8723bs/include/autoconf.h b/drivers/staging/rtl8723bs/include/autoconf.h index 8f4c1e734473..86cf09ca5f06 100644 --- a/drivers/staging/rtl8723bs/include/autoconf.h +++ b/drivers/staging/rtl8723bs/include/autoconf.h @@ -5,7 +5,6 @@ * ******************************************************************************/ - /* * Automatically generated C config: don't edit */ diff --git a/drivers/staging/rtl8723bs/include/hal_intf.h b/drivers/staging/rtl8723bs/include/hal_intf.h index 1de5acaef8ff..426c8d58c444 100644 --- a/drivers/staging/rtl8723bs/include/hal_intf.h +++ b/drivers/staging/rtl8723bs/include/hal_intf.h @@ -257,8 +257,8 @@ struct hal_ops { bool (*Efuse_PgPacketWrite_BT)(struct adapter *padapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest); s32 (*xmit_thread_handler)(struct adapter *padapter); - void (*hal_notch_filter)(struct adapter * adapter, bool enable); - void (*hal_reset_security_engine)(struct adapter * adapter); + void (*hal_notch_filter)(struct adapter *adapter, bool enable); + void (*hal_reset_security_engine)(struct adapter *adapter); s32 (*c2h_handler)(struct adapter *padapter, u8 *c2h_evt); c2h_id_filter c2h_id_filter_ccx; @@ -384,8 +384,8 @@ void rtw_hal_dm_watchdog_in_lps(struct adapter *padapter); s32 rtw_hal_xmit_thread_handler(struct adapter *padapter); -void rtw_hal_notch_filter(struct adapter * adapter, bool enable); -void rtw_hal_reset_security_engine(struct adapter * adapter); +void rtw_hal_notch_filter(struct adapter *adapter, bool enable); +void rtw_hal_reset_security_engine(struct adapter *adapter); bool rtw_hal_c2h_valid(struct adapter *adapter, u8 *buf); s32 rtw_hal_c2h_handler(struct adapter *adapter, u8 *c2h_evt); diff --git a/drivers/staging/rtl8723bs/include/ieee80211.h b/drivers/staging/rtl8723bs/include/ieee80211.h index d9ff8c8e7f36..f80db2c984a4 100644 --- a/drivers/staging/rtl8723bs/include/ieee80211.h +++ b/drivers/staging/rtl8723bs/include/ieee80211.h @@ -667,85 +667,6 @@ struct ieee80211_header_data { #define MFIE_TYPE_RATES_EX 50 #define MFIE_TYPE_GENERIC 221 -struct ieee80211_info_element_hdr { - u8 id; - u8 len; -} __attribute__ ((packed)); - -struct ieee80211_info_element { - u8 id; - u8 len; - u8 data[0]; -} __attribute__ ((packed)); - -/* - * These are the data types that can make up management packets - * - u16 auth_algorithm; - u16 auth_sequence; - u16 beacon_interval; - u16 capability; - u8 current_ap[ETH_ALEN]; - u16 listen_interval; - struct { - u16 association_id:14, reserved:2; - } __attribute__ ((packed)); - u32 time_stamp[2]; - u16 reason; - u16 status; -*/ - -#define IEEE80211_DEFAULT_TX_ESSID "Penguin" -#define IEEE80211_DEFAULT_BASIC_RATE 10 - - -struct ieee80211_authentication { - struct ieee80211_header_data header; - u16 algorithm; - u16 transaction; - u16 status; - /* struct ieee80211_info_element_hdr info_element; */ -} __attribute__ ((packed)); - - -struct ieee80211_probe_response { - struct ieee80211_header_data header; - u32 time_stamp[2]; - u16 beacon_interval; - u16 capability; - struct ieee80211_info_element info_element; -} __attribute__ ((packed)); - -struct ieee80211_probe_request { - struct ieee80211_header_data header; - /*struct ieee80211_info_element info_element;*/ -} __attribute__ ((packed)); - -struct ieee80211_assoc_request_frame { - struct ieee80211_hdr_3addr header; - u16 capability; - u16 listen_interval; - /* u8 current_ap[ETH_ALEN]; */ - struct ieee80211_info_element_hdr info_element; -} __attribute__ ((packed)); - -struct ieee80211_assoc_response_frame { - struct ieee80211_hdr_3addr header; - u16 capability; - u16 status; - u16 aid; -} __attribute__ ((packed)); - -struct ieee80211_txb { - u8 nr_frags; - u8 encrypted; - u16 reserved; - u16 frag_size; - u16 payload_size; - struct sk_buff *fragments[0]; -}; - - /* SWEEP TABLE ENTRIES NUMBER*/ #define MAX_SWEEP_TAB_ENTRIES 42 #define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7 diff --git a/drivers/staging/rtl8723bs/include/rtl8723b_hal.h b/drivers/staging/rtl8723bs/include/rtl8723b_hal.h index f36516fa84c7..8e6e972dd843 100644 --- a/drivers/staging/rtl8723bs/include/rtl8723b_hal.h +++ b/drivers/staging/rtl8723bs/include/rtl8723b_hal.h @@ -42,11 +42,13 @@ struct rt_firmware_hdr { /* LONG WORD 0 ---- */ __le16 signature; /* 92C0: test chip; 92C, 88C0: test chip; - * 88C1: MP A-cut; 92C1: MP A-cut */ + * 88C1: MP A-cut; 92C1: MP A-cut + */ u8 category; /* AP/NIC and USB/PCI */ u8 function; /* Reserved for different FW function indications, * for further use when driver needs to download - * different FW in different conditions. */ + * different FW in different conditions. + */ __le16 version; /* FW Version */ __le16 subversion; /* FW Subversion, default 0x00 */ @@ -135,7 +137,6 @@ struct rt_firmware_hdr { #define WMM_NORMAL_PAGE_NUM_LPQ_8723B 0x20 #define WMM_NORMAL_PAGE_NUM_NPQ_8723B 0x20 - #include "HalVerDef.h" #include "hal_com.h" @@ -149,7 +150,8 @@ struct rt_firmware_hdr { #define EFUSE_MAX_SECTION_8723B 64 #define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. - * Added by Roger, 2009.09.02. */ + * Added by Roger, 2009.09.02. + */ #define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8723B) #define EFUSE_ACCESS_ON 0x69 /* For RTL8723 only. */ @@ -173,7 +175,8 @@ typedef enum _C2H_EVT { C2H_TSF = 1, C2H_AP_RPT_RSP = 2, C2H_CCX_TX_RPT = 3, /* The FW notify the report - * of the specific tx packet. */ + * of the specific tx packet. + */ C2H_BT_RSSI = 4, C2H_BT_OP_MODE = 5, C2H_EXT_RA_RPT = 6, diff --git a/drivers/staging/rtl8723bs/include/rtl8723b_recv.h b/drivers/staging/rtl8723bs/include/rtl8723b_recv.h index fad6749af768..60a1df703c8e 100644 --- a/drivers/staging/rtl8723bs/include/rtl8723b_recv.h +++ b/drivers/staging/rtl8723bs/include/rtl8723b_recv.h @@ -9,7 +9,7 @@ #include <rtl8192c_recv.h> -typedef struct rxreport_8723b { +struct rxreport_8723b { /* DWORD 0 */ u32 pktlen:14; u32 crc32:1; @@ -79,9 +79,9 @@ typedef struct rxreport_8723b { /* DWORD 5 */ u32 tsfl; -} RXREPORT, *PRXREPORT; +}; -typedef struct phystatus_8723b { +struct phystatus_8723b { u32 rxgain_a:7; u32 trsw_a:1; u32 rxgain_b:7; @@ -123,7 +123,7 @@ typedef struct phystatus_8723b { u32 anttrainen:1; u32 antselb:1; u32 antsel:1; -} PHYSTATUS, *PPHYSTATUS; +}; s32 rtl8723bs_init_recv_priv(struct adapter *padapter); void rtl8723bs_free_recv_priv(struct adapter *padapter); diff --git a/drivers/staging/rtl8723bs/include/rtw_mlme.h b/drivers/staging/rtl8723bs/include/rtw_mlme.h index ea0dd156051e..d8655cb619a1 100644 --- a/drivers/staging/rtl8723bs/include/rtw_mlme.h +++ b/drivers/staging/rtl8723bs/include/rtw_mlme.h @@ -524,18 +524,16 @@ static inline void set_fwstate(struct mlme_priv *pmlmepriv, sint state) { pmlmepriv->fw_state |= state; /* FOR HW integration */ - if (_FW_UNDER_SURVEY == state) { + if (state == _FW_UNDER_SURVEY) pmlmepriv->bScanInProcess = true; - } } static inline void _clr_fwstate_(struct mlme_priv *pmlmepriv, sint state) { pmlmepriv->fw_state &= ~state; /* FOR HW integration */ - if (_FW_UNDER_SURVEY == state) { + if (state == _FW_UNDER_SURVEY) pmlmepriv->bScanInProcess = false; - } } /* diff --git a/drivers/staging/rtl8723bs/include/wlan_bssdef.h b/drivers/staging/rtl8723bs/include/wlan_bssdef.h index ea370b2bb8db..27cd2c5d90af 100644 --- a/drivers/staging/rtl8723bs/include/wlan_bssdef.h +++ b/drivers/staging/rtl8723bs/include/wlan_bssdef.h @@ -68,7 +68,7 @@ struct ndis_802_11_fix_ie { struct ndis_80211_var_ie { u8 ElementID; u8 Length; - u8 data[1]; + u8 data[]; }; /* Length is the 4 bytes multiples of the sum of diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c index 11032316c53d..ff164a8c8679 100644 --- a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c +++ b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c @@ -2516,7 +2516,7 @@ fail: dev_kfree_skb_any(skb); - return 0; + return NETDEV_TX_OK; } diff --git a/drivers/staging/rtl8723bs/os_dep/mlme_linux.c b/drivers/staging/rtl8723bs/os_dep/mlme_linux.c index fb2df871c0cb..d46c65ab384b 100644 --- a/drivers/staging/rtl8723bs/os_dep/mlme_linux.c +++ b/drivers/staging/rtl8723bs/os_dep/mlme_linux.c @@ -48,8 +48,9 @@ void rtw_os_indicate_connect(struct adapter *adapter) if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true) || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true)) { rtw_cfg80211_ibss_indicate_connect(adapter); - } else + } else { rtw_cfg80211_indicate_connect(adapter); + } rtw_indicate_wx_assoc_event(adapter); netif_carrier_on(adapter->pnetdev); @@ -163,9 +164,8 @@ void rtw_report_sec_ie(struct adapter *adapter, u8 authmode, u8 *sec_ie) len = sec_ie[1] + 2; len = (len < IW_CUSTOM_MAX) ? len : IW_CUSTOM_MAX; - for (i = 0; i < len; i++) { + for (i = 0; i < len; i++) p += sprintf(p, "%02x", sec_ie[i]); - } p += sprintf(p, ")"); diff --git a/drivers/staging/rtl8723bs/os_dep/wifi_regd.c b/drivers/staging/rtl8723bs/os_dep/wifi_regd.c index 2833fc6901e6..3f04b7a954ba 100644 --- a/drivers/staging/rtl8723bs/os_dep/wifi_regd.c +++ b/drivers/staging/rtl8723bs/os_dep/wifi_regd.c @@ -34,7 +34,7 @@ NL80211_RRF_PASSIVE_SCAN) static const struct ieee80211_regdomain rtw_regdom_rd = { - .n_reg_rules = 3, + .n_reg_rules = 2, .alpha2 = "99", .reg_rules = { RTW_2GHZ_CH01_11, diff --git a/drivers/staging/sm750fb/sm750.c b/drivers/staging/sm750fb/sm750.c index 029f0d09e966..c237a8f8eb59 100644 --- a/drivers/staging/sm750fb/sm750.c +++ b/drivers/staging/sm750fb/sm750.c @@ -814,7 +814,7 @@ static int lynxfb_set_fbinfo(struct fb_info *info, int index) fix->ywrapstep = crtc->ywrapstep; fix->accel = FB_ACCEL_SMI; - strlcpy(fix->id, fixId[index], sizeof(fix->id)); + strscpy(fix->id, fixId[index], sizeof(fix->id)); fix->smem_start = crtc->oScreen + sm750_dev->vidmem_start; pr_info("fix->smem_start = %lx\n", fix->smem_start); diff --git a/drivers/staging/unisys/visorhba/visorhba_main.c b/drivers/staging/unisys/visorhba/visorhba_main.c index 7ae5306b92fe..4455d26f7c96 100644 --- a/drivers/staging/unisys/visorhba/visorhba_main.c +++ b/drivers/staging/unisys/visorhba/visorhba_main.c @@ -74,14 +74,10 @@ struct visorhba_devdata { unsigned long long interrupts_notme; unsigned long long interrupts_disabled; u64 __iomem *flags_addr; - atomic_t interrupt_rcvd; - wait_queue_head_t rsp_queue; struct visordisk_info head; unsigned int max_buff_len; int devnum; - struct task_struct *thread; - int thread_wait_ms; - + struct uiscmdrsp *cmdrsp; /* * allows us to pass int handles back-and-forth between us and * iovm, instead of raw pointers @@ -97,39 +93,6 @@ struct visorhba_devices_open { }; /* - * visor_thread_start - Starts a thread for the device - * @threadfn: Function the thread starts - * @thrcontext: Context to pass to the thread, i.e. devdata - * @name: String describing name of thread - * - * Starts a thread for the device. - * - * Return: The task_struct * denoting the thread on success, - * or NULL on failure - */ -static struct task_struct *visor_thread_start(int (*threadfn)(void *), - void *thrcontext, char *name) -{ - struct task_struct *task; - - task = kthread_run(threadfn, thrcontext, "%s", name); - if (IS_ERR(task)) { - pr_err("visorbus failed to start thread\n"); - return NULL; - } - return task; -} - -/* - * visor_thread_stop - Stops the thread if it is running - * @task: Description of process to stop - */ -static void visor_thread_stop(struct task_struct *task) -{ - kthread_stop(task); -} - -/* * add_scsipending_entry - Save off io command that is pending in * Service Partition * @devdata: Pointer to devdata @@ -730,7 +693,7 @@ static void visorhba_serverdown_complete(struct visorhba_devdata *devdata) /* Stop using the IOVM response queue (queue should be drained * by the end) */ - visor_thread_stop(devdata->thread); + visorbus_disable_channel_interrupts(devdata->dev); /* Fail commands that weren't completed */ spin_lock_irqsave(&devdata->privlock, flags); @@ -952,37 +915,18 @@ static void drain_queue(struct uiscmdrsp *cmdrsp, } /* - * process_incoming_rsps - Process responses from IOSP - * @v: Void pointer to visorhba_devdata - * - * Main function for the thread that processes the responses - * from the IO Service Partition. When the queue is empty, wait - * to check to see if it is full again. - * - * Return: 0 on success, -ENOMEM on failure + * This is used only when this driver is active as an hba driver in the + * client guest partition. It is called periodically so we can obtain + * and process the command respond from the IO Service Partition periodically. */ -static int process_incoming_rsps(void *v) +static void visorhba_channel_interrupt(struct visor_device *dev) { - struct visorhba_devdata *devdata = v; - struct uiscmdrsp *cmdrsp = NULL; - const int size = sizeof(*cmdrsp); + struct visorhba_devdata *devdata = dev_get_drvdata(&dev->device); - cmdrsp = kmalloc(size, GFP_ATOMIC); - if (!cmdrsp) - return -ENOMEM; + if (!devdata) + return; - while (1) { - if (kthread_should_stop()) - break; - wait_event_interruptible_timeout( - devdata->rsp_queue, (atomic_read( - &devdata->interrupt_rcvd) == 1), - msecs_to_jiffies(devdata->thread_wait_ms)); - /* drain queue */ - drain_queue(cmdrsp, devdata); - } - kfree(cmdrsp); - return 0; + drain_queue(devdata->cmdrsp, devdata); } /* @@ -1028,8 +972,7 @@ static int visorhba_resume(struct visor_device *dev, if (devdata->serverdown && !devdata->serverchangingstate) devdata->serverchangingstate = true; - devdata->thread = visor_thread_start(process_incoming_rsps, devdata, - "vhba_incming"); + visorbus_enable_channel_interrupts(dev); devdata->serverdown = false; devdata->serverchangingstate = false; @@ -1095,7 +1038,6 @@ static int visorhba_probe(struct visor_device *dev) goto err_debugfs_dir; } - init_waitqueue_head(&devdata->rsp_queue); spin_lock_init(&devdata->privlock); devdata->serverdown = false; devdata->serverchangingstate = false; @@ -1113,9 +1055,8 @@ static int visorhba_probe(struct visor_device *dev) idr_init(&devdata->idr); - devdata->thread_wait_ms = 2; - devdata->thread = visor_thread_start(process_incoming_rsps, devdata, - "vhba_incoming"); + devdata->cmdrsp = kmalloc(sizeof(*devdata->cmdrsp), GFP_ATOMIC); + visorbus_enable_channel_interrupts(dev); scsi_scan_host(scsihost); @@ -1150,7 +1091,8 @@ static void visorhba_remove(struct visor_device *dev) return; scsihost = devdata->scsihost; - visor_thread_stop(devdata->thread); + kfree(devdata->cmdrsp); + visorbus_disable_channel_interrupts(dev); scsi_remove_host(scsihost); scsi_host_put(scsihost); @@ -1173,7 +1115,7 @@ static struct visor_driver visorhba_driver = { .remove = visorhba_remove, .pause = visorhba_pause, .resume = visorhba_resume, - .channel_interrupt = NULL, + .channel_interrupt = visorhba_channel_interrupt, }; /* diff --git a/drivers/staging/vc04_services/bcm2835-audio/TODO b/drivers/staging/vc04_services/bcm2835-audio/TODO index cb8ead3e9108..b85451255db0 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/TODO +++ b/drivers/staging/vc04_services/bcm2835-audio/TODO @@ -5,6 +5,6 @@ ***************************************************************************** 1) Revisit multi-cards options and PCM route mixer control (as per comment -https://lkml.org/lkml/2018/9/8/200) +https://lore.kernel.org/lkml/s5hd0to5598.wl-tiwai@suse.de) 2) Fix the remaining checkpatch.pl errors and warnings. diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c index 4c2cae99776b..3703409715da 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c @@ -224,7 +224,7 @@ int snd_bcm2835_new_ctl(struct bcm2835_chip *chip) { int err; - strcpy(chip->card->mixername, "Broadcom Mixer"); + strscpy(chip->card->mixername, "Broadcom Mixer", sizeof(chip->card->mixername)); err = create_ctls(chip, ARRAY_SIZE(snd_bcm2835_ctl), snd_bcm2835_ctl); if (err < 0) return err; @@ -261,7 +261,7 @@ static const struct snd_kcontrol_new snd_bcm2835_headphones_ctl[] = { int snd_bcm2835_new_headphones_ctl(struct bcm2835_chip *chip) { - strcpy(chip->card->mixername, "Broadcom Mixer"); + strscpy(chip->card->mixername, "Broadcom Mixer", sizeof(chip->card->mixername)); return create_ctls(chip, ARRAY_SIZE(snd_bcm2835_headphones_ctl), snd_bcm2835_headphones_ctl); } @@ -295,7 +295,7 @@ static const struct snd_kcontrol_new snd_bcm2835_hdmi[] = { int snd_bcm2835_new_hdmi_ctl(struct bcm2835_chip *chip) { - strcpy(chip->card->mixername, "Broadcom Mixer"); + strscpy(chip->card->mixername, "Broadcom Mixer", sizeof(chip->card->mixername)); return create_ctls(chip, ARRAY_SIZE(snd_bcm2835_hdmi), snd_bcm2835_hdmi); } diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c index f783b632141b..542aff131d06 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c @@ -12,7 +12,7 @@ static const struct snd_pcm_hardware snd_bcm2835_playback_hw = { .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | - SNDRV_PCM_INFO_SYNC_APPLPTR), + SNDRV_PCM_INFO_SYNC_APPLPTR | SNDRV_PCM_INFO_BATCH), .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, .rate_min = 8000, @@ -29,7 +29,7 @@ static const struct snd_pcm_hardware snd_bcm2835_playback_hw = { static const struct snd_pcm_hardware snd_bcm2835_playback_spdif_hw = { .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | - SNDRV_PCM_INFO_SYNC_APPLPTR), + SNDRV_PCM_INFO_SYNC_APPLPTR | SNDRV_PCM_INFO_BATCH), .formats = SNDRV_PCM_FMTBIT_S16_LE, .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, @@ -334,7 +334,7 @@ int snd_bcm2835_new_pcm(struct bcm2835_chip *chip, const char *name, pcm->private_data = chip; pcm->nonatomic = true; - strcpy(pcm->name, name); + strscpy(pcm->name, name, sizeof(pcm->name)); if (!spdif) { chip->dest = route; chip->volume = 0; diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c index cf5f80f5ca6b..c250fbef2fa3 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c @@ -185,9 +185,9 @@ static int snd_add_child_device(struct device *dev, goto error; } - strcpy(card->driver, audio_driver->driver.name); - strcpy(card->shortname, audio_driver->shortname); - strcpy(card->longname, audio_driver->longname); + strscpy(card->driver, audio_driver->driver.name, sizeof(card->driver)); + strscpy(card->shortname, audio_driver->shortname, sizeof(card->shortname)); + strscpy(card->longname, audio_driver->longname, sizeof(card->longname)); err = audio_driver->newpcm(chip, audio_driver->shortname, audio_driver->route, diff --git a/drivers/staging/vc04_services/interface/TODO b/drivers/staging/vc04_services/interface/TODO index fc2752bc95b2..0bcb8f158afc 100644 --- a/drivers/staging/vc04_services/interface/TODO +++ b/drivers/staging/vc04_services/interface/TODO @@ -91,3 +91,7 @@ The first thing one generally sees in a probe function is a memory allocation for all the device specific data. This structure is then passed all over the driver. This is good practice since it makes the driver work regardless of the number of devices probed. + +14) Clean up Sparse warnings from __user annotations. See +vchiq_irq_queue_bulk_tx_rx(). Ensure that the address of "&waiter->bulk_waiter" +is never disclosed to userspace. diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c index f500a7043805..59e45dc03a97 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c @@ -958,7 +958,7 @@ static int vchiq_irq_queue_bulk_tx_rx(struct vchiq_instance *instance, struct vchiq_service *service; struct bulk_waiter_node *waiter = NULL; bool found = false; - void *userdata = NULL; + void *userdata; int status = 0; int ret; @@ -997,15 +997,10 @@ static int vchiq_irq_queue_bulk_tx_rx(struct vchiq_instance *instance, "found bulk_waiter %pK for pid %d", waiter, current->pid); userdata = &waiter->bulk_waiter; + } else { + userdata = args->userdata; } - /* - * FIXME address space mismatch: - * args->data may be interpreted as a kernel pointer - * in create_pagelist() called from vchiq_bulk_transfer(), - * accessing kernel data instead of user space, based on the - * address. - */ status = vchiq_bulk_transfer(args->handle, NULL, args->data, args->size, userdata, args->mode, dir); @@ -1057,14 +1052,21 @@ static inline int vchiq_get_user_ptr(void __user **buf, void __user *ubuf, int i compat_uptr_t ptr32; compat_uptr_t __user *uptr = ubuf; ret = get_user(ptr32, uptr + index); + if (ret) + return ret; + *buf = compat_ptr(ptr32); } else { uintptr_t ptr, __user *uptr = ubuf; ret = get_user(ptr, uptr + index); + + if (ret) + return ret; + *buf = (void __user *)ptr; } - return ret; + return 0; } struct vchiq_completion_data32 { @@ -1715,7 +1717,7 @@ vchiq_compat_ioctl_queue_bulk(struct file *file, { struct vchiq_queue_bulk_transfer32 args32; struct vchiq_queue_bulk_transfer args; - enum vchiq_bulk_dir dir = (cmd == VCHIQ_IOC_QUEUE_BULK_TRANSMIT) ? + enum vchiq_bulk_dir dir = (cmd == VCHIQ_IOC_QUEUE_BULK_TRANSMIT32) ? VCHIQ_BULK_TRANSMIT : VCHIQ_BULK_RECEIVE; if (copy_from_user(&args32, argp, sizeof(args32))) diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_connected.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_connected.c index f91e21a0b51b..3023fa9fdc64 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_connected.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_connected.c @@ -12,13 +12,12 @@ static int g_connected; static int g_num_deferred_callbacks; static VCHIQ_CONNECTED_CALLBACK_T g_deferred_callback[MAX_CALLBACKS]; static int g_once_init; -static struct mutex g_connected_mutex; +static DEFINE_MUTEX(g_connected_mutex); /* Function to initialize our lock */ static void connected_init(void) { if (!g_once_init) { - mutex_init(&g_connected_mutex); g_once_init = 1; } } diff --git a/drivers/staging/vt6655/baseband.c b/drivers/staging/vt6655/baseband.c index 6b25d75d2501..1aa675241599 100644 --- a/drivers/staging/vt6655/baseband.c +++ b/drivers/staging/vt6655/baseband.c @@ -1683,7 +1683,7 @@ static unsigned char byVT3253B0_AGC[CB_VT3253B0_AGC][2] = { {0xF0, 0x00}, }; -static const unsigned short awcFrameTime[MAX_RATE] = { +static const unsigned short awc_frame_time[MAX_RATE] = { 10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216 }; @@ -1716,7 +1716,7 @@ unsigned int bb_get_frame_time(unsigned char by_preamble_type, if (rate_idx > RATE_54M) return 0; - rate = (unsigned int)awcFrameTime[rate_idx]; + rate = (unsigned int)awc_frame_time[rate_idx]; if (rate_idx <= 3) { /* CCK mode */ if (by_preamble_type == 1) /* Short */ diff --git a/drivers/staging/vt6655/rxtx.h b/drivers/staging/vt6655/rxtx.h index 464dd89078b2..e7061d383306 100644 --- a/drivers/staging/vt6655/rxtx.h +++ b/drivers/staging/vt6655/rxtx.h @@ -111,7 +111,7 @@ struct vnt_rts_g { __le16 duration_bb; u16 reserved; struct ieee80211_rts data; -} __packed; +} __packed __aligned(2); struct vnt_rts_g_fb { struct vnt_phy_field b; @@ -125,14 +125,14 @@ struct vnt_rts_g_fb { __le16 rts_duration_ba_f1; __le16 rts_duration_aa_f1; struct ieee80211_rts data; -} __packed; +} __packed __aligned(2); struct vnt_rts_ab { struct vnt_phy_field ab; __le16 duration; u16 reserved; struct ieee80211_rts data; -} __packed; +} __packed __aligned(2); struct vnt_rts_a_fb { struct vnt_phy_field a; @@ -141,7 +141,7 @@ struct vnt_rts_a_fb { __le16 rts_duration_f0; __le16 rts_duration_f1; struct ieee80211_rts data; -} __packed; +} __packed __aligned(2); /* CTS buffer header */ struct vnt_cts { diff --git a/drivers/staging/vt6656/rf.c b/drivers/staging/vt6656/rf.c index 5b8da06e3916..bcd4d467e03a 100644 --- a/drivers/staging/vt6656/rf.c +++ b/drivers/staging/vt6656/rf.c @@ -687,7 +687,7 @@ static int vnt_rf_set_txpower(struct vnt_private *priv, u8 power, if (hw_value < ARRAY_SIZE(vt3226d0_lo_current_table)) { ret = vnt_rf_write_embedded(priv, - vt3226d0_lo_current_table[hw_value]); + vt3226d0_lo_current_table[hw_value]); if (ret) return ret; } diff --git a/drivers/staging/vt6656/rxtx.h b/drivers/staging/vt6656/rxtx.h index 6ca2ca32d036..f23440799443 100644 --- a/drivers/staging/vt6656/rxtx.h +++ b/drivers/staging/vt6656/rxtx.h @@ -95,7 +95,7 @@ struct vnt_rts_g { u16 wReserved; struct ieee80211_rts data; struct vnt_tx_datahead_g data_head; -} __packed; +} __packed __aligned(2); struct vnt_rts_ab { struct vnt_phy_field ab; @@ -103,7 +103,7 @@ struct vnt_rts_ab { u16 wReserved; struct ieee80211_rts data; struct vnt_tx_datahead_ab data_head; -} __packed; +} __packed __aligned(2); /* CTS buffer header */ struct vnt_cts { @@ -113,7 +113,7 @@ struct vnt_cts { struct ieee80211_cts data; u16 reserved2; struct vnt_tx_datahead_g data_head; -} __packed; +} __packed __aligned(2); union vnt_tx_data_head { /* rts g */ diff --git a/drivers/staging/wfx/bh.c b/drivers/staging/wfx/bh.c index ed53d0b45592..cd6bcfdfbe9a 100644 --- a/drivers/staging/wfx/bh.c +++ b/drivers/staging/wfx/bh.c @@ -5,7 +5,6 @@ * Copyright (c) 2017-2020, Silicon Laboratories, Inc. * Copyright (c) 2010, ST-Ericsson */ -#include <linux/gpio/consumer.h> #include <net/mac80211.h> #include "bh.h" diff --git a/drivers/staging/wfx/bh.h b/drivers/staging/wfx/bh.h index 78c49329e22a..92ef3298d4ac 100644 --- a/drivers/staging/wfx/bh.h +++ b/drivers/staging/wfx/bh.h @@ -8,10 +8,6 @@ #ifndef WFX_BH_H #define WFX_BH_H -#include <linux/atomic.h> -#include <linux/wait.h> -#include <linux/workqueue.h> - struct wfx_dev; struct wfx_hif { diff --git a/drivers/staging/wfx/bus.h b/drivers/staging/wfx/bus.h index ca04b3da6204..ea3911485307 100644 --- a/drivers/staging/wfx/bus.h +++ b/drivers/staging/wfx/bus.h @@ -8,9 +8,6 @@ #ifndef WFX_BUS_H #define WFX_BUS_H -#include <linux/mmc/sdio_func.h> -#include <linux/spi/spi.h> - #define WFX_REG_CONFIG 0x0 #define WFX_REG_CONTROL 0x1 #define WFX_REG_IN_OUT_QUEUE 0x2 diff --git a/drivers/staging/wfx/bus_sdio.c b/drivers/staging/wfx/bus_sdio.c index e06d7e1ebe9c..588edce44854 100644 --- a/drivers/staging/wfx/bus_sdio.c +++ b/drivers/staging/wfx/bus_sdio.c @@ -5,19 +5,13 @@ * Copyright (c) 2017-2020, Silicon Laboratories, Inc. * Copyright (c) 2010, ST-Ericsson */ -#include <linux/module.h> #include <linux/mmc/sdio.h> #include <linux/mmc/sdio_func.h> #include <linux/mmc/card.h> -#include <linux/interrupt.h> #include <linux/of_irq.h> -#include <linux/irq.h> #include "bus.h" #include "wfx.h" -#include "hwio.h" -#include "main.h" -#include "bh.h" static const struct wfx_platform_data wfx_sdio_pdata = { .file_fw = "wfm_wf200", diff --git a/drivers/staging/wfx/bus_spi.c b/drivers/staging/wfx/bus_spi.c index a99125d1a30d..f89855abe9f8 100644 --- a/drivers/staging/wfx/bus_spi.c +++ b/drivers/staging/wfx/bus_spi.c @@ -6,19 +6,12 @@ * Copyright (c) 2011, Sagrad Inc. * Copyright (c) 2010, ST-Ericsson */ -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> -#include <linux/interrupt.h> #include <linux/irq.h> #include <linux/of.h> #include "bus.h" #include "wfx.h" -#include "hwio.h" -#include "main.h" -#include "bh.h" #define SET_WRITE 0x7FFF /* usage: and operation */ #define SET_READ 0x8000 /* usage: or operation */ diff --git a/drivers/staging/wfx/data_rx.c b/drivers/staging/wfx/data_rx.c index 385f2d42a0e2..2cfa16279220 100644 --- a/drivers/staging/wfx/data_rx.c +++ b/drivers/staging/wfx/data_rx.c @@ -5,13 +5,8 @@ * Copyright (c) 2017-2020, Silicon Laboratories, Inc. * Copyright (c) 2010, ST-Ericsson */ -#include <linux/etherdevice.h> -#include <net/mac80211.h> - #include "data_rx.h" #include "wfx.h" -#include "bh.h" -#include "sta.h" static void wfx_rx_handle_ba(struct wfx_vif *wvif, struct ieee80211_mgmt *mgmt) { diff --git a/drivers/staging/wfx/data_tx.c b/drivers/staging/wfx/data_tx.c index 36b36ef39d05..76f26e3c4381 100644 --- a/drivers/staging/wfx/data_tx.c +++ b/drivers/staging/wfx/data_tx.c @@ -6,14 +6,9 @@ * Copyright (c) 2010, ST-Ericsson */ #include <net/mac80211.h> -#include <linux/etherdevice.h> -#include "data_tx.h" #include "wfx.h" -#include "bh.h" #include "sta.h" -#include "queue.h" -#include "debug.h" #include "traces.h" #include "hif_tx_mib.h" @@ -331,6 +326,7 @@ static int wfx_tx_inner(struct wfx_vif *wvif, struct ieee80211_sta *sta, { struct hif_msg *hif_msg; struct hif_req_tx *req; + struct wfx_tx_priv *tx_priv; struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); struct ieee80211_key_conf *hw_key = tx_info->control.hw_key; struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; @@ -344,11 +340,14 @@ static int wfx_tx_inner(struct wfx_vif *wvif, struct ieee80211_sta *sta, // From now tx_info->control is unusable memset(tx_info->rate_driver_data, 0, sizeof(struct wfx_tx_priv)); + // Fill tx_priv + tx_priv = (struct wfx_tx_priv *)tx_info->rate_driver_data; + tx_priv->icv_size = wfx_tx_get_icv_len(hw_key); // Fill hif_msg WARN(skb_headroom(skb) < wmsg_len, "not enough space in skb"); WARN(offset & 1, "attempt to transmit an unaligned frame"); - skb_put(skb, wfx_tx_get_icv_len(hw_key)); + skb_put(skb, tx_priv->icv_size); skb_push(skb, wmsg_len); memset(skb->data, 0, wmsg_len); hif_msg = (struct hif_msg *)skb->data; @@ -484,6 +483,7 @@ static void wfx_tx_fill_rates(struct wfx_dev *wdev, void wfx_tx_confirm_cb(struct wfx_dev *wdev, const struct hif_cnf_tx *arg) { + const struct wfx_tx_priv *tx_priv; struct ieee80211_tx_info *tx_info; struct wfx_vif *wvif; struct sk_buff *skb; @@ -495,6 +495,7 @@ void wfx_tx_confirm_cb(struct wfx_dev *wdev, const struct hif_cnf_tx *arg) return; } tx_info = IEEE80211_SKB_CB(skb); + tx_priv = wfx_skb_tx_priv(skb); wvif = wdev_to_wvif(wdev, ((struct hif_msg *)skb->data)->interface); WARN_ON(!wvif); if (!wvif) @@ -503,6 +504,8 @@ void wfx_tx_confirm_cb(struct wfx_dev *wdev, const struct hif_cnf_tx *arg) // Note that wfx_pending_get_pkt_us_delay() get data from tx_info _trace_tx_stats(arg, skb, wfx_pending_get_pkt_us_delay(wdev, skb)); wfx_tx_fill_rates(wdev, tx_info, arg); + skb_trim(skb, skb->len - tx_priv->icv_size); + // From now, you can touch to tx_info->status, but do not touch to // tx_priv anymore // FIXME: use ieee80211_tx_info_clear_status() diff --git a/drivers/staging/wfx/data_tx.h b/drivers/staging/wfx/data_tx.h index 46c9fff7a870..6b3020097efa 100644 --- a/drivers/staging/wfx/data_tx.h +++ b/drivers/staging/wfx/data_tx.h @@ -8,9 +8,6 @@ #ifndef WFX_DATA_TX_H #define WFX_DATA_TX_H -#include <linux/list.h> -#include <net/mac80211.h> - #include "hif_api_cmd.h" #include "hif_api_mib.h" @@ -35,6 +32,7 @@ struct tx_policy_cache { struct wfx_tx_priv { ktime_t xmit_timestamp; + unsigned char icv_size; }; void wfx_tx_policy_init(struct wfx_vif *wvif); diff --git a/drivers/staging/wfx/debug.c b/drivers/staging/wfx/debug.c index eedada78c25f..3e87d13eb358 100644 --- a/drivers/staging/wfx/debug.c +++ b/drivers/staging/wfx/debug.c @@ -5,15 +5,9 @@ * Copyright (c) 2017-2020, Silicon Laboratories, Inc. * Copyright (c) 2010, ST-Ericsson */ -#include <linux/debugfs.h> -#include <linux/seq_file.h> -#include <linux/crc32.h> - #include "debug.h" #include "wfx.h" #include "sta.h" -#include "main.h" -#include "hif_tx.h" #include "hif_tx_mib.h" #define CREATE_TRACE_POINTS diff --git a/drivers/staging/wfx/fwio.c b/drivers/staging/wfx/fwio.c index 1b8aec02d169..1bb9054871c4 100644 --- a/drivers/staging/wfx/fwio.c +++ b/drivers/staging/wfx/fwio.c @@ -6,8 +6,6 @@ * Copyright (c) 2010, ST-Ericsson */ #include <linux/firmware.h> -#include <linux/slab.h> -#include <linux/mm.h> #include <linux/bitfield.h> #include "fwio.h" diff --git a/drivers/staging/wfx/hif_api_cmd.h b/drivers/staging/wfx/hif_api_cmd.h index 11bc1a58edae..8b671c9ab97c 100644 --- a/drivers/staging/wfx/hif_api_cmd.h +++ b/drivers/staging/wfx/hif_api_cmd.h @@ -8,10 +8,6 @@ #ifndef WFX_HIF_API_CMD_H #define WFX_HIF_API_CMD_H -#include <linux/ieee80211.h> - -#include "hif_api_general.h" - enum hif_requests_ids { HIF_REQ_ID_RESET = 0x0a, HIF_REQ_ID_READ_MIB = 0x05, @@ -100,7 +96,7 @@ struct hif_req_update_ie { u8 reserved1:5; u8 reserved2; __le16 num_ies; - struct element ie[]; + u8 ie[]; } __packed; struct hif_cnf_update_ie { diff --git a/drivers/staging/wfx/hif_api_general.h b/drivers/staging/wfx/hif_api_general.h index 24188945718d..70b253d0265d 100644 --- a/drivers/staging/wfx/hif_api_general.h +++ b/drivers/staging/wfx/hif_api_general.h @@ -8,15 +8,6 @@ #ifndef WFX_HIF_API_GENERAL_H #define WFX_HIF_API_GENERAL_H -#ifdef __KERNEL__ -#include <linux/types.h> -#include <linux/if_ether.h> -#else -#include <net/ethernet.h> -#include <stdint.h> -#define __packed __attribute__((__packed__)) -#endif - #define HIF_ID_IS_INDICATION 0x80 #define HIF_COUNTER_MAX 7 diff --git a/drivers/staging/wfx/hif_tx.c b/drivers/staging/wfx/hif_tx.c index 63b437261eb7..17dc13321978 100644 --- a/drivers/staging/wfx/hif_tx.c +++ b/drivers/staging/wfx/hif_tx.c @@ -6,11 +6,7 @@ * Copyright (c) 2017-2020, Silicon Laboratories, Inc. * Copyright (c) 2010, ST-Ericsson */ -#include <linux/etherdevice.h> - -#include "hif_tx.h" #include "wfx.h" -#include "bh.h" #include "hwio.h" #include "debug.h" #include "sta.h" diff --git a/drivers/staging/wfx/hif_tx_mib.c b/drivers/staging/wfx/hif_tx_mib.c index 1926cf1b62be..6432ed86505c 100644 --- a/drivers/staging/wfx/hif_tx_mib.c +++ b/drivers/staging/wfx/hif_tx_mib.c @@ -6,13 +6,8 @@ * Copyright (c) 2010, ST-Ericsson * Copyright (C) 2010, ST-Ericsson SA */ - -#include <linux/etherdevice.h> - #include "wfx.h" -#include "hif_tx.h" #include "hif_tx_mib.h" -#include "hif_api_mib.h" int hif_set_output_power(struct wfx_vif *wvif, int val) { diff --git a/drivers/staging/wfx/hwio.c b/drivers/staging/wfx/hwio.c index 36fbc5b5d64c..089bb41be149 100644 --- a/drivers/staging/wfx/hwio.c +++ b/drivers/staging/wfx/hwio.c @@ -5,13 +5,10 @@ * Copyright (c) 2017-2020, Silicon Laboratories, Inc. * Copyright (c) 2010, ST-Ericsson */ -#include <linux/kernel.h> -#include <linux/delay.h> #include <linux/slab.h> #include "hwio.h" #include "wfx.h" -#include "bus.h" #include "traces.h" /* diff --git a/drivers/staging/wfx/hwio.h b/drivers/staging/wfx/hwio.h index 0b8e4f7157df..8bb9bcfc3182 100644 --- a/drivers/staging/wfx/hwio.h +++ b/drivers/staging/wfx/hwio.h @@ -8,8 +8,6 @@ #ifndef WFX_HWIO_H #define WFX_HWIO_H -#include <linux/types.h> - struct wfx_dev; int wfx_data_read(struct wfx_dev *wdev, void *buf, size_t buf_len); diff --git a/drivers/staging/wfx/key.c b/drivers/staging/wfx/key.c index 2ab82bed4c1b..c93d07dcdc10 100644 --- a/drivers/staging/wfx/key.c +++ b/drivers/staging/wfx/key.c @@ -5,12 +5,10 @@ * Copyright (c) 2017-2020, Silicon Laboratories, Inc. * Copyright (c) 2010, ST-Ericsson */ -#include <linux/etherdevice.h> #include <net/mac80211.h> #include "key.h" #include "wfx.h" -#include "hif_tx_mib.h" static int wfx_alloc_key(struct wfx_dev *wdev) { diff --git a/drivers/staging/wfx/key.h b/drivers/staging/wfx/key.h index 70a44d0ca35e..4dc9feadaba2 100644 --- a/drivers/staging/wfx/key.h +++ b/drivers/staging/wfx/key.h @@ -8,8 +8,6 @@ #ifndef WFX_KEY_H #define WFX_KEY_H -#include <net/mac80211.h> - struct wfx_dev; struct wfx_vif; diff --git a/drivers/staging/wfx/main.c b/drivers/staging/wfx/main.c index e7bc1988124a..b9ea9a93fe1a 100644 --- a/drivers/staging/wfx/main.c +++ b/drivers/staging/wfx/main.c @@ -10,28 +10,21 @@ * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net> * Copyright (c) 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al. */ -#include <linux/module.h> #include <linux/of.h> #include <linux/of_net.h> -#include <linux/gpio/consumer.h> #include <linux/mmc/sdio_func.h> #include <linux/spi/spi.h> -#include <linux/etherdevice.h> #include <linux/firmware.h> -#include "main.h" #include "wfx.h" #include "fwio.h" #include "hwio.h" #include "bus.h" -#include "bh.h" #include "sta.h" #include "key.h" #include "scan.h" #include "debug.h" -#include "data_tx.h" #include "hif_tx_mib.h" -#include "hif_api_cmd.h" #define WFX_PDS_MAX_SIZE 1500 diff --git a/drivers/staging/wfx/main.h b/drivers/staging/wfx/main.h index a0db322383a3..086bcc041b90 100644 --- a/drivers/staging/wfx/main.h +++ b/drivers/staging/wfx/main.h @@ -10,11 +10,8 @@ #ifndef WFX_MAIN_H #define WFX_MAIN_H -#include <linux/device.h> #include <linux/gpio/consumer.h> -#include "hif_api_general.h" - struct wfx_dev; struct hwbus_ops; diff --git a/drivers/staging/wfx/queue.c b/drivers/staging/wfx/queue.c index 31c37f69c295..3bddf282a4ce 100644 --- a/drivers/staging/wfx/queue.c +++ b/drivers/staging/wfx/queue.c @@ -5,13 +5,9 @@ * Copyright (c) 2017-2020, Silicon Laboratories, Inc. * Copyright (c) 2010, ST-Ericsson */ -#include <linux/sched.h> #include <net/mac80211.h> -#include "queue.h" #include "wfx.h" -#include "sta.h" -#include "data_tx.h" #include "traces.h" void wfx_tx_lock(struct wfx_dev *wdev) diff --git a/drivers/staging/wfx/queue.h b/drivers/staging/wfx/queue.h index 80ba19455ef3..e43aa9dfbc45 100644 --- a/drivers/staging/wfx/queue.h +++ b/drivers/staging/wfx/queue.h @@ -8,9 +8,6 @@ #ifndef WFX_QUEUE_H #define WFX_QUEUE_H -#include <linux/skbuff.h> -#include <linux/atomic.h> - struct wfx_dev; struct wfx_vif; diff --git a/drivers/staging/wfx/scan.h b/drivers/staging/wfx/scan.h index c7496a766478..e5b7eef78858 100644 --- a/drivers/staging/wfx/scan.h +++ b/drivers/staging/wfx/scan.h @@ -8,8 +8,6 @@ #ifndef WFX_SCAN_H #define WFX_SCAN_H -#include <net/mac80211.h> - struct wfx_dev; struct wfx_vif; diff --git a/drivers/staging/wfx/sta.c b/drivers/staging/wfx/sta.c index 196779a1b89a..5585f9e876e1 100644 --- a/drivers/staging/wfx/sta.c +++ b/drivers/staging/wfx/sta.c @@ -5,17 +5,11 @@ * Copyright (c) 2017-2020, Silicon Laboratories, Inc. * Copyright (c) 2010, ST-Ericsson */ -#include <linux/etherdevice.h> #include <net/mac80211.h> #include "sta.h" #include "wfx.h" -#include "fwio.h" -#include "bh.h" -#include "key.h" #include "scan.h" -#include "debug.h" -#include "hif_tx.h" #include "hif_tx_mib.h" #define HIF_MAX_ARP_IP_ADDRTABLE_ENTRIES 2 diff --git a/drivers/staging/wfx/sta.h b/drivers/staging/wfx/sta.h index d7b5df5ea4e6..a3fb9fc93fa4 100644 --- a/drivers/staging/wfx/sta.h +++ b/drivers/staging/wfx/sta.h @@ -8,8 +8,6 @@ #ifndef WFX_STA_H #define WFX_STA_H -#include <net/mac80211.h> - struct wfx_dev; struct wfx_vif; diff --git a/drivers/staging/wfx/traces.h b/drivers/staging/wfx/traces.h index e34c7a538c65..afe1074e09b3 100644 --- a/drivers/staging/wfx/traces.h +++ b/drivers/staging/wfx/traces.h @@ -12,11 +12,8 @@ #define _WFX_TRACE_H #include <linux/tracepoint.h> -#include <net/mac80211.h> #include "bus.h" -#include "hif_api_cmd.h" -#include "hif_api_mib.h" /* The hell below need some explanations. For each symbolic number, we need to * define it with TRACE_DEFINE_ENUM() and in a list for __print_symbolic. diff --git a/drivers/staging/wfx/wfx.h b/drivers/staging/wfx/wfx.h index 94898680ccde..a185b82795c4 100644 --- a/drivers/staging/wfx/wfx.h +++ b/drivers/staging/wfx/wfx.h @@ -10,9 +10,6 @@ #ifndef WFX_H #define WFX_H -#include <linux/completion.h> -#include <linux/workqueue.h> -#include <linux/mutex.h> #include <linux/nospec.h> #include <net/mac80211.h> diff --git a/drivers/staging/wimax/i2400m/fw.c b/drivers/staging/wimax/i2400m/fw.c index edb5eba0898b..92ea5c101e76 100644 --- a/drivers/staging/wimax/i2400m/fw.c +++ b/drivers/staging/wimax/i2400m/fw.c @@ -189,12 +189,17 @@ void i2400m_bm_cmd_prepare(struct i2400m_bootrom_header *cmd) { if (i2400m_brh_get_use_checksum(cmd)) { int i; - u32 checksum = 0; + __le32 checksum = 0; const u32 *checksum_ptr = (void *) cmd->payload; - for (i = 0; i < cmd->data_size / 4; i++) - checksum += cpu_to_le32(*checksum_ptr++); - checksum += cmd->command + cmd->target_addr + cmd->data_size; - cmd->block_checksum = cpu_to_le32(checksum); + + for (i = 0; i < le32_to_cpu(cmd->data_size) / 4; i++) + le32_add_cpu(&checksum, *checksum_ptr++); + + le32_add_cpu(&checksum, le32_to_cpu(cmd->command)); + le32_add_cpu(&checksum, le32_to_cpu(cmd->target_addr)); + le32_add_cpu(&checksum, le32_to_cpu(cmd->data_size)); + + cmd->block_checksum = checksum; } } EXPORT_SYMBOL_GPL(i2400m_bm_cmd_prepare); @@ -583,7 +588,7 @@ ssize_t i2400m_bm_cmd(struct i2400m *i2400m, struct i2400m_bootrom_header *ack, size_t ack_size, int flags) { - ssize_t result = -ENOMEM, rx_bytes; + ssize_t result, rx_bytes; struct device *dev = i2400m_dev(i2400m); int opcode = cmd == NULL ? -1 : i2400m_brh_get_opcode(cmd); diff --git a/drivers/staging/wimax/i2400m/netdev.c b/drivers/staging/wimax/i2400m/netdev.c index 8339d600e77b..cd06eaf75e8b 100644 --- a/drivers/staging/wimax/i2400m/netdev.c +++ b/drivers/staging/wimax/i2400m/netdev.c @@ -561,11 +561,11 @@ static void i2400m_get_drvinfo(struct net_device *net_dev, { struct i2400m *i2400m = net_dev_to_i2400m(net_dev); - strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); - strlcpy(info->fw_version, i2400m->fw_name ? : "", + strscpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); + strscpy(info->fw_version, i2400m->fw_name ? : "", sizeof(info->fw_version)); if (net_dev->dev.parent) - strlcpy(info->bus_info, dev_name(net_dev->dev.parent), + strscpy(info->bus_info, dev_name(net_dev->dev.parent), sizeof(info->bus_info)); } diff --git a/drivers/staging/wimax/i2400m/rx.c b/drivers/staging/wimax/i2400m/rx.c index c9fb619a9e01..702a1e2fabcd 100644 --- a/drivers/staging/wimax/i2400m/rx.c +++ b/drivers/staging/wimax/i2400m/rx.c @@ -485,8 +485,7 @@ struct i2400m_roq_data { * store the sequence number (sn) and the cs (packet type) coming from * the RX payload header from the device. */ -struct i2400m_roq -{ +struct i2400m_roq { unsigned ws; struct sk_buff_head queue; struct i2400m_roq_log *log; @@ -819,7 +818,7 @@ void i2400m_roq_reset(struct i2400m *i2400m, struct i2400m_roq *roq) */ static void i2400m_roq_queue(struct i2400m *i2400m, struct i2400m_roq *roq, - struct sk_buff * skb, unsigned lbn) + struct sk_buff *skb, unsigned lbn) { struct device *dev = i2400m_dev(i2400m); unsigned nsn, len; @@ -882,7 +881,7 @@ void i2400m_roq_update_ws(struct i2400m *i2400m, struct i2400m_roq *roq, */ static void i2400m_roq_queue_update_ws(struct i2400m *i2400m, struct i2400m_roq *roq, - struct sk_buff * skb, unsigned sn) + struct sk_buff *skb, unsigned sn) { struct device *dev = i2400m_dev(i2400m); unsigned nsn, old_ws, len; diff --git a/drivers/staging/wimax/i2400m/tx.c b/drivers/staging/wimax/i2400m/tx.c index e9436212fe54..8c01f42876ea 100644 --- a/drivers/staging/wimax/i2400m/tx.c +++ b/drivers/staging/wimax/i2400m/tx.c @@ -785,7 +785,7 @@ try_new: d_printf(3, dev, "pld 0x%08x (type 0x%1x len 0x%04zx\n", le32_to_cpu(tx_msg->pld[num_pls].val), pl_type, buf_len); - tx_msg->num_pls = le16_to_cpu(num_pls+1); + tx_msg->num_pls = cpu_to_le16(num_pls + 1); tx_msg->size += padded_len; d_printf(2, dev, "TX: appended %zu b (up to %u b) pl #%u\n", padded_len, tx_msg->size, num_pls+1); @@ -893,10 +893,10 @@ skip: current->pid, (void *) tx_msg - i2400m->tx_buf, (size_t) tx_msg->offset, (size_t) tx_msg->size, (size_t) tx_msg_moved->size); - tx_msg_moved->barker = le32_to_cpu(I2400M_H2D_PREVIEW_BARKER); - tx_msg_moved->sequence = le32_to_cpu(i2400m->tx_sequence++); + tx_msg_moved->barker = cpu_to_le32(I2400M_H2D_PREVIEW_BARKER); + tx_msg_moved->sequence = cpu_to_le32(i2400m->tx_sequence++); - pls = le32_to_cpu(tx_msg_moved->num_pls); + pls = le16_to_cpu(tx_msg_moved->num_pls); i2400m->tx_pl_num += pls; /* Update stats */ if (pls > i2400m->tx_pl_max) i2400m->tx_pl_max = pls; diff --git a/drivers/staging/wimax/i2400m/usb.c b/drivers/staging/wimax/i2400m/usb.c index f250d03ce7c7..481b1ccde983 100644 --- a/drivers/staging/wimax/i2400m/usb.c +++ b/drivers/staging/wimax/i2400m/usb.c @@ -333,8 +333,8 @@ static void i2400mu_get_drvinfo(struct net_device *net_dev, struct i2400mu *i2400mu = container_of(i2400m, struct i2400mu, i2400m); struct usb_device *udev = i2400mu->usb_dev; - strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); - strlcpy(info->fw_version, i2400m->fw_name ? : "", + strscpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); + strscpy(info->fw_version, i2400m->fw_name ? : "", sizeof(info->fw_version)); usb_make_path(udev, info->bus_info, sizeof(info->bus_info)); } diff --git a/drivers/staging/wlan-ng/p80211netdev.c b/drivers/staging/wlan-ng/p80211netdev.c index a15abb2c8f54..6f9666dc0277 100644 --- a/drivers/staging/wlan-ng/p80211netdev.c +++ b/drivers/staging/wlan-ng/p80211netdev.c @@ -569,24 +569,22 @@ static int p80211knetdev_do_ioctl(struct net_device *dev, goto bail; } - /* Allocate a buf of size req->len */ - msgbuf = kmalloc(req->len, GFP_KERNEL); - if (msgbuf) { - if (copy_from_user(msgbuf, (void __user *)req->data, req->len)) - result = -EFAULT; - else - result = p80211req_dorequest(wlandev, msgbuf); + msgbuf = memdup_user(req->data, req->len); + if (IS_ERR(msgbuf)) { + result = PTR_ERR(msgbuf); + goto bail; + } - if (result == 0) { - if (copy_to_user - ((void __user *)req->data, msgbuf, req->len)) { - result = -EFAULT; - } + result = p80211req_dorequest(wlandev, msgbuf); + + if (result == 0) { + if (copy_to_user + ((void __user *)req->data, msgbuf, req->len)) { + result = -EFAULT; } - kfree(msgbuf); - } else { - result = -ENOMEM; } + kfree(msgbuf); + bail: /* If allocate,copyfrom or copyto fails, return errno */ return result; |