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authorSuthikulpanit, Suravee <Suravee.Suthikulpanit@amd.com>2019-07-16 04:29:16 +0000
committerJoerg Roedel <jroedel@suse.de>2019-07-23 17:41:52 +0200
commit66929812955bbec808c94d7a3916f41638a98a0a (patch)
tree6e585faa748bf1f5410ee5f605585ee2c961ab5e /sound
parent201c1db90cd643282185a00770f12f95da330eca (diff)
iommu/amd: Add support for X2APIC IOMMU interrupts
AMD IOMMU requires IntCapXT registers to be setup in order to generate its own interrupts (for Event Log, PPR Log, and GA Log) with 32-bit APIC destination ID. Without this support, AMD IOMMU MSI interrupts will not be routed correctly when booting the system in X2APIC mode. Cc: Joerg Roedel <joro@8bytes.org> Fixes: 90fcffd9cf5e ('iommu/amd: Add support for IOMMU XT mode') Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'sound')
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