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authorBabu Moger <babu.moger@amd.com>2022-04-19 15:53:52 -0500
committerPaolo Bonzini <pbonzini@redhat.com>2022-04-29 12:49:15 -0400
commitf30903394eb62316dddea8801b357f5cec4df187 (patch)
tree92aa1ba94bfaa65a7cd49259bc38732ef348e648 /scripts/dtc
parent71d7c575a673d42ad7175ad5fc27c85c80330311 (diff)
x86/cpufeatures: Add virtual TSC_AUX feature bit
The TSC_AUX Virtualization feature allows AMD SEV-ES guests to securely use TSC_AUX (auxiliary time stamp counter data) MSR in RDTSCP and RDPID instructions. The TSC_AUX MSR is typically initialized to APIC ID or another unique identifier so that software can quickly associate returned TSC value with the logical processor. Add the feature bit and also include it in the kvm for detection. Signed-off-by: Babu Moger <babu.moger@amd.com> Acked-by: Borislav Petkov <bp@suse.de> Message-Id: <165040157111.1399644.6123821125319995316.stgit@bmoger-ubuntu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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