diff options
| author | Sean Christopherson <seanjc@google.com> | 2024-01-22 15:53:11 -0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2024-04-19 12:15:18 -0400 |
| commit | c23e2b7103090b05e4d567d8976f99926ea855e9 (patch) | |
| tree | 53b4ae8278e229806e7d623a5148634561af0648 /ipc/shm.c | |
| parent | a96cb3bf390eebfead5fc7a2092f8452a7997d1b (diff) | |
KVM: Allow page-sized MMU caches to be initialized with custom 64-bit values
Add support to MMU caches for initializing a page with a custom 64-bit
value, e.g. to pre-fill an entire page table with non-zero PTE values.
The functionality will be used by x86 to support Intel's TDX, which needs
to set bit 63 in all non-present PTEs in order to prevent !PRESENT page
faults from getting reflected into the guest (Intel's EPT Violation #VE
architecture made the less than brilliant decision of having the per-PTE
behavior be opt-out instead of opt-in).
Signed-off-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
Message-Id: <5919f685f109a1b0ebc6bd8fc4536ee94bcc172d.1705965635.git.isaku.yamahata@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'ipc/shm.c')
0 files changed, 0 insertions, 0 deletions