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authorMichael Walle <michael@walle.cc>2022-02-23 14:43:47 +0100
committerTudor Ambarus <tudor.ambarus@microchip.com>2022-02-25 18:12:01 +0200
commit8b4195cd6dc3f1f0ab457d23d21e9f72fde0760a (patch)
treecf3cf9391a5019b9df2e623ebb79c0d9c6f74367 /include/linux/mtd/spi-nor.h
parent9fb4beb1b0510398c8202c6db04f29b3f22d53a7 (diff)
mtd: spi-nor: move all xilinx specifics into xilinx.c
Mechanically move all the xilinx functions to its own module. Then register the new flash specific ready() function. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20220223134358.1914798-22-michael@walle.cc
Diffstat (limited to 'include/linux/mtd/spi-nor.h')
-rw-r--r--include/linux/mtd/spi-nor.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index fc90fce26e33..b44b05a6f934 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -86,15 +86,6 @@
#define SPINOR_OP_BP 0x02 /* Byte program */
#define SPINOR_OP_AAI_WP 0xad /* Auto address increment word program */
-/* Used for S3AN flashes only */
-#define SPINOR_OP_XSE 0x50 /* Sector erase */
-#define SPINOR_OP_XPP 0x82 /* Page program */
-#define SPINOR_OP_XRDSR 0xd7 /* Read status register */
-
-#define XSR_PAGESIZE BIT(0) /* Page size in Po2 or Linear */
-#define XSR_RDY BIT(7) /* Ready */
-
-
/* Used for Macronix and Winbond flashes. */
#define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */
#define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */