diff options
| author | Tommaso Merciai <tomm.merciai@gmail.com> | 2024-06-10 10:10:30 +0200 |
|---|---|---|
| committer | Hans Verkuil <hverkuil-cisco@xs4all.nl> | 2024-06-15 11:16:39 +0200 |
| commit | 44d0ed23e5028f5a46c94df5f7c1cb5f9f7afb33 (patch) | |
| tree | 1c7f6dbb18f2066f07033e5edeeeca5d888ecdc9 /drivers/media/i2c/alvium-csi2.h | |
| parent | 87990652e0b94255229bf34b38158af825843859 (diff) | |
media: i2c: alvium: fix alvium_get_fw_version()
Instead of reading device_fw reg as multiple regs let's read the entire
64bit reg using one i2c read and use bit masks and bit shifts to get fw
info.
Signed-off-by: Tommaso Merciai <tomm.merciai@gmail.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Diffstat (limited to 'drivers/media/i2c/alvium-csi2.h')
| -rw-r--r-- | drivers/media/i2c/alvium-csi2.h | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/media/i2c/alvium-csi2.h b/drivers/media/i2c/alvium-csi2.h index 9463f8604fbc..ed712ad44899 100644 --- a/drivers/media/i2c/alvium-csi2.h +++ b/drivers/media/i2c/alvium-csi2.h @@ -31,10 +31,7 @@ #define REG_BCRM_REG_ADDR_R CCI_REG16(0x0014) #define REG_BCRM_FEATURE_INQUIRY_R REG_BCRM_V4L2_64BIT(0x0008) -#define REG_BCRM_DEVICE_FW_SPEC_VERSION_R REG_BCRM_V4L2_8BIT(0x0010) -#define REG_BCRM_DEVICE_FW_MAJOR_VERSION_R REG_BCRM_V4L2_8BIT(0x0011) -#define REG_BCRM_DEVICE_FW_MINOR_VERSION_R REG_BCRM_V4L2_16BIT(0x0012) -#define REG_BCRM_DEVICE_FW_PATCH_VERSION_R REG_BCRM_V4L2_32BIT(0x0014) +#define REG_BCRM_DEVICE_FW REG_BCRM_V4L2_64BIT(0x0010) #define REG_BCRM_WRITE_HANDSHAKE_RW REG_BCRM_V4L2_8BIT(0x0018) /* Streaming Control Registers */ @@ -205,6 +202,15 @@ #define ALVIUM_LP2HS_DELAY_MS 100 +#define BCRM_DEVICE_FW_MAJOR_MASK GENMASK_ULL(15, 8) +#define BCRM_DEVICE_FW_MAJOR_SHIFT 8 +#define BCRM_DEVICE_FW_MINOR_MASK GENMASK_ULL(31, 16) +#define BCRM_DEVICE_FW_MINOR_SHIFT 16 +#define BCRM_DEVICE_FW_PATCH_MASK GENMASK_ULL(63, 32) +#define BCRM_DEVICE_FW_PATCH_SHIFT 32 +#define BCRM_DEVICE_FW_SPEC_MASK GENMASK_ULL(7, 0) +#define BCRM_DEVICE_FW_SPEC_SHIFT 0 + enum alvium_bcrm_mode { ALVIUM_BCM_MODE, ALVIUM_GENCP_MODE, |