Merge tag 'xtensa-20190715' of git://github.com/jcmvbkbc/linux-xtensa

Pull Xtensa updates from Max Filippov:

 - clean up PCI support code

 - add defconfig and DTS for the 'virt' board

 - abstract 'entry' and 'retw' uses in xtensa assembly in preparation
   for XEA3/NX pipeline support

 - random small cleanups

* tag 'xtensa-20190715' of git://github.com/jcmvbkbc/linux-xtensa:
  xtensa: virt: add defconfig and DTS
  xtensa: abstract 'entry' and 'retw' in assembly code
  xtensa: One function call less in bootmem_init()
  xtensa: remove arch/xtensa/include/asm/types.h
  xtensa: use generic pcibios_set_master and pcibios_enable_device
  xtensa: drop dead PCI support code
  xtensa/PCI: Remove unused variable

1 files changed, 72 insertions, 0 deletions

diff --git a/arch/xtensa/boot/dts/virt.dts b/arch/xtensa/boot/dts/virt.dts
new file mode 100644
index 000000000000..6aecbc0f3549
--- /dev/null
+++ b/arch/xtensa/boot/dts/virt.dts
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+/ {
+	compatible = "cdns,xtensa-iss";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	interrupt-parent = <&pic>;
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8 debug";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x80000000>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		cpu@0 {
+			compatible = "cdns,xtensa-cpu";
+			reg = <0>;
+			clocks = <&osc>;
+		};
+	};
+
+	clocks {
+		osc: osc {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <40000000>;
+		};
+	};
+
+	pic: pic {
+		compatible = "cdns,xtensa-pic";
+		/* one cell: internal irq number,
+		 * two cells: second cell == 0: internal irq number
+		 *            second cell == 1: external irq number
+		 */
+		#address-cells = <0>;
+		#interrupt-cells = <2>;
+		interrupt-controller;
+	};
+
+	pci {
+		compatible = "pci-host-ecam-generic";
+		device_type = "pci";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		#interrupt-cells = <0x1>;
+
+		bus-range = <0x0 0x3f>;
+		reg = <0xc0000000 0x04000000>;
+
+		     // BUS_ADDRESS(3)  CPU_PHYSICAL(1)  SIZE(2)
+		ranges = <0x01000000 0x0 0xc4000000  0xc4000000  0x0 0x04000000>,
+			 <0x02000000 0x0 0xc8000000  0xc8000000  0x0 0x18000000>;
+
+		     // PCI_DEVICE(3)  INT#(1)  CONTROLLER(PHANDLE)  CONTROLLER_DATA(2)
+		interrupt-map = <
+			0x0000 0x0 0x0  0x1  &pic  0x0 0x1
+			0x0800 0x0 0x0  0x1  &pic  0x1 0x1
+			0x1000 0x0 0x0  0x1  &pic  0x2 0x1
+			0x1800 0x0 0x0  0x1  &pic  0x3 0x1
+			>;
+
+		interrupt-map-mask = <0x1800 0x0 0x0  0x7>;
+	};
+};