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authorIngo Molnar <mingo@kernel.org>2017-01-28 09:30:11 +0100
committerIngo Molnar <mingo@kernel.org>2017-01-28 09:30:11 +0100
commit9a1f4150fe932fb892c05084029b3718b8ed1baf (patch)
treeb8f18ea5f0bdc842e3cf8da4700c1d577a3b1c66 /arch/x86/include/asm/microcode_intel.h
parentf28442497b5caf7bf573ade22a7f8d3559e3ef56 (diff)
parent1b1bc42c1692e9b62756323c675a44cb1a1f9dbd (diff)
Merge branch 'linus' into x86/boot, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/include/asm/microcode_intel.h')
-rw-r--r--arch/x86/include/asm/microcode_intel.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/x86/include/asm/microcode_intel.h b/arch/x86/include/asm/microcode_intel.h
index 195becc6f780..e793fc9a9b20 100644
--- a/arch/x86/include/asm/microcode_intel.h
+++ b/arch/x86/include/asm/microcode_intel.h
@@ -52,6 +52,21 @@ struct extended_sigtable {
#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
+static inline u32 intel_get_microcode_revision(void)
+{
+ u32 rev, dummy;
+
+ native_wrmsrl(MSR_IA32_UCODE_REV, 0);
+
+ /* As documented in the SDM: Do a CPUID 1 here */
+ native_cpuid_eax(1);
+
+ /* get the current revision from MSR 0x8B */
+ native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
+
+ return rev;
+}
+
#ifdef CONFIG_MICROCODE_INTEL
extern void __init load_ucode_intel_bsp(void);
extern void load_ucode_intel_ap(void);