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authorHauke Mehrtens <hauke@hauke-m.de>2016-12-30 12:18:27 +0100
committerRalf Baechle <ralf@linux-mips.org>2017-01-25 02:51:12 +0100
commit98e58b01e1671e5784c67972ec1b58a8997f784e (patch)
tree60198b478b7668cc2fcb944ad3eb53d04df8318a /arch/mips/include/asm/uasm.h
parentb3d91db3f71d5f70ea60d900425a3f96aeb3d065 (diff)
MIPS: Lantiq: Lock DMA register accesses for SMP
The DMA controller channel and port configuration is changed by selecting the port or channel in one register and then update the configuration in other registers. This has to be done in an atomic operation. Previously only the local interrupts were deactivated which works for single CPU systems. If the system supports SMP a better locking is needed, use spinlocks instead. On more recent SoCs (at least xrx200 and later) there are two memory regions to change the configuration, there we could use one area for each CPU and do not have to synchronize between the CPUs and more. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14912/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/uasm.h')
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