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authorOlof Johansson <olof@lixom.net>2019-04-28 13:25:29 -0700
committerOlof Johansson <olof@lixom.net>2019-04-28 13:25:29 -0700
commitc7edf1971614b6bf5f07599ed2d8735187e4d02e (patch)
treed4cc2178b4b30174c5049b3d4e82e7fb04a395ea /arch/arm
parentf1e776420a3f56e794f2b41e81446fe756ecb04c (diff)
parentfa44328f4eb0b762a1fcb148809068e9646e7156 (diff)
Merge tag 'sunxi-fixes-for-5.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Allwinner fixes for 5.1 - Pinctrl related fixes for the A33 NAND controller - Fix the refcounting of DT nodes in our core code - Fix for a typo'd DT property * tag 'sunxi-fixes-for-5.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sun8i: a33: Reintroduce default pinctrl muxing arm64: dts: allwinner: a64: Rename hpvcc-supply to cpvdd-supply ARM: sunxi: fix a leaked reference by adding missing of_node_put ARM: sunxi: fix a leaked reference by adding missing of_node_put Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/sun8i-a23-a33.dtsi2
-rw-r--r--arch/arm/mach-sunxi/mc_smp.c5
-rw-r--r--arch/arm/mach-sunxi/platsmp.c4
3 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 43fe215e83ea..14a7d0288b45 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -169,6 +169,8 @@
clock-names = "ahb", "mod";
resets = <&ccu RST_BUS_NAND>;
reset-names = "ahb";
+ pinctrl-names = "default";
+ pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/mach-sunxi/mc_smp.c b/arch/arm/mach-sunxi/mc_smp.c
index b4037b603897..239084cf8192 100644
--- a/arch/arm/mach-sunxi/mc_smp.c
+++ b/arch/arm/mach-sunxi/mc_smp.c
@@ -89,6 +89,7 @@ static bool sunxi_core_is_cortex_a15(unsigned int core, unsigned int cluster)
{
struct device_node *node;
int cpu = cluster * SUNXI_CPUS_PER_CLUSTER + core;
+ bool is_compatible;
node = of_cpu_device_node_get(cpu);
@@ -107,7 +108,9 @@ static bool sunxi_core_is_cortex_a15(unsigned int core, unsigned int cluster)
return false;
}
- return of_device_is_compatible(node, "arm,cortex-a15");
+ is_compatible = of_device_is_compatible(node, "arm,cortex-a15");
+ of_node_put(node);
+ return is_compatible;
}
static int sunxi_cpu_power_switch_set(unsigned int cpu, unsigned int cluster,
diff --git a/arch/arm/mach-sunxi/platsmp.c b/arch/arm/mach-sunxi/platsmp.c
index 8fb5088464db..bdde9ef3aaa9 100644
--- a/arch/arm/mach-sunxi/platsmp.c
+++ b/arch/arm/mach-sunxi/platsmp.c
@@ -50,6 +50,7 @@ static void __init sun6i_smp_prepare_cpus(unsigned int max_cpus)
}
prcm_membase = of_iomap(node, 0);
+ of_node_put(node);
if (!prcm_membase) {
pr_err("Couldn't map A31 PRCM registers\n");
return;
@@ -63,6 +64,7 @@ static void __init sun6i_smp_prepare_cpus(unsigned int max_cpus)
}
cpucfg_membase = of_iomap(node, 0);
+ of_node_put(node);
if (!cpucfg_membase)
pr_err("Couldn't map A31 CPU config registers\n");
@@ -133,6 +135,7 @@ static void __init sun8i_smp_prepare_cpus(unsigned int max_cpus)
}
prcm_membase = of_iomap(node, 0);
+ of_node_put(node);
if (!prcm_membase) {
pr_err("Couldn't map A23 PRCM registers\n");
return;
@@ -146,6 +149,7 @@ static void __init sun8i_smp_prepare_cpus(unsigned int max_cpus)
}
cpucfg_membase = of_iomap(node, 0);
+ of_node_put(node);
if (!cpucfg_membase)
pr_err("Couldn't map A23 CPU config registers\n");