diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-04-12 11:31:31 +0900 |
---|---|---|
committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-04-25 00:31:48 +0900 |
commit | f4e5200fc0d7dad75c688e7ccc0652481a916df5 (patch) | |
tree | cb3befc95519cd664b828a4d00d6bbd0841bf539 /arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | |
parent | 60cc43fc888428bb2f18f08997432d426a243338 (diff) |
arm64: dts: uniphier: fix input delay value for legacy mode of eMMC
The property of the legacy mode for the eMMC PHY turned out to
be wrong. Some eMMC devices are unstable due to the set-up/hold
timing violation. Correct the delay value.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index 9efe20d07589..3a5ed789c056 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -519,7 +519,7 @@ mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-pwrseq = <&emmc_pwrseq>; - cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-legacy = <9>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; cdns,phy-dll-delay-sdclk = <21>; |