diff options
| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2020-07-08 17:56:18 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2020-07-10 10:33:28 +0900 |
| commit | e6bd81a2290f03db8baf761d06071f269dc8e177 (patch) | |
| tree | 93a836194d3f354ca94d01f91ffa947af29aa03e /arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | |
| parent | dcd54fa89ccdba90cb79ab49c01263c3ceb8d683 (diff) | |
arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy
This adds missing clock-names and reset-names to pcie-phy node according to
Documentation/devicetree/bindings/phy/socionext,uniphier-pcie.yaml.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index f4a56b208837..a87b8a678719 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -936,7 +936,9 @@ compatible = "socionext,uniphier-ld20-pcie-phy"; reg = <0x66038000 0x4000>; #phy-cells = <0>; + clock-names = "link"; clocks = <&sys_clk 24>; + reset-names = "link"; resets = <&sys_rst 24>; socionext,syscon = <&soc_glue>; }; |