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authorSean Paul <seanpaul@chromium.org>2014-09-09 15:58:46 -0400
committerThierry Reding <treding@nvidia.com>2014-12-04 16:16:12 +0100
commit49727d30ea34e9721e226596f809cbcbdba78898 (patch)
tree96b33694f33860baf937b07ed409edee6b75b421 /arch/arm/boot
parentf538c50930b7d4fe3991909f6d411994ba6f605c (diff)
ARM: tegra: Add APB_MISC_GP as a MIPI pad control bank
This patch adds the APB_MISC_GP_MIPI_PAD_CTRL_0 as a pin-control bank on Tegra124 so the new MIPI pad control group can be muxed between CSI and DSI_B. Signed-off-by: Sean Paul <seanpaul@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/tegra124.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 478c555ebd96..af2eace5eb63 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -275,7 +275,8 @@
pinmux: pinmux@0,70000868 {
compatible = "nvidia,tegra124-pinmux";
reg = <0x0 0x70000868 0x0 0x164>, /* Pad control registers */
- <0x0 0x70003000 0x0 0x434>; /* Mux registers */
+ <0x0 0x70003000 0x0 0x434>, /* Mux registers */
+ <0x0 0x70000820 0x0 0x008>; /* MIPI pad control */
};
/*