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authorSean Nyekjaer <sean@geanix.com>2023-08-16 14:24:23 +0200
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2023-09-11 08:52:36 +0200
commit12cf3ed9df313394462ab4d49f7cc5c00d9b20e6 (patch)
tree90650f38635e001cd6ea77546c5c9432f72c81de /arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
parente404979e55603ef8564fe6cf7c4368aa6aaee719 (diff)
ARM: dts: stm32: Add alternate pinmux for can pins
Add another mux option for can pins, this is used on Octavo OSD32MP1-RED board. Signed-off-by: Sean Nyekjaer <sean@geanix.com> Reviewed-by: Olivier Moysan <olivier.moysan@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi')
-rw-r--r--arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
index 5de4ec547411..5af271e7f739 100644
--- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
@@ -1245,6 +1245,26 @@
};
};
+ m_can1_pins_d: m-can1-3 {
+ pins1 {
+ pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-disable;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */
+ bias-disable;
+ };
+ };
+
+ m_can1_sleep_pins_d: m_can1-sleep-3 {
+ pins {
+ pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* CAN1_TX */
+ <STM32_PINMUX('D', 0, ANALOG)>; /* CAN1_RX */
+ };
+ };
+
m_can2_pins_a: m-can2-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */