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authorThomas Abraham <thomas.abraham@linaro.org>2012-09-07 06:14:26 +0900
committerKukjin Kim <kgene.kim@samsung.com>2012-09-07 06:14:26 +0900
commit87711d8c7c70387e91d43d88e12983c4d3f9fbb0 (patch)
treea9efb74ed10ebbfe69e87c7424c0cdf3243675de /arch/arm/boot/dts/exynos4210.dtsi
parentfef05c29786fe0aa2833972b5355b58e54d52484 (diff)
ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC
Add pinctrl driver nodes for the three instances of pin controllers in SAMSUNG EXYNOS4210 SoC and add the pin group nodes available in the each of those three instances. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos4210.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi37
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 02891fe876e4..a4bd0c9a206e 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -20,6 +20,7 @@
*/
/include/ "skeleton.dtsi"
+/include/ "exynos4210-pinctrl.dtsi"
/ {
compatible = "samsung,exynos4210";
@@ -29,6 +30,9 @@
spi0 = &spi_0;
spi1 = &spi_1;
spi2 = &spi_2;
+ pinctrl0 = &pinctrl_0;
+ pinctrl1 = &pinctrl_1;
+ pinctrl2 = &pinctrl_2;
};
gic:interrupt-controller@10490000 {
@@ -50,6 +54,39 @@
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
};
+ pinctrl_0: pinctrl@11400000 {
+ compatible = "samsung,pinctrl-exynos4210";
+ reg = <0x11400000 0x1000>;
+ interrupts = <0 47 0>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pinctrl_1: pinctrl@11000000 {
+ compatible = "samsung,pinctrl-exynos4210";
+ reg = <0x11000000 0x1000>;
+ interrupts = <0 46 0>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ wakup_eint: wakeup-interrupt-controller {
+ compatible = "samsung,exynos4210-wakeup-eint";
+ interrupt-parent = <&gic>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
+ <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
+ <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
+ <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>,
+ <0 32 0>;
+ };
+ };
+
+ pinctrl_2: pinctrl@03860000 {
+ compatible = "samsung,pinctrl-exynos4210";
+ reg = <0x03860000 0x1000>;
+ };
+
watchdog@10060000 {
compatible = "samsung,s3c2410-wdt";
reg = <0x10060000 0x100>;