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authorBoris Brezillon <boris.brezillon@free-electrons.com>2017-05-30 11:20:53 +0200
committerAlexandre Belloni <alexandre.belloni@free-electrons.com>2017-05-31 11:55:41 +0200
commit1004a2977bdc7566bca87c565541c3232ed467c4 (patch)
treeff3d3aca77c0e3288c6296263dd0795e60680478 /arch/arm/boot/dts/ethernut5.dts
parentd9c41bf30cf8cea379f5947624e76c893791fec0 (diff)
ARM: dts: at91: Switch to the new NAND bindings
Use the new EBI/NAND bindings to declare NAND chips and remove old NAND nodes along the way. Note that we keep using old bindings in at91rm9200.dtsi because this SoC is not supported by the EBI driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/ethernut5.dts')
-rw-r--r--arch/arm/boot/dts/ethernut5.dts47
1 files changed, 30 insertions, 17 deletions
diff --git a/arch/arm/boot/dts/ethernut5.dts b/arch/arm/boot/dts/ethernut5.dts
index 4687229a3ab9..123b203be06c 100644
--- a/arch/arm/boot/dts/ethernut5.dts
+++ b/arch/arm/boot/dts/ethernut5.dts
@@ -55,25 +55,38 @@
};
};
- nand0: nand@40000000 {
- nand-bus-width = <8>;
- nand-ecc-mode = "soft";
- nand-on-flash-bbt;
+ ebi: ebi@10000000 {
status = "okay";
- gpios = <0
- &pioC 14 GPIO_ACTIVE_HIGH
- 0
- >;
-
- root@0 {
- label = "root";
- reg = <0x0 0x08000000>;
- };
-
- data@20000 {
- label = "data";
- reg = <0x08000000 0x38000000>;
+ nand_controller: nand-controller {
+ status = "okay";
+ pinctrl-0 = <&pinctrl_nand_cs>;
+ pinctrl-names = "default";
+
+ nand: nand@3 {
+ reg = <0x3 0x0 0x800000>;
+ cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt;
+ label = "atmel_nand";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ root@0 {
+ label = "root";
+ reg = <0x0 0x08000000>;
+ };
+
+ data@20000 {
+ label = "data";
+ reg = <0x08000000 0x38000000>;
+ };
+ };
+ };
};
};