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authorRafał Miłecki <rafal@milecki.pl>2023-11-19 22:24:16 +0100
committerStephen Boyd <sboyd@kernel.org>2023-12-17 15:21:19 -0800
commit94b0f301f6ee92f79a2fe2c655dfdbdfe2aec536 (patch)
tree4a56166aa3d8bd76ef538a084675ac369fc4b1cf /Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt
parent39118392d19aebd8e89ba0d73c0da2a5b1f3d1a2 (diff)
dt-bindings: arm: mediatek: move ethsys controller & convert to DT schema
DT schema helps validating DTS files. Binding was moved to clock/ as this hardware is a clock provider. Example required a small fix for "reg" value (1 address cell + 1 size cell). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231119212416.2682-1-zajec5@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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-Mediatek ethsys controller
-============================
-
-The Mediatek ethsys controller provides various clocks to the system.
-
-Required Properties:
-
-- compatible: Should be:
- - "mediatek,mt2701-ethsys", "syscon"
- - "mediatek,mt7622-ethsys", "syscon"
- - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"
- - "mediatek,mt7629-ethsys", "syscon"
- - "mediatek,mt7981-ethsys", "syscon"
- - "mediatek,mt7986-ethsys", "syscon"
-- #clock-cells: Must be 1
-- #reset-cells: Must be 1
-
-The ethsys controller uses the common clk binding from
-Documentation/devicetree/bindings/clock/clock-bindings.txt
-The available clocks are defined in dt-bindings/clock/mt*-clk.h.
-
-Example:
-
-ethsys: clock-controller@1b000000 {
- compatible = "mediatek,mt2701-ethsys", "syscon";
- reg = <0 0x1b000000 0 0x1000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
-};