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author | Gilad Ben-Yossef <gilad@benyossef.com> | 2019-04-28 11:33:22 +0300 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2019-05-03 14:03:30 +0800 |
commit | e59f755ceb6d6f39f90899d2a4e39c3e05837e12 (patch) | |
tree | 8d59be64ef4bc3e869c7b42c52cdba2ae63dd80b | |
parent | 50af32727509a36fc9bbb370c6f6cb14a961dc97 (diff) |
crypto: ccree - use a proper le32 type for le32 val
We build an explicit little endian value from the IDR register
values. Use a proper le32 type to mark the var as such to
satisfy Sparse.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Reported-by: kbuild test robot <lkp@intel.com>
Fixes: dcf6285d18ea1 ("crypto: ccree - add CID and PID support")
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r-- | drivers/crypto/ccree/cc_driver.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/ccree/cc_driver.c b/drivers/crypto/ccree/cc_driver.c index 4ea8e19d2fdf..86ac7b443355 100644 --- a/drivers/crypto/ccree/cc_driver.c +++ b/drivers/crypto/ccree/cc_driver.c @@ -103,7 +103,7 @@ static u32 cc_read_idr(struct cc_drvdata *drvdata, const u32 *idr_offsets) int i; union { u8 regs[CC_NUM_IDRS]; - u32 val; + __le32 val; } idr; for (i = 0; i < CC_NUM_IDRS; ++i) |