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authorSangsu Park <sangsu4u.park@samsung.com>2012-10-23 18:51:57 +0900
committerKukjin Kim <kgene.kim@samsung.com>2012-10-23 18:51:57 +0900
commit4ec673ae05f787f89819e76c34e7d6a21f7d0a8f (patch)
tree11b1facc6ee29d9c100d59f9e10d0fa8bfe549e2
parent4fd7ecd81a9ab5f5dc8ef0254a86911e0126f4d7 (diff)
ARM: EXYNOS: Remove wrong I2S0 clock from peril clock
Remove I2S0 clk from peril since peril clock doesn't have I2S0 clk for EXYNOS4. Audio Subsystem block has I2S0 clk. Signed-off-by: Sangsu Park <sangsu4u.park@samsung.com> [sbkim73@samsung.com: peril control bit 19 is reserved] Acked-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/mach-exynos/clock-exynos4.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 2f51293c1875..68a2a9c30289 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -601,11 +601,6 @@ static struct clk exynos4_init_clocks_off[] = {
.ctrlbit = (1 << 18),
}, {
.name = "iis",
- .devname = "samsung-i2s.0",
- .enable = exynos4_clk_ip_peril_ctrl,
- .ctrlbit = (1 << 19),
- }, {
- .name = "iis",
.devname = "samsung-i2s.1",
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 20),