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authorDavid Matlack <dmatlack@google.com>2014-05-05 21:02:36 -0700
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-05-23 20:08:34 +0900
commit0783c636d1872123b68522b5afb257917c3d5aa9 (patch)
tree4f454e8ac2ec85f51599c589054780982e54c1cc
parent9bc97445a39d37d4092a6a268b7dac93beb86f13 (diff)
staging: slicoss: fix 64-bit isr address bug
This patch fixes a bug that only manifests when the physical address of the interrupt status register is >4GB. Specifically, the driver was only telling the device about the lower 32 bits of the ISR. This patch adds the upper 32 bits. Signed-off-by: David Matlack <dmatlack@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/staging/slicoss/slicoss.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/staging/slicoss/slicoss.c b/drivers/staging/slicoss/slicoss.c
index fea584517e78..fde0ff97f5fb 100644
--- a/drivers/staging/slicoss/slicoss.c
+++ b/drivers/staging/slicoss/slicoss.c
@@ -2814,7 +2814,8 @@ static int slic_card_init(struct sliccard *card, struct adapter *adapter)
spin_lock_irqsave(&adapter->bit64reglock.lock,
adapter->bit64reglock.flags);
- slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
+ slic_reg32_write(&slic_regs->slic_addr_upper,
+ SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
slic_reg32_write(&slic_regs->slic_isp,
SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
spin_unlock_irqrestore(&adapter->bit64reglock.lock,