Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2019-10-09 | MIPS: SGI-IP22/28: Use PROM for memory detection | Thomas Bogendoerfer | 1 | -9/+0 |
2019-10-09 | MIPS: SGI-IP22: set PHYS_OFFSET to memory start | Thomas Bogendoerfer | 1 | -2/+1 |
2019-07-23 | MIPS: Remove unused R5432_CP0_INTERRUPT_WAR | Paul Burton | 1 | -1/+0 |
2017-07-11 | MIPS16e2: Provide feature overrides for non-MIPS16 systems | Maciej W. Rozycki | 1 | -0/+1 |
2015-04-08 | MIPS: Correct `nofpu' non-functionality | Maciej W. Rozycki | 1 | -1/+0 |
2014-05-23 | MIPS: IP22: This platform may come with either MIPS III or MIPS IV CPUs. | Ralf Baechle | 1 | -0/+4 |
2013-09-17 | MIPS: Optimize current_cpu_type() for better code. | Ralf Baechle | 1 | -0/+2 |
2012-12-13 | MIPS: PMC-Sierra Yosemite: Remove support. | Ralf Baechle | 1 | -1/+0 |
2012-10-11 | MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required. | Ralf Baechle | 1 | -0/+1 |
2008-10-15 | MIPS: IP22/28: Switch over to RTC class driver | Thomas Bogendoerfer | 1 | -18/+0 |
2008-10-11 | MIPS: Move headfiles to new location below arch/mips/include | Ralf Baechle | 4 | -0/+118 |