diff options
| -rw-r--r-- | drivers/mtd/spi-nor/Makefile | 1 | ||||
| -rw-r--r-- | drivers/mtd/spi-nor/core.c | 15 | ||||
| -rw-r--r-- | drivers/mtd/spi-nor/core.h | 1 | ||||
| -rw-r--r-- | drivers/mtd/spi-nor/intel.c | 32 |
4 files changed, 35 insertions, 14 deletions
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index 38f704be4b03..8eb741a27fa7 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -7,4 +7,5 @@ spi-nor-objs += esmt.o spi-nor-objs += everspin.o spi-nor-objs += fujitsu.o spi-nor-objs += gigadevice.o +spi-nor-objs += intel.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 236632d15c42..e860f4efdeba 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2066,11 +2066,6 @@ static struct spi_nor_fixups mx25l25635_fixups = { * old entries may be missing 4K flag. */ static const struct flash_info spi_nor_ids[] = { - /* Intel/Numonyx -- xxxs33b */ - { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, - { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, - { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, - /* ISSI */ { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2, SECT_4K) }, { "is25lq040b", INFO(0x9d4013, 0, 64 * 1024, 8, @@ -2372,6 +2367,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = { &spi_nor_everspin, &spi_nor_fujitsu, &spi_nor_gigadevice, + &spi_nor_intel, }; static const struct flash_info * @@ -3151,11 +3147,6 @@ static int spi_nor_setup(struct spi_nor *nor, return nor->params.setup(nor, hwcaps); } -static void intel_set_default_init(struct spi_nor *nor) -{ - nor->flags |= SNOR_F_HAS_LOCK; -} - static void issi_set_default_init(struct spi_nor *nor) { nor->params.quad_enable = spi_nor_sr1_bit6_quad_enable; @@ -3194,10 +3185,6 @@ static void spi_nor_manufacturer_init_params(struct spi_nor *nor) { /* Init flash parameters based on MFR */ switch (JEDEC_MFR(nor->info)) { - case SNOR_MFR_INTEL: - intel_set_default_init(nor); - break; - case SNOR_MFR_ISSI: issi_set_default_init(nor); break; diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index da88d7e55c76..3d31e7fc4ac4 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -173,6 +173,7 @@ extern const struct spi_nor_manufacturer spi_nor_esmt; extern const struct spi_nor_manufacturer spi_nor_everspin; extern const struct spi_nor_manufacturer spi_nor_fujitsu; extern const struct spi_nor_manufacturer spi_nor_gigadevice; +extern const struct spi_nor_manufacturer spi_nor_intel; int spi_nor_write_enable(struct spi_nor *nor); int spi_nor_write_disable(struct spi_nor *nor); diff --git a/drivers/mtd/spi-nor/intel.c b/drivers/mtd/spi-nor/intel.c new file mode 100644 index 000000000000..d8196f101368 --- /dev/null +++ b/drivers/mtd/spi-nor/intel.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2005, Intec Automation Inc. + * Copyright (C) 2014, Freescale Semiconductor, Inc. + */ + +#include <linux/mtd/spi-nor.h> + +#include "core.h" + +static const struct flash_info intel_parts[] = { + /* Intel/Numonyx -- xxxs33b */ + { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, + { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, + { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, +}; + +static void intel_default_init(struct spi_nor *nor) +{ + nor->flags |= SNOR_F_HAS_LOCK; +} + +static const struct spi_nor_fixups intel_fixups = { + .default_init = intel_default_init, +}; + +const struct spi_nor_manufacturer spi_nor_intel = { + .name = "intel", + .parts = intel_parts, + .nparts = ARRAY_SIZE(intel_parts), + .fixups = &intel_fixups, +}; |